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1346 lines
37 KiB
1346 lines
37 KiB
/*====================================================================== |
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Device driver for Intel 82365 and compatible PC Card controllers. |
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i82365.c 1.265 1999/11/10 18:36:21 |
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The contents of this file are subject to the Mozilla Public |
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License Version 1.1 (the "License"); you may not use this file |
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except in compliance with the License. You may obtain a copy of |
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the License at http://www.mozilla.org/MPL/ |
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Software distributed under the License is distributed on an "AS |
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IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or |
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implied. See the License for the specific language governing |
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rights and limitations under the License. |
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The initial developer of the original code is David A. Hinds |
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<[email protected]>. Portions created by David A. Hinds |
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are Copyright (C) 1999 David A. Hinds. All Rights Reserved. |
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Alternatively, the contents of this file may be used under the |
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terms of the GNU General Public License version 2 (the "GPL"), in which |
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case the provisions of the GPL are applicable instead of the |
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above. If you wish to allow the use of your version of this file |
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only under the terms of the GPL and not to allow others to use |
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your version of this file under the MPL, indicate your decision |
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by deleting the provisions above and replace them with the notice |
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and other provisions required by the GPL. If you do not delete |
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the provisions above, a recipient may use your version of this |
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file under either the MPL or the GPL. |
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======================================================================*/ |
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#include <linux/module.h> |
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#include <linux/moduleparam.h> |
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#include <linux/init.h> |
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#include <linux/types.h> |
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#include <linux/fcntl.h> |
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#include <linux/string.h> |
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#include <linux/kernel.h> |
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#include <linux/errno.h> |
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#include <linux/timer.h> |
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#include <linux/ioport.h> |
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#include <linux/delay.h> |
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#include <linux/workqueue.h> |
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#include <linux/interrupt.h> |
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#include <linux/platform_device.h> |
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#include <linux/bitops.h> |
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#include <asm/irq.h> |
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#include <asm/io.h> |
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#include <pcmcia/ss.h> |
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#include <linux/isapnp.h> |
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/* ISA-bus controllers */ |
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#include "i82365.h" |
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#include "cirrus.h" |
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#include "vg468.h" |
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#include "ricoh.h" |
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static irqreturn_t i365_count_irq(int, void *); |
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static inline int _check_irq(int irq, int flags) |
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{ |
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if (request_irq(irq, i365_count_irq, flags, "x", i365_count_irq) != 0) |
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return -1; |
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free_irq(irq, i365_count_irq); |
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return 0; |
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} |
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/*====================================================================*/ |
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/* Parameters that can be set with 'insmod' */ |
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/* Default base address for i82365sl and other ISA chips */ |
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static unsigned long i365_base = 0x3e0; |
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/* Should we probe at 0x3e2 for an extra ISA controller? */ |
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static int extra_sockets = 0; |
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/* Specify a socket number to ignore */ |
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static int ignore = -1; |
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/* Bit map or list of interrupts to choose from */ |
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static u_int irq_mask = 0xffff; |
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static int irq_list[16]; |
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static unsigned int irq_list_count; |
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/* The card status change interrupt -- 0 means autoselect */ |
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static int cs_irq = 0; |
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/* Probe for safe interrupts? */ |
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static int do_scan = 1; |
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/* Poll status interval -- 0 means default to interrupt */ |
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static int poll_interval = 0; |
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/* External clock time, in nanoseconds. 120 ns = 8.33 MHz */ |
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static int cycle_time = 120; |
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/* Cirrus options */ |
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static int has_dma = -1; |
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static int has_led = -1; |
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static int has_ring = -1; |
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static int dynamic_mode = 0; |
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static int freq_bypass = -1; |
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static int setup_time = -1; |
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static int cmd_time = -1; |
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static int recov_time = -1; |
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/* Vadem options */ |
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static int async_clock = -1; |
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static int cable_mode = -1; |
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static int wakeup = 0; |
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module_param_hw(i365_base, ulong, ioport, 0444); |
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module_param(ignore, int, 0444); |
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module_param(extra_sockets, int, 0444); |
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module_param_hw(irq_mask, int, other, 0444); |
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module_param_hw_array(irq_list, int, irq, &irq_list_count, 0444); |
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module_param_hw(cs_irq, int, irq, 0444); |
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module_param(async_clock, int, 0444); |
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module_param(cable_mode, int, 0444); |
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module_param(wakeup, int, 0444); |
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module_param(do_scan, int, 0444); |
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module_param(poll_interval, int, 0444); |
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module_param(cycle_time, int, 0444); |
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module_param(has_dma, int, 0444); |
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module_param(has_led, int, 0444); |
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module_param(has_ring, int, 0444); |
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module_param(dynamic_mode, int, 0444); |
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module_param(freq_bypass, int, 0444); |
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module_param(setup_time, int, 0444); |
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module_param(cmd_time, int, 0444); |
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module_param(recov_time, int, 0444); |
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/*====================================================================*/ |
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struct cirrus_state { |
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u_char misc1, misc2; |
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u_char timer[6]; |
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}; |
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struct vg46x_state { |
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u_char ctl, ema; |
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}; |
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struct i82365_socket { |
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u_short type, flags; |
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struct pcmcia_socket socket; |
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unsigned int number; |
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unsigned int ioaddr; |
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u_short psock; |
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u_char cs_irq, intr; |
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union { |
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struct cirrus_state cirrus; |
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struct vg46x_state vg46x; |
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} state; |
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}; |
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/* Where we keep track of our sockets... */ |
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static int sockets = 0; |
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static struct i82365_socket socket[8] = { |
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{ 0, }, /* ... */ |
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}; |
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/* Default ISA interrupt mask */ |
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#define I365_MASK 0xdeb8 /* irq 15,14,12,11,10,9,7,5,4,3 */ |
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static int grab_irq; |
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static DEFINE_SPINLOCK(isa_lock); |
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#define ISA_LOCK(n, f) spin_lock_irqsave(&isa_lock, f) |
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#define ISA_UNLOCK(n, f) spin_unlock_irqrestore(&isa_lock, f) |
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static struct timer_list poll_timer; |
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/*====================================================================*/ |
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/* These definitions must match the pcic table! */ |
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enum pcic_id { |
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IS_I82365A, IS_I82365B, IS_I82365DF, |
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IS_IBM, IS_RF5Cx96, IS_VLSI, IS_VG468, IS_VG469, |
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IS_PD6710, IS_PD672X, IS_VT83C469, |
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}; |
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/* Flags for classifying groups of controllers */ |
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#define IS_VADEM 0x0001 |
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#define IS_CIRRUS 0x0002 |
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#define IS_VIA 0x0010 |
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#define IS_UNKNOWN 0x0400 |
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#define IS_VG_PWR 0x0800 |
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#define IS_DF_PWR 0x1000 |
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#define IS_REGISTERED 0x2000 |
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#define IS_ALIVE 0x8000 |
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struct pcic { |
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char *name; |
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u_short flags; |
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}; |
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static struct pcic pcic[] = { |
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{ "Intel i82365sl A step", 0 }, |
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{ "Intel i82365sl B step", 0 }, |
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{ "Intel i82365sl DF", IS_DF_PWR }, |
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{ "IBM Clone", 0 }, |
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{ "Ricoh RF5C296/396", 0 }, |
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{ "VLSI 82C146", 0 }, |
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{ "Vadem VG-468", IS_VADEM }, |
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{ "Vadem VG-469", IS_VADEM|IS_VG_PWR }, |
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{ "Cirrus PD6710", IS_CIRRUS }, |
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{ "Cirrus PD672x", IS_CIRRUS }, |
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{ "VIA VT83C469", IS_CIRRUS|IS_VIA }, |
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}; |
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#define PCIC_COUNT ARRAY_SIZE(pcic) |
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/*====================================================================*/ |
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static DEFINE_SPINLOCK(bus_lock); |
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static u_char i365_get(u_short sock, u_short reg) |
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{ |
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unsigned long flags; |
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spin_lock_irqsave(&bus_lock,flags); |
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{ |
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unsigned int port = socket[sock].ioaddr; |
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u_char val; |
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reg = I365_REG(socket[sock].psock, reg); |
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outb(reg, port); val = inb(port+1); |
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spin_unlock_irqrestore(&bus_lock,flags); |
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return val; |
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} |
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} |
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static void i365_set(u_short sock, u_short reg, u_char data) |
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{ |
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unsigned long flags; |
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spin_lock_irqsave(&bus_lock,flags); |
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{ |
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unsigned int port = socket[sock].ioaddr; |
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u_char val = I365_REG(socket[sock].psock, reg); |
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outb(val, port); outb(data, port+1); |
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spin_unlock_irqrestore(&bus_lock,flags); |
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} |
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} |
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static void i365_bset(u_short sock, u_short reg, u_char mask) |
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{ |
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u_char d = i365_get(sock, reg); |
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d |= mask; |
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i365_set(sock, reg, d); |
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} |
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static void i365_bclr(u_short sock, u_short reg, u_char mask) |
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{ |
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u_char d = i365_get(sock, reg); |
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d &= ~mask; |
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i365_set(sock, reg, d); |
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} |
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static void i365_bflip(u_short sock, u_short reg, u_char mask, int b) |
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{ |
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u_char d = i365_get(sock, reg); |
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if (b) |
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d |= mask; |
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else |
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d &= ~mask; |
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i365_set(sock, reg, d); |
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} |
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static u_short i365_get_pair(u_short sock, u_short reg) |
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{ |
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u_short a, b; |
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a = i365_get(sock, reg); |
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b = i365_get(sock, reg+1); |
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return (a + (b<<8)); |
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} |
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static void i365_set_pair(u_short sock, u_short reg, u_short data) |
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{ |
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i365_set(sock, reg, data & 0xff); |
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i365_set(sock, reg+1, data >> 8); |
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} |
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/*====================================================================== |
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Code to save and restore global state information for Cirrus |
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PD67xx controllers, and to set and report global configuration |
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options. |
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The VIA controllers also use these routines, as they are mostly |
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Cirrus lookalikes, without the timing registers. |
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======================================================================*/ |
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#define flip(v,b,f) (v = ((f)<0) ? v : ((f) ? ((v)|(b)) : ((v)&(~b)))) |
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static void cirrus_get_state(u_short s) |
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{ |
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int i; |
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struct cirrus_state *p = &socket[s].state.cirrus; |
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p->misc1 = i365_get(s, PD67_MISC_CTL_1); |
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p->misc1 &= (PD67_MC1_MEDIA_ENA | PD67_MC1_INPACK_ENA); |
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p->misc2 = i365_get(s, PD67_MISC_CTL_2); |
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for (i = 0; i < 6; i++) |
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p->timer[i] = i365_get(s, PD67_TIME_SETUP(0)+i); |
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} |
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static void cirrus_set_state(u_short s) |
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{ |
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int i; |
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u_char misc; |
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struct cirrus_state *p = &socket[s].state.cirrus; |
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misc = i365_get(s, PD67_MISC_CTL_2); |
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i365_set(s, PD67_MISC_CTL_2, p->misc2); |
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if (misc & PD67_MC2_SUSPEND) mdelay(50); |
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misc = i365_get(s, PD67_MISC_CTL_1); |
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misc &= ~(PD67_MC1_MEDIA_ENA | PD67_MC1_INPACK_ENA); |
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i365_set(s, PD67_MISC_CTL_1, misc | p->misc1); |
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for (i = 0; i < 6; i++) |
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i365_set(s, PD67_TIME_SETUP(0)+i, p->timer[i]); |
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} |
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static u_int __init cirrus_set_opts(u_short s, char *buf) |
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{ |
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struct i82365_socket *t = &socket[s]; |
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struct cirrus_state *p = &socket[s].state.cirrus; |
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u_int mask = 0xffff; |
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if (has_ring == -1) has_ring = 1; |
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flip(p->misc2, PD67_MC2_IRQ15_RI, has_ring); |
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flip(p->misc2, PD67_MC2_DYNAMIC_MODE, dynamic_mode); |
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flip(p->misc2, PD67_MC2_FREQ_BYPASS, freq_bypass); |
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if (p->misc2 & PD67_MC2_IRQ15_RI) |
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strcat(buf, " [ring]"); |
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if (p->misc2 & PD67_MC2_DYNAMIC_MODE) |
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strcat(buf, " [dyn mode]"); |
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if (p->misc2 & PD67_MC2_FREQ_BYPASS) |
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strcat(buf, " [freq bypass]"); |
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if (p->misc1 & PD67_MC1_INPACK_ENA) |
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strcat(buf, " [inpack]"); |
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if (p->misc2 & PD67_MC2_IRQ15_RI) |
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mask &= ~0x8000; |
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if (has_led > 0) { |
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strcat(buf, " [led]"); |
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mask &= ~0x1000; |
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} |
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if (has_dma > 0) { |
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strcat(buf, " [dma]"); |
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mask &= ~0x0600; |
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} |
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if (!(t->flags & IS_VIA)) { |
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if (setup_time >= 0) |
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p->timer[0] = p->timer[3] = setup_time; |
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if (cmd_time > 0) { |
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p->timer[1] = cmd_time; |
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p->timer[4] = cmd_time*2+4; |
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} |
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if (p->timer[1] == 0) { |
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p->timer[1] = 6; p->timer[4] = 16; |
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if (p->timer[0] == 0) |
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p->timer[0] = p->timer[3] = 1; |
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} |
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if (recov_time >= 0) |
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p->timer[2] = p->timer[5] = recov_time; |
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buf += strlen(buf); |
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sprintf(buf, " [%d/%d/%d] [%d/%d/%d]", p->timer[0], p->timer[1], |
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p->timer[2], p->timer[3], p->timer[4], p->timer[5]); |
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} |
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return mask; |
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} |
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/*====================================================================== |
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Code to save and restore global state information for Vadem VG468 |
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and VG469 controllers, and to set and report global configuration |
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options. |
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======================================================================*/ |
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static void vg46x_get_state(u_short s) |
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{ |
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struct vg46x_state *p = &socket[s].state.vg46x; |
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p->ctl = i365_get(s, VG468_CTL); |
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if (socket[s].type == IS_VG469) |
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p->ema = i365_get(s, VG469_EXT_MODE); |
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} |
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static void vg46x_set_state(u_short s) |
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{ |
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struct vg46x_state *p = &socket[s].state.vg46x; |
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i365_set(s, VG468_CTL, p->ctl); |
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if (socket[s].type == IS_VG469) |
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i365_set(s, VG469_EXT_MODE, p->ema); |
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} |
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static u_int __init vg46x_set_opts(u_short s, char *buf) |
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{ |
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struct vg46x_state *p = &socket[s].state.vg46x; |
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flip(p->ctl, VG468_CTL_ASYNC, async_clock); |
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flip(p->ema, VG469_MODE_CABLE, cable_mode); |
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if (p->ctl & VG468_CTL_ASYNC) |
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strcat(buf, " [async]"); |
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if (p->ctl & VG468_CTL_INPACK) |
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strcat(buf, " [inpack]"); |
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if (socket[s].type == IS_VG469) { |
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u_char vsel = i365_get(s, VG469_VSELECT); |
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if (vsel & VG469_VSEL_EXT_STAT) { |
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strcat(buf, " [ext mode]"); |
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if (vsel & VG469_VSEL_EXT_BUS) |
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strcat(buf, " [isa buf]"); |
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} |
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if (p->ema & VG469_MODE_CABLE) |
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strcat(buf, " [cable]"); |
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if (p->ema & VG469_MODE_COMPAT) |
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strcat(buf, " [c step]"); |
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} |
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return 0xffff; |
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} |
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/*====================================================================== |
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Generic routines to get and set controller options |
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======================================================================*/ |
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static void get_bridge_state(u_short s) |
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{ |
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struct i82365_socket *t = &socket[s]; |
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if (t->flags & IS_CIRRUS) |
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cirrus_get_state(s); |
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else if (t->flags & IS_VADEM) |
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vg46x_get_state(s); |
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} |
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static void set_bridge_state(u_short s) |
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{ |
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struct i82365_socket *t = &socket[s]; |
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if (t->flags & IS_CIRRUS) |
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cirrus_set_state(s); |
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else { |
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i365_set(s, I365_GBLCTL, 0x00); |
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i365_set(s, I365_GENCTL, 0x00); |
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} |
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i365_bflip(s, I365_INTCTL, I365_INTR_ENA, t->intr); |
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if (t->flags & IS_VADEM) |
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vg46x_set_state(s); |
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} |
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static u_int __init set_bridge_opts(u_short s, u_short ns) |
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{ |
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u_short i; |
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u_int m = 0xffff; |
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char buf[128]; |
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for (i = s; i < s+ns; i++) { |
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if (socket[i].flags & IS_ALIVE) { |
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printk(KERN_INFO " host opts [%d]: already alive!\n", i); |
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continue; |
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} |
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buf[0] = '\0'; |
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get_bridge_state(i); |
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if (socket[i].flags & IS_CIRRUS) |
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m = cirrus_set_opts(i, buf); |
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else if (socket[i].flags & IS_VADEM) |
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m = vg46x_set_opts(i, buf); |
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set_bridge_state(i); |
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printk(KERN_INFO " host opts [%d]:%s\n", i, |
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(*buf) ? buf : " none"); |
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} |
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return m; |
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} |
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/*====================================================================== |
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Interrupt testing code, for ISA and PCI interrupts |
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======================================================================*/ |
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static volatile u_int irq_hits; |
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static u_short irq_sock; |
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static irqreturn_t i365_count_irq(int irq, void *dev) |
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{ |
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i365_get(irq_sock, I365_CSC); |
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irq_hits++; |
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pr_debug("i82365: -> hit on irq %d\n", irq); |
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return IRQ_HANDLED; |
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} |
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static u_int __init test_irq(u_short sock, int irq) |
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{ |
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pr_debug("i82365: testing ISA irq %d\n", irq); |
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if (request_irq(irq, i365_count_irq, IRQF_PROBE_SHARED, "scan", |
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i365_count_irq) != 0) |
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return 1; |
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irq_hits = 0; irq_sock = sock; |
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msleep(10); |
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if (irq_hits) { |
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free_irq(irq, i365_count_irq); |
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pr_debug("i82365: spurious hit!\n"); |
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return 1; |
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} |
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|
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/* Generate one interrupt */ |
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i365_set(sock, I365_CSCINT, I365_CSC_DETECT | (irq << 4)); |
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i365_bset(sock, I365_GENCTL, I365_CTL_SW_IRQ); |
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udelay(1000); |
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free_irq(irq, i365_count_irq); |
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|
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/* mask all interrupts */ |
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i365_set(sock, I365_CSCINT, 0); |
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pr_debug("i82365: hits = %d\n", irq_hits); |
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|
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return (irq_hits != 1); |
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} |
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static u_int __init isa_scan(u_short sock, u_int mask0) |
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{ |
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u_int mask1 = 0; |
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int i; |
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|
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#ifdef __alpha__ |
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#define PIC 0x4d0 |
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/* Don't probe level-triggered interrupts -- reserved for PCI */ |
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mask0 &= ~(inb(PIC) | (inb(PIC+1) << 8)); |
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#endif |
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|
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if (do_scan) { |
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set_bridge_state(sock); |
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i365_set(sock, I365_CSCINT, 0); |
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for (i = 0; i < 16; i++) |
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if ((mask0 & (1 << i)) && (test_irq(sock, i) == 0)) |
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mask1 |= (1 << i); |
|
for (i = 0; i < 16; i++) |
|
if ((mask1 & (1 << i)) && (test_irq(sock, i) != 0)) |
|
mask1 ^= (1 << i); |
|
} |
|
|
|
printk(KERN_INFO " ISA irqs ("); |
|
if (mask1) { |
|
printk("scanned"); |
|
} else { |
|
/* Fallback: just find interrupts that aren't in use */ |
|
for (i = 0; i < 16; i++) |
|
if ((mask0 & (1 << i)) && (_check_irq(i, IRQF_PROBE_SHARED) == 0)) |
|
mask1 |= (1 << i); |
|
printk("default"); |
|
/* If scan failed, default to polled status */ |
|
if (!cs_irq && (poll_interval == 0)) poll_interval = HZ; |
|
} |
|
printk(") = "); |
|
|
|
for (i = 0; i < 16; i++) |
|
if (mask1 & (1<<i)) |
|
printk("%s%d", ((mask1 & ((1<<i)-1)) ? "," : ""), i); |
|
if (mask1 == 0) printk("none!"); |
|
|
|
return mask1; |
|
} |
|
|
|
/*====================================================================*/ |
|
|
|
/* Time conversion functions */ |
|
|
|
static int to_cycles(int ns) |
|
{ |
|
return ns/cycle_time; |
|
} |
|
|
|
/*====================================================================*/ |
|
|
|
static int __init identify(unsigned int port, u_short sock) |
|
{ |
|
u_char val; |
|
int type = -1; |
|
|
|
/* Use the next free entry in the socket table */ |
|
socket[sockets].ioaddr = port; |
|
socket[sockets].psock = sock; |
|
|
|
/* Wake up a sleepy Cirrus controller */ |
|
if (wakeup) { |
|
i365_bclr(sockets, PD67_MISC_CTL_2, PD67_MC2_SUSPEND); |
|
/* Pause at least 50 ms */ |
|
mdelay(50); |
|
} |
|
|
|
if ((val = i365_get(sockets, I365_IDENT)) & 0x70) |
|
return -1; |
|
switch (val) { |
|
case 0x82: |
|
type = IS_I82365A; break; |
|
case 0x83: |
|
type = IS_I82365B; break; |
|
case 0x84: |
|
type = IS_I82365DF; break; |
|
case 0x88: case 0x89: case 0x8a: |
|
type = IS_IBM; break; |
|
} |
|
|
|
/* Check for Vadem VG-468 chips */ |
|
outb(0x0e, port); |
|
outb(0x37, port); |
|
i365_bset(sockets, VG468_MISC, VG468_MISC_VADEMREV); |
|
val = i365_get(sockets, I365_IDENT); |
|
if (val & I365_IDENT_VADEM) { |
|
i365_bclr(sockets, VG468_MISC, VG468_MISC_VADEMREV); |
|
type = ((val & 7) >= 4) ? IS_VG469 : IS_VG468; |
|
} |
|
|
|
/* Check for Ricoh chips */ |
|
val = i365_get(sockets, RF5C_CHIP_ID); |
|
if ((val == RF5C_CHIP_RF5C296) || (val == RF5C_CHIP_RF5C396)) |
|
type = IS_RF5Cx96; |
|
|
|
/* Check for Cirrus CL-PD67xx chips */ |
|
i365_set(sockets, PD67_CHIP_INFO, 0); |
|
val = i365_get(sockets, PD67_CHIP_INFO); |
|
if ((val & PD67_INFO_CHIP_ID) == PD67_INFO_CHIP_ID) { |
|
val = i365_get(sockets, PD67_CHIP_INFO); |
|
if ((val & PD67_INFO_CHIP_ID) == 0) { |
|
type = (val & PD67_INFO_SLOTS) ? IS_PD672X : IS_PD6710; |
|
i365_set(sockets, PD67_EXT_INDEX, 0xe5); |
|
if (i365_get(sockets, PD67_EXT_INDEX) != 0xe5) |
|
type = IS_VT83C469; |
|
} |
|
} |
|
return type; |
|
} /* identify */ |
|
|
|
/*====================================================================== |
|
|
|
See if a card is present, powered up, in IO mode, and already |
|
bound to a (non PC Card) Linux driver. We leave these alone. |
|
|
|
We make an exception for cards that seem to be serial devices. |
|
|
|
======================================================================*/ |
|
|
|
static int __init is_alive(u_short sock) |
|
{ |
|
u_char stat; |
|
unsigned int start, stop; |
|
|
|
stat = i365_get(sock, I365_STATUS); |
|
start = i365_get_pair(sock, I365_IO(0)+I365_W_START); |
|
stop = i365_get_pair(sock, I365_IO(0)+I365_W_STOP); |
|
if ((stat & I365_CS_DETECT) && (stat & I365_CS_POWERON) && |
|
(i365_get(sock, I365_INTCTL) & I365_PC_IOCARD) && |
|
(i365_get(sock, I365_ADDRWIN) & I365_ENA_IO(0)) && |
|
((start & 0xfeef) != 0x02e8)) { |
|
if (!request_region(start, stop-start+1, "i82365")) |
|
return 1; |
|
release_region(start, stop-start+1); |
|
} |
|
|
|
return 0; |
|
} |
|
|
|
/*====================================================================*/ |
|
|
|
static void __init add_socket(unsigned int port, int psock, int type) |
|
{ |
|
socket[sockets].ioaddr = port; |
|
socket[sockets].psock = psock; |
|
socket[sockets].type = type; |
|
socket[sockets].flags = pcic[type].flags; |
|
if (is_alive(sockets)) |
|
socket[sockets].flags |= IS_ALIVE; |
|
sockets++; |
|
} |
|
|
|
static void __init add_pcic(int ns, int type) |
|
{ |
|
u_int mask = 0, i, base; |
|
int isa_irq = 0; |
|
struct i82365_socket *t = &socket[sockets-ns]; |
|
|
|
base = sockets-ns; |
|
if (base == 0) printk("\n"); |
|
printk(KERN_INFO " %s", pcic[type].name); |
|
printk(" ISA-to-PCMCIA at port %#x ofs 0x%02x", |
|
t->ioaddr, t->psock*0x40); |
|
printk(", %d socket%s\n", ns, ((ns > 1) ? "s" : "")); |
|
|
|
/* Set host options, build basic interrupt mask */ |
|
if (irq_list_count == 0) |
|
mask = irq_mask; |
|
else |
|
for (i = mask = 0; i < irq_list_count; i++) |
|
mask |= (1<<irq_list[i]); |
|
mask &= I365_MASK & set_bridge_opts(base, ns); |
|
/* Scan for ISA interrupts */ |
|
mask = isa_scan(base, mask); |
|
|
|
/* Poll if only two interrupts available */ |
|
if (!poll_interval) { |
|
u_int tmp = (mask & 0xff20); |
|
tmp = tmp & (tmp-1); |
|
if ((tmp & (tmp-1)) == 0) |
|
poll_interval = HZ; |
|
} |
|
/* Only try an ISA cs_irq if this is the first controller */ |
|
if (!grab_irq && (cs_irq || !poll_interval)) { |
|
/* Avoid irq 12 unless it is explicitly requested */ |
|
u_int cs_mask = mask & ((cs_irq) ? (1<<cs_irq) : ~(1<<12)); |
|
for (cs_irq = 15; cs_irq > 0; cs_irq--) |
|
if ((cs_mask & (1 << cs_irq)) && |
|
(_check_irq(cs_irq, IRQF_PROBE_SHARED) == 0)) |
|
break; |
|
if (cs_irq) { |
|
grab_irq = 1; |
|
isa_irq = cs_irq; |
|
printk(" status change on irq %d\n", cs_irq); |
|
} |
|
} |
|
|
|
if (!isa_irq) { |
|
if (poll_interval == 0) |
|
poll_interval = HZ; |
|
printk(" polling interval = %d ms\n", |
|
poll_interval * 1000 / HZ); |
|
|
|
} |
|
|
|
/* Update socket interrupt information, capabilities */ |
|
for (i = 0; i < ns; i++) { |
|
t[i].socket.features |= SS_CAP_PCCARD; |
|
t[i].socket.map_size = 0x1000; |
|
t[i].socket.irq_mask = mask; |
|
t[i].cs_irq = isa_irq; |
|
} |
|
|
|
} /* add_pcic */ |
|
|
|
/*====================================================================*/ |
|
|
|
#ifdef CONFIG_PNP |
|
static struct isapnp_device_id id_table[] __initdata = { |
|
{ ISAPNP_ANY_ID, ISAPNP_ANY_ID, ISAPNP_VENDOR('P', 'N', 'P'), |
|
ISAPNP_FUNCTION(0x0e00), (unsigned long) "Intel 82365-Compatible" }, |
|
{ ISAPNP_ANY_ID, ISAPNP_ANY_ID, ISAPNP_VENDOR('P', 'N', 'P'), |
|
ISAPNP_FUNCTION(0x0e01), (unsigned long) "Cirrus Logic CL-PD6720" }, |
|
{ ISAPNP_ANY_ID, ISAPNP_ANY_ID, ISAPNP_VENDOR('P', 'N', 'P'), |
|
ISAPNP_FUNCTION(0x0e02), (unsigned long) "VLSI VL82C146" }, |
|
{ 0 } |
|
}; |
|
MODULE_DEVICE_TABLE(isapnp, id_table); |
|
|
|
static struct pnp_dev *i82365_pnpdev; |
|
#endif |
|
|
|
static void __init isa_probe(void) |
|
{ |
|
int i, j, sock, k, ns, id; |
|
unsigned int port; |
|
#ifdef CONFIG_PNP |
|
struct isapnp_device_id *devid; |
|
struct pnp_dev *dev; |
|
|
|
for (devid = id_table; devid->vendor; devid++) { |
|
if ((dev = pnp_find_dev(NULL, devid->vendor, devid->function, NULL))) { |
|
|
|
if (pnp_device_attach(dev) < 0) |
|
continue; |
|
|
|
if (pnp_activate_dev(dev) < 0) { |
|
printk("activate failed\n"); |
|
pnp_device_detach(dev); |
|
break; |
|
} |
|
|
|
if (!pnp_port_valid(dev, 0)) { |
|
printk("invalid resources ?\n"); |
|
pnp_device_detach(dev); |
|
break; |
|
} |
|
i365_base = pnp_port_start(dev, 0); |
|
i82365_pnpdev = dev; |
|
break; |
|
} |
|
} |
|
#endif |
|
|
|
if (!request_region(i365_base, 2, "i82365")) { |
|
if (sockets == 0) |
|
printk("port conflict at %#lx\n", i365_base); |
|
return; |
|
} |
|
|
|
id = identify(i365_base, 0); |
|
if ((id == IS_I82365DF) && (identify(i365_base, 1) != id)) { |
|
for (i = 0; i < 4; i++) { |
|
if (i == ignore) continue; |
|
port = i365_base + ((i & 1) << 2) + ((i & 2) << 1); |
|
sock = (i & 1) << 1; |
|
if (identify(port, sock) == IS_I82365DF) { |
|
add_socket(port, sock, IS_VLSI); |
|
add_pcic(1, IS_VLSI); |
|
} |
|
} |
|
} else { |
|
for (i = 0; i < 8; i += 2) { |
|
if (sockets && !extra_sockets && (i == 4)) |
|
break; |
|
port = i365_base + 2*(i>>2); |
|
sock = (i & 3); |
|
id = identify(port, sock); |
|
if (id < 0) continue; |
|
|
|
for (j = ns = 0; j < 2; j++) { |
|
/* Does the socket exist? */ |
|
if ((ignore == i+j) || (identify(port, sock+j) < 0)) |
|
continue; |
|
/* Check for bad socket decode */ |
|
for (k = 0; k <= sockets; k++) |
|
i365_set(k, I365_MEM(0)+I365_W_OFF, k); |
|
for (k = 0; k <= sockets; k++) |
|
if (i365_get(k, I365_MEM(0)+I365_W_OFF) != k) |
|
break; |
|
if (k <= sockets) break; |
|
add_socket(port, sock+j, id); ns++; |
|
} |
|
if (ns != 0) add_pcic(ns, id); |
|
} |
|
} |
|
} |
|
|
|
/*====================================================================*/ |
|
|
|
static irqreturn_t pcic_interrupt(int irq, void *dev) |
|
{ |
|
int i, j, csc; |
|
u_int events, active; |
|
u_long flags = 0; |
|
int handled = 0; |
|
|
|
pr_debug("pcic_interrupt(%d)\n", irq); |
|
|
|
for (j = 0; j < 20; j++) { |
|
active = 0; |
|
for (i = 0; i < sockets; i++) { |
|
if (socket[i].cs_irq != irq) |
|
continue; |
|
handled = 1; |
|
ISA_LOCK(i, flags); |
|
csc = i365_get(i, I365_CSC); |
|
if ((csc == 0) || (i365_get(i, I365_IDENT) & 0x70)) { |
|
ISA_UNLOCK(i, flags); |
|
continue; |
|
} |
|
events = (csc & I365_CSC_DETECT) ? SS_DETECT : 0; |
|
|
|
if (i365_get(i, I365_INTCTL) & I365_PC_IOCARD) |
|
events |= (csc & I365_CSC_STSCHG) ? SS_STSCHG : 0; |
|
else { |
|
events |= (csc & I365_CSC_BVD1) ? SS_BATDEAD : 0; |
|
events |= (csc & I365_CSC_BVD2) ? SS_BATWARN : 0; |
|
events |= (csc & I365_CSC_READY) ? SS_READY : 0; |
|
} |
|
ISA_UNLOCK(i, flags); |
|
pr_debug("socket %d event 0x%02x\n", i, events); |
|
|
|
if (events) |
|
pcmcia_parse_events(&socket[i].socket, events); |
|
|
|
active |= events; |
|
} |
|
if (!active) break; |
|
} |
|
if (j == 20) |
|
printk(KERN_NOTICE "i82365: infinite loop in interrupt handler\n"); |
|
|
|
pr_debug("pcic_interrupt done\n"); |
|
return IRQ_RETVAL(handled); |
|
} /* pcic_interrupt */ |
|
|
|
static void pcic_interrupt_wrapper(struct timer_list *unused) |
|
{ |
|
pcic_interrupt(0, NULL); |
|
poll_timer.expires = jiffies + poll_interval; |
|
add_timer(&poll_timer); |
|
} |
|
|
|
/*====================================================================*/ |
|
|
|
static int i365_get_status(u_short sock, u_int *value) |
|
{ |
|
u_int status; |
|
|
|
status = i365_get(sock, I365_STATUS); |
|
*value = ((status & I365_CS_DETECT) == I365_CS_DETECT) |
|
? SS_DETECT : 0; |
|
|
|
if (i365_get(sock, I365_INTCTL) & I365_PC_IOCARD) |
|
*value |= (status & I365_CS_STSCHG) ? 0 : SS_STSCHG; |
|
else { |
|
*value |= (status & I365_CS_BVD1) ? 0 : SS_BATDEAD; |
|
*value |= (status & I365_CS_BVD2) ? 0 : SS_BATWARN; |
|
} |
|
*value |= (status & I365_CS_WRPROT) ? SS_WRPROT : 0; |
|
*value |= (status & I365_CS_READY) ? SS_READY : 0; |
|
*value |= (status & I365_CS_POWERON) ? SS_POWERON : 0; |
|
|
|
if (socket[sock].type == IS_VG469) { |
|
status = i365_get(sock, VG469_VSENSE); |
|
if (socket[sock].psock & 1) { |
|
*value |= (status & VG469_VSENSE_B_VS1) ? 0 : SS_3VCARD; |
|
*value |= (status & VG469_VSENSE_B_VS2) ? 0 : SS_XVCARD; |
|
} else { |
|
*value |= (status & VG469_VSENSE_A_VS1) ? 0 : SS_3VCARD; |
|
*value |= (status & VG469_VSENSE_A_VS2) ? 0 : SS_XVCARD; |
|
} |
|
} |
|
|
|
pr_debug("GetStatus(%d) = %#4.4x\n", sock, *value); |
|
return 0; |
|
} /* i365_get_status */ |
|
|
|
/*====================================================================*/ |
|
|
|
static int i365_set_socket(u_short sock, socket_state_t *state) |
|
{ |
|
struct i82365_socket *t = &socket[sock]; |
|
u_char reg; |
|
|
|
pr_debug("SetSocket(%d, flags %#3.3x, Vcc %d, Vpp %d, " |
|
"io_irq %d, csc_mask %#2.2x)\n", sock, state->flags, |
|
state->Vcc, state->Vpp, state->io_irq, state->csc_mask); |
|
|
|
/* First set global controller options */ |
|
set_bridge_state(sock); |
|
|
|
/* IO card, RESET flag, IO interrupt */ |
|
reg = t->intr; |
|
reg |= state->io_irq; |
|
reg |= (state->flags & SS_RESET) ? 0 : I365_PC_RESET; |
|
reg |= (state->flags & SS_IOCARD) ? I365_PC_IOCARD : 0; |
|
i365_set(sock, I365_INTCTL, reg); |
|
|
|
reg = I365_PWR_NORESET; |
|
if (state->flags & SS_PWR_AUTO) reg |= I365_PWR_AUTO; |
|
if (state->flags & SS_OUTPUT_ENA) reg |= I365_PWR_OUT; |
|
|
|
if (t->flags & IS_CIRRUS) { |
|
if (state->Vpp != 0) { |
|
if (state->Vpp == 120) |
|
reg |= I365_VPP1_12V; |
|
else if (state->Vpp == state->Vcc) |
|
reg |= I365_VPP1_5V; |
|
else return -EINVAL; |
|
} |
|
if (state->Vcc != 0) { |
|
reg |= I365_VCC_5V; |
|
if (state->Vcc == 33) |
|
i365_bset(sock, PD67_MISC_CTL_1, PD67_MC1_VCC_3V); |
|
else if (state->Vcc == 50) |
|
i365_bclr(sock, PD67_MISC_CTL_1, PD67_MC1_VCC_3V); |
|
else return -EINVAL; |
|
} |
|
} else if (t->flags & IS_VG_PWR) { |
|
if (state->Vpp != 0) { |
|
if (state->Vpp == 120) |
|
reg |= I365_VPP1_12V; |
|
else if (state->Vpp == state->Vcc) |
|
reg |= I365_VPP1_5V; |
|
else return -EINVAL; |
|
} |
|
if (state->Vcc != 0) { |
|
reg |= I365_VCC_5V; |
|
if (state->Vcc == 33) |
|
i365_bset(sock, VG469_VSELECT, VG469_VSEL_VCC); |
|
else if (state->Vcc == 50) |
|
i365_bclr(sock, VG469_VSELECT, VG469_VSEL_VCC); |
|
else return -EINVAL; |
|
} |
|
} else if (t->flags & IS_DF_PWR) { |
|
switch (state->Vcc) { |
|
case 0: break; |
|
case 33: reg |= I365_VCC_3V; break; |
|
case 50: reg |= I365_VCC_5V; break; |
|
default: return -EINVAL; |
|
} |
|
switch (state->Vpp) { |
|
case 0: break; |
|
case 50: reg |= I365_VPP1_5V; break; |
|
case 120: reg |= I365_VPP1_12V; break; |
|
default: return -EINVAL; |
|
} |
|
} else { |
|
switch (state->Vcc) { |
|
case 0: break; |
|
case 50: reg |= I365_VCC_5V; break; |
|
default: return -EINVAL; |
|
} |
|
switch (state->Vpp) { |
|
case 0: break; |
|
case 50: reg |= I365_VPP1_5V | I365_VPP2_5V; break; |
|
case 120: reg |= I365_VPP1_12V | I365_VPP2_12V; break; |
|
default: return -EINVAL; |
|
} |
|
} |
|
|
|
if (reg != i365_get(sock, I365_POWER)) |
|
i365_set(sock, I365_POWER, reg); |
|
|
|
/* Chipset-specific functions */ |
|
if (t->flags & IS_CIRRUS) { |
|
/* Speaker control */ |
|
i365_bflip(sock, PD67_MISC_CTL_1, PD67_MC1_SPKR_ENA, |
|
state->flags & SS_SPKR_ENA); |
|
} |
|
|
|
/* Card status change interrupt mask */ |
|
reg = t->cs_irq << 4; |
|
if (state->csc_mask & SS_DETECT) reg |= I365_CSC_DETECT; |
|
if (state->flags & SS_IOCARD) { |
|
if (state->csc_mask & SS_STSCHG) reg |= I365_CSC_STSCHG; |
|
} else { |
|
if (state->csc_mask & SS_BATDEAD) reg |= I365_CSC_BVD1; |
|
if (state->csc_mask & SS_BATWARN) reg |= I365_CSC_BVD2; |
|
if (state->csc_mask & SS_READY) reg |= I365_CSC_READY; |
|
} |
|
i365_set(sock, I365_CSCINT, reg); |
|
i365_get(sock, I365_CSC); |
|
|
|
return 0; |
|
} /* i365_set_socket */ |
|
|
|
/*====================================================================*/ |
|
|
|
static int i365_set_io_map(u_short sock, struct pccard_io_map *io) |
|
{ |
|
u_char map, ioctl; |
|
|
|
pr_debug("SetIOMap(%d, %d, %#2.2x, %d ns, " |
|
"%#llx-%#llx)\n", sock, io->map, io->flags, io->speed, |
|
(unsigned long long)io->start, (unsigned long long)io->stop); |
|
map = io->map; |
|
if ((map > 1) || (io->start > 0xffff) || (io->stop > 0xffff) || |
|
(io->stop < io->start)) return -EINVAL; |
|
/* Turn off the window before changing anything */ |
|
if (i365_get(sock, I365_ADDRWIN) & I365_ENA_IO(map)) |
|
i365_bclr(sock, I365_ADDRWIN, I365_ENA_IO(map)); |
|
i365_set_pair(sock, I365_IO(map)+I365_W_START, io->start); |
|
i365_set_pair(sock, I365_IO(map)+I365_W_STOP, io->stop); |
|
ioctl = i365_get(sock, I365_IOCTL) & ~I365_IOCTL_MASK(map); |
|
if (io->speed) ioctl |= I365_IOCTL_WAIT(map); |
|
if (io->flags & MAP_0WS) ioctl |= I365_IOCTL_0WS(map); |
|
if (io->flags & MAP_16BIT) ioctl |= I365_IOCTL_16BIT(map); |
|
if (io->flags & MAP_AUTOSZ) ioctl |= I365_IOCTL_IOCS16(map); |
|
i365_set(sock, I365_IOCTL, ioctl); |
|
/* Turn on the window if necessary */ |
|
if (io->flags & MAP_ACTIVE) |
|
i365_bset(sock, I365_ADDRWIN, I365_ENA_IO(map)); |
|
return 0; |
|
} /* i365_set_io_map */ |
|
|
|
/*====================================================================*/ |
|
|
|
static int i365_set_mem_map(u_short sock, struct pccard_mem_map *mem) |
|
{ |
|
u_short base, i; |
|
u_char map; |
|
|
|
pr_debug("SetMemMap(%d, %d, %#2.2x, %d ns, %#llx-%#llx, " |
|
"%#x)\n", sock, mem->map, mem->flags, mem->speed, |
|
(unsigned long long)mem->res->start, |
|
(unsigned long long)mem->res->end, mem->card_start); |
|
|
|
map = mem->map; |
|
if ((map > 4) || (mem->card_start > 0x3ffffff) || |
|
(mem->res->start > mem->res->end) || (mem->speed > 1000)) |
|
return -EINVAL; |
|
if ((mem->res->start > 0xffffff) || (mem->res->end > 0xffffff)) |
|
return -EINVAL; |
|
|
|
/* Turn off the window before changing anything */ |
|
if (i365_get(sock, I365_ADDRWIN) & I365_ENA_MEM(map)) |
|
i365_bclr(sock, I365_ADDRWIN, I365_ENA_MEM(map)); |
|
|
|
base = I365_MEM(map); |
|
i = (mem->res->start >> 12) & 0x0fff; |
|
if (mem->flags & MAP_16BIT) i |= I365_MEM_16BIT; |
|
if (mem->flags & MAP_0WS) i |= I365_MEM_0WS; |
|
i365_set_pair(sock, base+I365_W_START, i); |
|
|
|
i = (mem->res->end >> 12) & 0x0fff; |
|
switch (to_cycles(mem->speed)) { |
|
case 0: break; |
|
case 1: i |= I365_MEM_WS0; break; |
|
case 2: i |= I365_MEM_WS1; break; |
|
default: i |= I365_MEM_WS1 | I365_MEM_WS0; break; |
|
} |
|
i365_set_pair(sock, base+I365_W_STOP, i); |
|
|
|
i = ((mem->card_start - mem->res->start) >> 12) & 0x3fff; |
|
if (mem->flags & MAP_WRPROT) i |= I365_MEM_WRPROT; |
|
if (mem->flags & MAP_ATTRIB) i |= I365_MEM_REG; |
|
i365_set_pair(sock, base+I365_W_OFF, i); |
|
|
|
/* Turn on the window if necessary */ |
|
if (mem->flags & MAP_ACTIVE) |
|
i365_bset(sock, I365_ADDRWIN, I365_ENA_MEM(map)); |
|
return 0; |
|
} /* i365_set_mem_map */ |
|
|
|
#if 0 /* driver model ordering issue */ |
|
/*====================================================================== |
|
|
|
Routines for accessing socket information and register dumps via |
|
/sys/class/pcmcia_socket/... |
|
|
|
======================================================================*/ |
|
|
|
static ssize_t show_info(struct class_device *class_dev, char *buf) |
|
{ |
|
struct i82365_socket *s = container_of(class_dev, struct i82365_socket, socket.dev); |
|
return sprintf(buf, "type: %s\npsock: %d\n", |
|
pcic[s->type].name, s->psock); |
|
} |
|
|
|
static ssize_t show_exca(struct class_device *class_dev, char *buf) |
|
{ |
|
struct i82365_socket *s = container_of(class_dev, struct i82365_socket, socket.dev); |
|
unsigned short sock; |
|
int i; |
|
ssize_t ret = 0; |
|
unsigned long flags = 0; |
|
|
|
sock = s->number; |
|
|
|
ISA_LOCK(sock, flags); |
|
for (i = 0; i < 0x40; i += 4) { |
|
ret += sprintf(buf, "%02x %02x %02x %02x%s", |
|
i365_get(sock,i), i365_get(sock,i+1), |
|
i365_get(sock,i+2), i365_get(sock,i+3), |
|
((i % 16) == 12) ? "\n" : " "); |
|
buf += ret; |
|
} |
|
ISA_UNLOCK(sock, flags); |
|
|
|
return ret; |
|
} |
|
|
|
static CLASS_DEVICE_ATTR(exca, S_IRUGO, show_exca, NULL); |
|
static CLASS_DEVICE_ATTR(info, S_IRUGO, show_info, NULL); |
|
#endif |
|
|
|
/*====================================================================*/ |
|
|
|
/* this is horribly ugly... proper locking needs to be done here at |
|
* some time... */ |
|
#define LOCKED(x) do { \ |
|
int retval; \ |
|
unsigned long flags; \ |
|
spin_lock_irqsave(&isa_lock, flags); \ |
|
retval = x; \ |
|
spin_unlock_irqrestore(&isa_lock, flags); \ |
|
return retval; \ |
|
} while (0) |
|
|
|
|
|
static int pcic_get_status(struct pcmcia_socket *s, u_int *value) |
|
{ |
|
unsigned int sock = container_of(s, struct i82365_socket, socket)->number; |
|
|
|
if (socket[sock].flags & IS_ALIVE) { |
|
*value = 0; |
|
return -EINVAL; |
|
} |
|
|
|
LOCKED(i365_get_status(sock, value)); |
|
} |
|
|
|
static int pcic_set_socket(struct pcmcia_socket *s, socket_state_t *state) |
|
{ |
|
unsigned int sock = container_of(s, struct i82365_socket, socket)->number; |
|
|
|
if (socket[sock].flags & IS_ALIVE) |
|
return -EINVAL; |
|
|
|
LOCKED(i365_set_socket(sock, state)); |
|
} |
|
|
|
static int pcic_set_io_map(struct pcmcia_socket *s, struct pccard_io_map *io) |
|
{ |
|
unsigned int sock = container_of(s, struct i82365_socket, socket)->number; |
|
if (socket[sock].flags & IS_ALIVE) |
|
return -EINVAL; |
|
|
|
LOCKED(i365_set_io_map(sock, io)); |
|
} |
|
|
|
static int pcic_set_mem_map(struct pcmcia_socket *s, struct pccard_mem_map *mem) |
|
{ |
|
unsigned int sock = container_of(s, struct i82365_socket, socket)->number; |
|
if (socket[sock].flags & IS_ALIVE) |
|
return -EINVAL; |
|
|
|
LOCKED(i365_set_mem_map(sock, mem)); |
|
} |
|
|
|
static int pcic_init(struct pcmcia_socket *s) |
|
{ |
|
int i; |
|
struct resource res = { .start = 0, .end = 0x1000 }; |
|
pccard_io_map io = { 0, 0, 0, 0, 1 }; |
|
pccard_mem_map mem = { .res = &res, }; |
|
|
|
for (i = 0; i < 2; i++) { |
|
io.map = i; |
|
pcic_set_io_map(s, &io); |
|
} |
|
for (i = 0; i < 5; i++) { |
|
mem.map = i; |
|
pcic_set_mem_map(s, &mem); |
|
} |
|
return 0; |
|
} |
|
|
|
|
|
static struct pccard_operations pcic_operations = { |
|
.init = pcic_init, |
|
.get_status = pcic_get_status, |
|
.set_socket = pcic_set_socket, |
|
.set_io_map = pcic_set_io_map, |
|
.set_mem_map = pcic_set_mem_map, |
|
}; |
|
|
|
/*====================================================================*/ |
|
|
|
static struct platform_driver i82365_driver = { |
|
.driver = { |
|
.name = "i82365", |
|
}, |
|
}; |
|
|
|
static struct platform_device *i82365_device; |
|
|
|
static int __init init_i82365(void) |
|
{ |
|
int i, ret; |
|
|
|
ret = platform_driver_register(&i82365_driver); |
|
if (ret) |
|
goto err_out; |
|
|
|
i82365_device = platform_device_alloc("i82365", 0); |
|
if (i82365_device) { |
|
ret = platform_device_add(i82365_device); |
|
if (ret) |
|
platform_device_put(i82365_device); |
|
} else |
|
ret = -ENOMEM; |
|
|
|
if (ret) |
|
goto err_driver_unregister; |
|
|
|
printk(KERN_INFO "Intel ISA PCIC probe: "); |
|
sockets = 0; |
|
|
|
isa_probe(); |
|
|
|
if (sockets == 0) { |
|
printk("not found.\n"); |
|
ret = -ENODEV; |
|
goto err_dev_unregister; |
|
} |
|
|
|
/* Set up interrupt handler(s) */ |
|
if (grab_irq != 0) |
|
ret = request_irq(cs_irq, pcic_interrupt, 0, "i82365", pcic_interrupt); |
|
|
|
if (ret) |
|
goto err_socket_release; |
|
|
|
/* register sockets with the pcmcia core */ |
|
for (i = 0; i < sockets; i++) { |
|
socket[i].socket.dev.parent = &i82365_device->dev; |
|
socket[i].socket.ops = &pcic_operations; |
|
socket[i].socket.resource_ops = &pccard_nonstatic_ops; |
|
socket[i].socket.owner = THIS_MODULE; |
|
socket[i].number = i; |
|
ret = pcmcia_register_socket(&socket[i].socket); |
|
if (!ret) |
|
socket[i].flags |= IS_REGISTERED; |
|
} |
|
|
|
/* Finally, schedule a polling interrupt */ |
|
if (poll_interval != 0) { |
|
timer_setup(&poll_timer, pcic_interrupt_wrapper, 0); |
|
poll_timer.expires = jiffies + poll_interval; |
|
add_timer(&poll_timer); |
|
} |
|
|
|
return 0; |
|
err_socket_release: |
|
for (i = 0; i < sockets; i++) { |
|
/* Turn off all interrupt sources! */ |
|
i365_set(i, I365_CSCINT, 0); |
|
release_region(socket[i].ioaddr, 2); |
|
} |
|
err_dev_unregister: |
|
platform_device_unregister(i82365_device); |
|
release_region(i365_base, 2); |
|
#ifdef CONFIG_PNP |
|
if (i82365_pnpdev) |
|
pnp_disable_dev(i82365_pnpdev); |
|
#endif |
|
err_driver_unregister: |
|
platform_driver_unregister(&i82365_driver); |
|
err_out: |
|
return ret; |
|
} /* init_i82365 */ |
|
|
|
static void __exit exit_i82365(void) |
|
{ |
|
int i; |
|
|
|
for (i = 0; i < sockets; i++) { |
|
if (socket[i].flags & IS_REGISTERED) |
|
pcmcia_unregister_socket(&socket[i].socket); |
|
} |
|
platform_device_unregister(i82365_device); |
|
if (poll_interval != 0) |
|
del_timer_sync(&poll_timer); |
|
if (grab_irq != 0) |
|
free_irq(cs_irq, pcic_interrupt); |
|
for (i = 0; i < sockets; i++) { |
|
/* Turn off all interrupt sources! */ |
|
i365_set(i, I365_CSCINT, 0); |
|
release_region(socket[i].ioaddr, 2); |
|
} |
|
release_region(i365_base, 2); |
|
#ifdef CONFIG_PNP |
|
if (i82365_pnpdev) |
|
pnp_disable_dev(i82365_pnpdev); |
|
#endif |
|
platform_driver_unregister(&i82365_driver); |
|
} /* exit_i82365 */ |
|
|
|
module_init(init_i82365); |
|
module_exit(exit_i82365); |
|
MODULE_LICENSE("Dual MPL/GPL"); |
|
/*====================================================================*/
|
|
|