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327 lines
8.5 KiB
327 lines
8.5 KiB
// SPDX-License-Identifier: GPL-2.0-or-later |
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/* |
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* |
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* device driver for philips saa7134 based TV cards |
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* video4linux video interface |
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* |
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* (c) 2001,02 Gerd Knorr <[email protected]> [SuSE Labs] |
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*/ |
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#include "saa7134.h" |
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#include "saa7134-reg.h" |
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#include <linux/init.h> |
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#include <linux/list.h> |
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#include <linux/module.h> |
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#include <linux/kernel.h> |
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#include <linux/delay.h> |
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/* ------------------------------------------------------------------ */ |
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static unsigned int ts_debug; |
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module_param(ts_debug, int, 0644); |
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MODULE_PARM_DESC(ts_debug,"enable debug messages [ts]"); |
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#define ts_dbg(fmt, arg...) do { \ |
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if (ts_debug) \ |
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printk(KERN_DEBUG pr_fmt("ts: " fmt), ## arg); \ |
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} while (0) |
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/* ------------------------------------------------------------------ */ |
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static int buffer_activate(struct saa7134_dev *dev, |
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struct saa7134_buf *buf, |
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struct saa7134_buf *next) |
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{ |
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ts_dbg("buffer_activate [%p]", buf); |
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buf->top_seen = 0; |
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if (!dev->ts_started) |
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dev->ts_field = V4L2_FIELD_TOP; |
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if (NULL == next) |
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next = buf; |
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if (V4L2_FIELD_TOP == dev->ts_field) { |
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ts_dbg("- [top] buf=%p next=%p\n", buf, next); |
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saa_writel(SAA7134_RS_BA1(5),saa7134_buffer_base(buf)); |
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saa_writel(SAA7134_RS_BA2(5),saa7134_buffer_base(next)); |
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dev->ts_field = V4L2_FIELD_BOTTOM; |
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} else { |
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ts_dbg("- [bottom] buf=%p next=%p\n", buf, next); |
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saa_writel(SAA7134_RS_BA1(5),saa7134_buffer_base(next)); |
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saa_writel(SAA7134_RS_BA2(5),saa7134_buffer_base(buf)); |
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dev->ts_field = V4L2_FIELD_TOP; |
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} |
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/* start DMA */ |
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saa7134_set_dmabits(dev); |
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mod_timer(&dev->ts_q.timeout, jiffies+TS_BUFFER_TIMEOUT); |
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if (!dev->ts_started) |
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saa7134_ts_start(dev); |
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return 0; |
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} |
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int saa7134_ts_buffer_init(struct vb2_buffer *vb2) |
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{ |
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struct vb2_v4l2_buffer *vbuf = to_vb2_v4l2_buffer(vb2); |
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struct saa7134_dmaqueue *dmaq = vb2->vb2_queue->drv_priv; |
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struct saa7134_buf *buf = container_of(vbuf, struct saa7134_buf, vb2); |
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dmaq->curr = NULL; |
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buf->activate = buffer_activate; |
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return 0; |
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} |
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EXPORT_SYMBOL_GPL(saa7134_ts_buffer_init); |
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int saa7134_ts_buffer_prepare(struct vb2_buffer *vb2) |
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{ |
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struct vb2_v4l2_buffer *vbuf = to_vb2_v4l2_buffer(vb2); |
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struct saa7134_dmaqueue *dmaq = vb2->vb2_queue->drv_priv; |
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struct saa7134_dev *dev = dmaq->dev; |
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struct saa7134_buf *buf = container_of(vbuf, struct saa7134_buf, vb2); |
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struct sg_table *dma = vb2_dma_sg_plane_desc(vb2, 0); |
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unsigned int lines, llength, size; |
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ts_dbg("buffer_prepare [%p]\n", buf); |
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llength = TS_PACKET_SIZE; |
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lines = dev->ts.nr_packets; |
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size = lines * llength; |
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if (vb2_plane_size(vb2, 0) < size) |
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return -EINVAL; |
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vb2_set_plane_payload(vb2, 0, size); |
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vbuf->field = dev->field; |
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return saa7134_pgtable_build(dev->pci, &dmaq->pt, dma->sgl, dma->nents, |
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saa7134_buffer_startpage(buf)); |
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} |
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EXPORT_SYMBOL_GPL(saa7134_ts_buffer_prepare); |
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int saa7134_ts_queue_setup(struct vb2_queue *q, |
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unsigned int *nbuffers, unsigned int *nplanes, |
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unsigned int sizes[], struct device *alloc_devs[]) |
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{ |
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struct saa7134_dmaqueue *dmaq = q->drv_priv; |
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struct saa7134_dev *dev = dmaq->dev; |
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int size = TS_PACKET_SIZE * dev->ts.nr_packets; |
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if (0 == *nbuffers) |
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*nbuffers = dev->ts.nr_bufs; |
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*nbuffers = saa7134_buffer_count(size, *nbuffers); |
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if (*nbuffers < 3) |
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*nbuffers = 3; |
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*nplanes = 1; |
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sizes[0] = size; |
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return 0; |
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} |
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EXPORT_SYMBOL_GPL(saa7134_ts_queue_setup); |
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int saa7134_ts_start_streaming(struct vb2_queue *vq, unsigned int count) |
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{ |
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struct saa7134_dmaqueue *dmaq = vq->drv_priv; |
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struct saa7134_dev *dev = dmaq->dev; |
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/* |
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* Planar video capture and TS share the same DMA channel, |
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* so only one can be active at a time. |
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*/ |
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if (vb2_is_busy(&dev->video_vbq) && dev->fmt->planar) { |
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struct saa7134_buf *buf, *tmp; |
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list_for_each_entry_safe(buf, tmp, &dmaq->queue, entry) { |
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list_del(&buf->entry); |
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vb2_buffer_done(&buf->vb2.vb2_buf, |
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VB2_BUF_STATE_QUEUED); |
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} |
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if (dmaq->curr) { |
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vb2_buffer_done(&dmaq->curr->vb2.vb2_buf, |
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VB2_BUF_STATE_QUEUED); |
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dmaq->curr = NULL; |
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} |
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return -EBUSY; |
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} |
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dmaq->seq_nr = 0; |
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return 0; |
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} |
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EXPORT_SYMBOL_GPL(saa7134_ts_start_streaming); |
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void saa7134_ts_stop_streaming(struct vb2_queue *vq) |
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{ |
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struct saa7134_dmaqueue *dmaq = vq->drv_priv; |
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struct saa7134_dev *dev = dmaq->dev; |
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saa7134_ts_stop(dev); |
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saa7134_stop_streaming(dev, dmaq); |
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} |
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EXPORT_SYMBOL_GPL(saa7134_ts_stop_streaming); |
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struct vb2_ops saa7134_ts_qops = { |
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.queue_setup = saa7134_ts_queue_setup, |
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.buf_init = saa7134_ts_buffer_init, |
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.buf_prepare = saa7134_ts_buffer_prepare, |
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.buf_queue = saa7134_vb2_buffer_queue, |
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.wait_prepare = vb2_ops_wait_prepare, |
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.wait_finish = vb2_ops_wait_finish, |
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.stop_streaming = saa7134_ts_stop_streaming, |
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}; |
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EXPORT_SYMBOL_GPL(saa7134_ts_qops); |
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/* ----------------------------------------------------------- */ |
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/* exported stuff */ |
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static unsigned int tsbufs = 8; |
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module_param(tsbufs, int, 0444); |
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MODULE_PARM_DESC(tsbufs, "number of ts buffers for read/write IO, range 2-32"); |
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static unsigned int ts_nr_packets = 64; |
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module_param(ts_nr_packets, int, 0444); |
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MODULE_PARM_DESC(ts_nr_packets,"size of a ts buffers (in ts packets)"); |
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int saa7134_ts_init_hw(struct saa7134_dev *dev) |
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{ |
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/* deactivate TS softreset */ |
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saa_writeb(SAA7134_TS_SERIAL1, 0x00); |
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/* TSSOP high active, TSVAL high active, TSLOCK ignored */ |
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saa_writeb(SAA7134_TS_PARALLEL, 0x6c); |
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saa_writeb(SAA7134_TS_PARALLEL_SERIAL, (TS_PACKET_SIZE-1)); |
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saa_writeb(SAA7134_TS_DMA0, ((dev->ts.nr_packets-1)&0xff)); |
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saa_writeb(SAA7134_TS_DMA1, (((dev->ts.nr_packets-1)>>8)&0xff)); |
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/* TSNOPIT=0, TSCOLAP=0 */ |
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saa_writeb(SAA7134_TS_DMA2, |
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((((dev->ts.nr_packets-1)>>16)&0x3f) | 0x00)); |
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return 0; |
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} |
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int saa7134_ts_init1(struct saa7134_dev *dev) |
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{ |
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/* sanitycheck insmod options */ |
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if (tsbufs < 2) |
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tsbufs = 2; |
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if (tsbufs > VIDEO_MAX_FRAME) |
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tsbufs = VIDEO_MAX_FRAME; |
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if (ts_nr_packets < 4) |
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ts_nr_packets = 4; |
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if (ts_nr_packets > 312) |
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ts_nr_packets = 312; |
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dev->ts.nr_bufs = tsbufs; |
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dev->ts.nr_packets = ts_nr_packets; |
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INIT_LIST_HEAD(&dev->ts_q.queue); |
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timer_setup(&dev->ts_q.timeout, saa7134_buffer_timeout, 0); |
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dev->ts_q.dev = dev; |
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dev->ts_q.need_two = 1; |
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dev->ts_started = 0; |
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saa7134_pgtable_alloc(dev->pci, &dev->ts_q.pt); |
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/* init TS hw */ |
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saa7134_ts_init_hw(dev); |
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return 0; |
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} |
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/* Function for stop TS */ |
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int saa7134_ts_stop(struct saa7134_dev *dev) |
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{ |
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ts_dbg("TS stop\n"); |
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if (!dev->ts_started) |
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return 0; |
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/* Stop TS stream */ |
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switch (saa7134_boards[dev->board].ts_type) { |
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case SAA7134_MPEG_TS_PARALLEL: |
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saa_writeb(SAA7134_TS_PARALLEL, 0x6c); |
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dev->ts_started = 0; |
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break; |
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case SAA7134_MPEG_TS_SERIAL: |
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saa_writeb(SAA7134_TS_SERIAL0, 0x40); |
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dev->ts_started = 0; |
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break; |
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} |
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return 0; |
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} |
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/* Function for start TS */ |
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int saa7134_ts_start(struct saa7134_dev *dev) |
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{ |
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ts_dbg("TS start\n"); |
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if (WARN_ON(dev->ts_started)) |
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return 0; |
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/* dma: setup channel 5 (= TS) */ |
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saa_writeb(SAA7134_TS_DMA0, (dev->ts.nr_packets - 1) & 0xff); |
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saa_writeb(SAA7134_TS_DMA1, |
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((dev->ts.nr_packets - 1) >> 8) & 0xff); |
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/* TSNOPIT=0, TSCOLAP=0 */ |
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saa_writeb(SAA7134_TS_DMA2, |
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(((dev->ts.nr_packets - 1) >> 16) & 0x3f) | 0x00); |
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saa_writel(SAA7134_RS_PITCH(5), TS_PACKET_SIZE); |
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saa_writel(SAA7134_RS_CONTROL(5), SAA7134_RS_CONTROL_BURST_16 | |
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SAA7134_RS_CONTROL_ME | |
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(dev->ts_q.pt.dma >> 12)); |
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/* reset hardware TS buffers */ |
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saa_writeb(SAA7134_TS_SERIAL1, 0x00); |
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saa_writeb(SAA7134_TS_SERIAL1, 0x03); |
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saa_writeb(SAA7134_TS_SERIAL1, 0x00); |
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saa_writeb(SAA7134_TS_SERIAL1, 0x01); |
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/* TS clock non-inverted */ |
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saa_writeb(SAA7134_TS_SERIAL1, 0x00); |
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/* Start TS stream */ |
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switch (saa7134_boards[dev->board].ts_type) { |
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case SAA7134_MPEG_TS_PARALLEL: |
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saa_writeb(SAA7134_TS_SERIAL0, 0x40); |
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saa_writeb(SAA7134_TS_PARALLEL, 0xec | |
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(saa7134_boards[dev->board].ts_force_val << 4)); |
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break; |
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case SAA7134_MPEG_TS_SERIAL: |
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saa_writeb(SAA7134_TS_SERIAL0, 0xd8); |
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saa_writeb(SAA7134_TS_PARALLEL, 0x6c | |
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(saa7134_boards[dev->board].ts_force_val << 4)); |
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saa_writeb(SAA7134_TS_PARALLEL_SERIAL, 0xbc); |
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saa_writeb(SAA7134_TS_SERIAL1, 0x02); |
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break; |
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} |
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dev->ts_started = 1; |
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return 0; |
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} |
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int saa7134_ts_fini(struct saa7134_dev *dev) |
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{ |
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saa7134_pgtable_free(dev->pci, &dev->ts_q.pt); |
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return 0; |
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} |
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void saa7134_irq_ts_done(struct saa7134_dev *dev, unsigned long status) |
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{ |
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enum v4l2_field field; |
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spin_lock(&dev->slock); |
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if (dev->ts_q.curr) { |
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field = dev->ts_field; |
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if (field != V4L2_FIELD_TOP) { |
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if ((status & 0x100000) != 0x000000) |
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goto done; |
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} else { |
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if ((status & 0x100000) != 0x100000) |
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goto done; |
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} |
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saa7134_buffer_finish(dev, &dev->ts_q, VB2_BUF_STATE_DONE); |
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} |
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saa7134_buffer_next(dev,&dev->ts_q); |
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done: |
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spin_unlock(&dev->slock); |
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}
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