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548 lines
15 KiB
548 lines
15 KiB
/* SPDX-License-Identifier: GPL-2.0 */ |
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/* |
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* Driver for the MaxLinear MxL69x family of combo tuners/demods |
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* |
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* Copyright (C) 2020 Brad Love <[email protected]> |
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* |
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* based on code: |
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* Copyright (c) 2016 MaxLinear, Inc. All rights reserved |
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* which was released under GPL V2 |
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* |
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* This program is free software; you can redistribute it and/or |
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* modify it under the terms of the GNU General Public License |
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* version 2, as published by the Free Software Foundation. |
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* |
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* This program is distributed in the hope that it will be useful, |
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* but WITHOUT ANY WARRANTY; without even the implied warranty of |
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
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* GNU General Public License for more details. |
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*/ |
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/***************************************************************************** |
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* Defines |
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***************************************************************************** |
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*/ |
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#define MXL_EAGLE_HOST_MSG_HEADER_SIZE 8 |
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#define MXL_EAGLE_FW_MAX_SIZE_IN_KB 76 |
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#define MXL_EAGLE_QAM_FFE_TAPS_LENGTH 16 |
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#define MXL_EAGLE_QAM_SPUR_TAPS_LENGTH 32 |
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#define MXL_EAGLE_QAM_DFE_TAPS_LENGTH 72 |
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#define MXL_EAGLE_ATSC_FFE_TAPS_LENGTH 4096 |
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#define MXL_EAGLE_ATSC_DFE_TAPS_LENGTH 384 |
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#define MXL_EAGLE_VERSION_SIZE 5 /* A.B.C.D-RCx */ |
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#define MXL_EAGLE_FW_LOAD_TIME 50 |
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#define MXL_EAGLE_FW_MAX_SIZE_IN_KB 76 |
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#define MXL_EAGLE_FW_HEADER_SIZE 16 |
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#define MXL_EAGLE_FW_SEGMENT_HEADER_SIZE 8 |
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#define MXL_EAGLE_MAX_I2C_PACKET_SIZE 58 |
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#define MXL_EAGLE_I2C_MHEADER_SIZE 6 |
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#define MXL_EAGLE_I2C_PHEADER_SIZE 2 |
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/* Enum of Eagle family devices */ |
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enum MXL_EAGLE_DEVICE_E { |
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MXL_EAGLE_DEVICE_691 = 1, /* Device Mxl691 */ |
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MXL_EAGLE_DEVICE_248 = 2, /* Device Mxl248 */ |
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MXL_EAGLE_DEVICE_692 = 3, /* Device Mxl692 */ |
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MXL_EAGLE_DEVICE_MAX, /* No such device */ |
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}; |
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#define VER_A 1 |
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#define VER_B 1 |
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#define VER_C 1 |
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#define VER_D 3 |
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#define VER_E 6 |
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/* Enum of Host to Eagle I2C protocol opcodes */ |
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enum MXL_EAGLE_OPCODE_E { |
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/* DEVICE */ |
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MXL_EAGLE_OPCODE_DEVICE_DEMODULATOR_TYPE_SET, |
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MXL_EAGLE_OPCODE_DEVICE_MPEG_OUT_PARAMS_SET, |
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MXL_EAGLE_OPCODE_DEVICE_POWERMODE_SET, |
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MXL_EAGLE_OPCODE_DEVICE_GPIO_DIRECTION_SET, |
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MXL_EAGLE_OPCODE_DEVICE_GPO_LEVEL_SET, |
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MXL_EAGLE_OPCODE_DEVICE_INTR_MASK_SET, |
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MXL_EAGLE_OPCODE_DEVICE_IO_MUX_SET, |
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MXL_EAGLE_OPCODE_DEVICE_VERSION_GET, |
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MXL_EAGLE_OPCODE_DEVICE_STATUS_GET, |
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MXL_EAGLE_OPCODE_DEVICE_GPI_LEVEL_GET, |
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/* TUNER */ |
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MXL_EAGLE_OPCODE_TUNER_CHANNEL_TUNE_SET, |
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MXL_EAGLE_OPCODE_TUNER_LOCK_STATUS_GET, |
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MXL_EAGLE_OPCODE_TUNER_AGC_STATUS_GET, |
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/* ATSC */ |
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MXL_EAGLE_OPCODE_ATSC_INIT_SET, |
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MXL_EAGLE_OPCODE_ATSC_ACQUIRE_CARRIER_SET, |
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MXL_EAGLE_OPCODE_ATSC_STATUS_GET, |
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MXL_EAGLE_OPCODE_ATSC_ERROR_COUNTERS_GET, |
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MXL_EAGLE_OPCODE_ATSC_EQUALIZER_FILTER_DFE_TAPS_GET, |
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MXL_EAGLE_OPCODE_ATSC_EQUALIZER_FILTER_FFE_TAPS_GET, |
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/* QAM */ |
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MXL_EAGLE_OPCODE_QAM_PARAMS_SET, |
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MXL_EAGLE_OPCODE_QAM_RESTART_SET, |
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MXL_EAGLE_OPCODE_QAM_STATUS_GET, |
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MXL_EAGLE_OPCODE_QAM_ERROR_COUNTERS_GET, |
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MXL_EAGLE_OPCODE_QAM_CONSTELLATION_VALUE_GET, |
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MXL_EAGLE_OPCODE_QAM_EQUALIZER_FILTER_FFE_GET, |
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MXL_EAGLE_OPCODE_QAM_EQUALIZER_FILTER_SPUR_START_GET, |
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MXL_EAGLE_OPCODE_QAM_EQUALIZER_FILTER_SPUR_END_GET, |
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MXL_EAGLE_OPCODE_QAM_EQUALIZER_FILTER_DFE_TAPS_NUMBER_GET, |
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MXL_EAGLE_OPCODE_QAM_EQUALIZER_FILTER_DFE_START_GET, |
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MXL_EAGLE_OPCODE_QAM_EQUALIZER_FILTER_DFE_MIDDLE_GET, |
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MXL_EAGLE_OPCODE_QAM_EQUALIZER_FILTER_DFE_END_GET, |
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/* OOB */ |
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MXL_EAGLE_OPCODE_OOB_PARAMS_SET, |
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MXL_EAGLE_OPCODE_OOB_RESTART_SET, |
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MXL_EAGLE_OPCODE_OOB_ERROR_COUNTERS_GET, |
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MXL_EAGLE_OPCODE_OOB_STATUS_GET, |
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/* SMA */ |
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MXL_EAGLE_OPCODE_SMA_INIT_SET, |
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MXL_EAGLE_OPCODE_SMA_PARAMS_SET, |
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MXL_EAGLE_OPCODE_SMA_TRANSMIT_SET, |
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MXL_EAGLE_OPCODE_SMA_RECEIVE_GET, |
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/* DEBUG */ |
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MXL_EAGLE_OPCODE_INTERNAL, |
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MXL_EAGLE_OPCODE_MAX = 70, |
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}; |
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/* Enum of Host to Eagle I2C protocol opcodes */ |
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static const char * const MXL_EAGLE_OPCODE_STRING[] = { |
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/* DEVICE */ |
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"DEVICE_DEMODULATOR_TYPE_SET", |
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"DEVICE_MPEG_OUT_PARAMS_SET", |
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"DEVICE_POWERMODE_SET", |
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"DEVICE_GPIO_DIRECTION_SET", |
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"DEVICE_GPO_LEVEL_SET", |
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"DEVICE_INTR_MASK_SET", |
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"DEVICE_IO_MUX_SET", |
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"DEVICE_VERSION_GET", |
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"DEVICE_STATUS_GET", |
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"DEVICE_GPI_LEVEL_GET", |
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/* TUNER */ |
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"TUNER_CHANNEL_TUNE_SET", |
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"TUNER_LOCK_STATUS_GET", |
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"TUNER_AGC_STATUS_GET", |
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/* ATSC */ |
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"ATSC_INIT_SET", |
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"ATSC_ACQUIRE_CARRIER_SET", |
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"ATSC_STATUS_GET", |
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"ATSC_ERROR_COUNTERS_GET", |
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"ATSC_EQUALIZER_FILTER_DFE_TAPS_GET", |
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"ATSC_EQUALIZER_FILTER_FFE_TAPS_GET", |
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/* QAM */ |
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"QAM_PARAMS_SET", |
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"QAM_RESTART_SET", |
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"QAM_STATUS_GET", |
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"QAM_ERROR_COUNTERS_GET", |
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"QAM_CONSTELLATION_VALUE_GET", |
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"QAM_EQUALIZER_FILTER_FFE_GET", |
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"QAM_EQUALIZER_FILTER_SPUR_START_GET", |
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"QAM_EQUALIZER_FILTER_SPUR_END_GET", |
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"QAM_EQUALIZER_FILTER_DFE_TAPS_NUMBER_GET", |
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"QAM_EQUALIZER_FILTER_DFE_START_GET", |
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"QAM_EQUALIZER_FILTER_DFE_MIDDLE_GET", |
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"QAM_EQUALIZER_FILTER_DFE_END_GET", |
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/* OOB */ |
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"OOB_PARAMS_SET", |
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"OOB_RESTART_SET", |
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"OOB_ERROR_COUNTERS_GET", |
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"OOB_STATUS_GET", |
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/* SMA */ |
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"SMA_INIT_SET", |
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"SMA_PARAMS_SET", |
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"SMA_TRANSMIT_SET", |
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"SMA_RECEIVE_GET", |
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/* DEBUG */ |
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"INTERNAL", |
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}; |
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/* Enum of Callabck function types */ |
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enum MXL_EAGLE_CB_TYPE_E { |
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MXL_EAGLE_CB_FW_DOWNLOAD = 0, |
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}; |
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/* Enum of power supply types */ |
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enum MXL_EAGLE_POWER_SUPPLY_SOURCE_E { |
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MXL_EAGLE_POWER_SUPPLY_SOURCE_SINGLE, /* Single supply of 3.3V */ |
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MXL_EAGLE_POWER_SUPPLY_SOURCE_DUAL, /* Dual supply, 1.8V & 3.3V */ |
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}; |
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/* Enum of I/O pad drive modes */ |
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enum MXL_EAGLE_IO_MUX_DRIVE_MODE_E { |
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MXL_EAGLE_IO_MUX_DRIVE_MODE_1X, |
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MXL_EAGLE_IO_MUX_DRIVE_MODE_2X, |
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MXL_EAGLE_IO_MUX_DRIVE_MODE_3X, |
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MXL_EAGLE_IO_MUX_DRIVE_MODE_4X, |
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MXL_EAGLE_IO_MUX_DRIVE_MODE_5X, |
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MXL_EAGLE_IO_MUX_DRIVE_MODE_6X, |
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MXL_EAGLE_IO_MUX_DRIVE_MODE_7X, |
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MXL_EAGLE_IO_MUX_DRIVE_MODE_8X, |
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}; |
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/* Enum of demodulator types. Used for selection of demodulator |
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* type in relevant devices, e.g. ATSC vs. QAM in Mxl691 |
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*/ |
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enum MXL_EAGLE_DEMOD_TYPE_E { |
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MXL_EAGLE_DEMOD_TYPE_QAM, /* Mxl248 or Mxl692 */ |
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MXL_EAGLE_DEMOD_TYPE_OOB, /* Mxl248 only */ |
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MXL_EAGLE_DEMOD_TYPE_ATSC /* Mxl691 or Mxl692 */ |
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}; |
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/* Enum of power modes. Used for initial |
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* activation, or for activating sleep mode |
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*/ |
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enum MXL_EAGLE_POWER_MODE_E { |
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MXL_EAGLE_POWER_MODE_SLEEP, |
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MXL_EAGLE_POWER_MODE_ACTIVE |
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}; |
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/* Enum of GPIOs, used in device GPIO APIs */ |
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enum MXL_EAGLE_GPIO_NUMBER_E { |
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MXL_EAGLE_GPIO_NUMBER_0, |
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MXL_EAGLE_GPIO_NUMBER_1, |
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MXL_EAGLE_GPIO_NUMBER_2, |
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MXL_EAGLE_GPIO_NUMBER_3, |
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MXL_EAGLE_GPIO_NUMBER_4, |
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MXL_EAGLE_GPIO_NUMBER_5, |
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MXL_EAGLE_GPIO_NUMBER_6 |
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}; |
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/* Enum of GPIO directions, used in GPIO direction configuration API */ |
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enum MXL_EAGLE_GPIO_DIRECTION_E { |
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MXL_EAGLE_GPIO_DIRECTION_INPUT, |
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MXL_EAGLE_GPIO_DIRECTION_OUTPUT |
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}; |
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/* Enum of GPIO level, used in device GPIO APIs */ |
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enum MXL_EAGLE_GPIO_LEVEL_E { |
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MXL_EAGLE_GPIO_LEVEL_LOW, |
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MXL_EAGLE_GPIO_LEVEL_HIGH, |
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}; |
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/* Enum of I/O Mux function, used in device I/O mux configuration API */ |
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enum MXL_EAGLE_IOMUX_FUNCTION_E { |
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MXL_EAGLE_IOMUX_FUNC_FEC_LOCK, |
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MXL_EAGLE_IOMUX_FUNC_MERR, |
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}; |
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/* Enum of MPEG Data format, used in MPEG and OOB output configuration */ |
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enum MXL_EAGLE_MPEG_DATA_FORMAT_E { |
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MXL_EAGLE_DATA_SERIAL_LSB_1ST = 0, |
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MXL_EAGLE_DATA_SERIAL_MSB_1ST, |
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MXL_EAGLE_DATA_SYNC_WIDTH_BIT = 0, |
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MXL_EAGLE_DATA_SYNC_WIDTH_BYTE |
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}; |
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/* Enum of MPEG Clock format, used in MPEG and OOB output configuration */ |
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enum MXL_EAGLE_MPEG_CLOCK_FORMAT_E { |
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MXL_EAGLE_CLOCK_ACTIVE_HIGH = 0, |
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MXL_EAGLE_CLOCK_ACTIVE_LOW, |
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MXL_EAGLE_CLOCK_POSITIVE = 0, |
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MXL_EAGLE_CLOCK_NEGATIVE, |
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MXL_EAGLE_CLOCK_IN_PHASE = 0, |
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MXL_EAGLE_CLOCK_INVERTED, |
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}; |
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/* Enum of MPEG Clock speeds, used in MPEG output configuration */ |
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enum MXL_EAGLE_MPEG_CLOCK_RATE_E { |
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MXL_EAGLE_MPEG_CLOCK_54MHZ, |
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MXL_EAGLE_MPEG_CLOCK_40_5MHZ, |
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MXL_EAGLE_MPEG_CLOCK_27MHZ, |
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MXL_EAGLE_MPEG_CLOCK_13_5MHZ, |
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}; |
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/* Enum of Interrupt mask bit, used in host interrupt configuration */ |
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enum MXL_EAGLE_INTR_MASK_BITS_E { |
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MXL_EAGLE_INTR_MASK_DEMOD = 0, |
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MXL_EAGLE_INTR_MASK_SMA_RX = 1, |
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MXL_EAGLE_INTR_MASK_WDOG = 31 |
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}; |
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/* Enum of QAM Demodulator type, used in QAM configuration */ |
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enum MXL_EAGLE_QAM_DEMOD_ANNEX_TYPE_E { |
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MXL_EAGLE_QAM_DEMOD_ANNEX_B, /* J.83B */ |
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MXL_EAGLE_QAM_DEMOD_ANNEX_A, /* DVB-C */ |
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}; |
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/* Enum of QAM Demodulator modulation, used in QAM configuration and status */ |
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enum MXL_EAGLE_QAM_DEMOD_QAM_TYPE_E { |
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MXL_EAGLE_QAM_DEMOD_QAM16, |
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MXL_EAGLE_QAM_DEMOD_QAM64, |
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MXL_EAGLE_QAM_DEMOD_QAM256, |
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MXL_EAGLE_QAM_DEMOD_QAM1024, |
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MXL_EAGLE_QAM_DEMOD_QAM32, |
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MXL_EAGLE_QAM_DEMOD_QAM128, |
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MXL_EAGLE_QAM_DEMOD_QPSK, |
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MXL_EAGLE_QAM_DEMOD_AUTO, |
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}; |
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/* Enum of Demodulator IQ setup, used in QAM, OOB configuration and status */ |
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enum MXL_EAGLE_IQ_FLIP_E { |
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MXL_EAGLE_DEMOD_IQ_NORMAL, |
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MXL_EAGLE_DEMOD_IQ_FLIPPED, |
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MXL_EAGLE_DEMOD_IQ_AUTO, |
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}; |
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/* Enum of OOB Demodulator symbol rates, used in OOB configuration */ |
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enum MXL_EAGLE_OOB_DEMOD_SYMB_RATE_E { |
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MXL_EAGLE_OOB_DEMOD_SYMB_RATE_0_772MHZ, /* ANSI/SCTE 55-2 0.772 MHz */ |
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MXL_EAGLE_OOB_DEMOD_SYMB_RATE_1_024MHZ, /* ANSI/SCTE 55-1 1.024 MHz */ |
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MXL_EAGLE_OOB_DEMOD_SYMB_RATE_1_544MHZ, /* ANSI/SCTE 55-2 1.544 MHz */ |
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}; |
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/* Enum of tuner channel tuning mode */ |
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enum MXL_EAGLE_TUNER_CHANNEL_TUNE_MODE_E { |
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MXL_EAGLE_TUNER_CHANNEL_TUNE_MODE_VIEW, /* Normal "view" mode */ |
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MXL_EAGLE_TUNER_CHANNEL_TUNE_MODE_SCAN, /* Fast "scan" mode */ |
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}; |
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/* Enum of tuner bandwidth */ |
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enum MXL_EAGLE_TUNER_BW_E { |
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MXL_EAGLE_TUNER_BW_6MHZ, |
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MXL_EAGLE_TUNER_BW_7MHZ, |
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MXL_EAGLE_TUNER_BW_8MHZ, |
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}; |
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/* Enum of tuner bandwidth */ |
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enum MXL_EAGLE_JUNCTION_TEMPERATURE_E { |
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MXL_EAGLE_JUNCTION_TEMPERATURE_BELOW_0_CELSIUS = 0, |
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MXL_EAGLE_JUNCTION_TEMPERATURE_BETWEEN_0_TO_14_CELSIUS = 1, |
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MXL_EAGLE_JUNCTION_TEMPERATURE_BETWEEN_14_TO_28_CELSIUS = 3, |
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MXL_EAGLE_JUNCTION_TEMPERATURE_BETWEEN_28_TO_42_CELSIUS = 2, |
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MXL_EAGLE_JUNCTION_TEMPERATURE_BETWEEN_42_TO_57_CELSIUS = 6, |
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MXL_EAGLE_JUNCTION_TEMPERATURE_BETWEEN_57_TO_71_CELSIUS = 7, |
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MXL_EAGLE_JUNCTION_TEMPERATURE_BETWEEN_71_TO_85_CELSIUS = 5, |
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MXL_EAGLE_JUNCTION_TEMPERATURE_ABOVE_85_CELSIUS = 4, |
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}; |
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/* Struct passed in optional callback used during FW download */ |
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struct MXL_EAGLE_FW_DOWNLOAD_CB_PAYLOAD_T { |
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u32 total_len; |
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u32 downloaded_len; |
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}; |
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/* Struct used of I2C protocol between host and Eagle, internal use only */ |
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struct __packed MXL_EAGLE_HOST_MSG_HEADER_T { |
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u8 opcode; |
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u8 seqnum; |
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u8 payload_size; |
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u8 status; |
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u32 checksum; |
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}; |
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/* Device version information struct */ |
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struct __packed MXL_EAGLE_DEV_VER_T { |
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u8 chip_id; |
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u8 firmware_ver[MXL_EAGLE_VERSION_SIZE]; |
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u8 mxlware_ver[MXL_EAGLE_VERSION_SIZE]; |
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}; |
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/* Xtal configuration struct */ |
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struct __packed MXL_EAGLE_DEV_XTAL_T { |
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u8 xtal_cap; /* accepted range is 1..31 pF. Default is 26 */ |
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u8 clk_out_enable; |
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u8 clk_out_div_enable; /* clock out freq is xtal freq / 6 */ |
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u8 xtal_sharing_enable; /* if enabled set xtal_cap to 25 pF */ |
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u8 xtal_calibration_enable; /* enable for master, disable for slave */ |
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}; |
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/* GPIO direction struct, internally used in GPIO configuration API */ |
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struct __packed MXL_EAGLE_DEV_GPIO_DIRECTION_T { |
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u8 gpio_number; |
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u8 gpio_direction; |
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}; |
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/* GPO level struct, internally used in GPIO configuration API */ |
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struct __packed MXL_EAGLE_DEV_GPO_LEVEL_T { |
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u8 gpio_number; |
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u8 gpo_level; |
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}; |
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/* Device Status struct */ |
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struct MXL_EAGLE_DEV_STATUS_T { |
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u8 temperature; |
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u8 demod_type; |
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u8 power_mode; |
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u8 cpu_utilization_percent; |
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}; |
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/* Device interrupt configuration struct */ |
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struct __packed MXL_EAGLE_DEV_INTR_CFG_T { |
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u32 intr_mask; |
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u8 edge_trigger; |
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u8 positive_trigger; |
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u8 global_enable_interrupt; |
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}; |
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/* MPEG pad drive parameters, used on MPEG output configuration */ |
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/* See MXL_EAGLE_IO_MUX_DRIVE_MODE_E */ |
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struct MXL_EAGLE_MPEG_PAD_DRIVE_T { |
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u8 pad_drv_mpeg_syn; |
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u8 pad_drv_mpeg_dat; |
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u8 pad_drv_mpeg_val; |
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u8 pad_drv_mpeg_clk; |
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}; |
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/* MPEGOUT parameter struct, used in MPEG output configuration */ |
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struct MXL_EAGLE_MPEGOUT_PARAMS_T { |
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u8 mpeg_parallel; |
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u8 msb_first; |
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u8 mpeg_sync_pulse_width; /* See MXL_EAGLE_MPEG_DATA_FORMAT_E */ |
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u8 mpeg_valid_pol; |
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u8 mpeg_sync_pol; |
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u8 mpeg_clk_pol; |
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u8 mpeg3wire_mode_enable; |
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u8 mpeg_clk_freq; |
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struct MXL_EAGLE_MPEG_PAD_DRIVE_T mpeg_pad_drv; |
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}; |
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/* QAM Demodulator parameters struct, used in QAM params configuration */ |
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struct __packed MXL_EAGLE_QAM_DEMOD_PARAMS_T { |
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u8 annex_type; |
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u8 qam_type; |
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u8 iq_flip; |
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u8 search_range_idx; |
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u8 spur_canceller_enable; |
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u32 symbol_rate_hz; |
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u32 symbol_rate_256qam_hz; |
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}; |
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/* QAM Demodulator status */ |
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struct MXL_EAGLE_QAM_DEMOD_STATUS_T { |
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u8 annex_type; |
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u8 qam_type; |
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u8 iq_flip; |
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u8 interleaver_depth_i; |
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u8 interleaver_depth_j; |
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u8 qam_locked; |
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u8 fec_locked; |
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u8 mpeg_locked; |
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u16 snr_db_tenths; |
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s16 timing_offset; |
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s32 carrier_offset_hz; |
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}; |
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/* QAM Demodulator error counters */ |
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struct MXL_EAGLE_QAM_DEMOD_ERROR_COUNTERS_T { |
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u32 corrected_code_words; |
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u32 uncorrected_code_words; |
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u32 total_code_words_received; |
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u32 corrected_bits; |
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u32 error_mpeg_frames; |
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u32 mpeg_frames_received; |
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u32 erasures; |
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}; |
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/* QAM Demodulator constellation point */ |
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struct MXL_EAGLE_QAM_DEMOD_CONSTELLATION_VAL_T { |
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s16 i_value[12]; |
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s16 q_value[12]; |
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}; |
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/* QAM Demodulator equalizer filter taps */ |
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struct MXL_EAGLE_QAM_DEMOD_EQU_FILTER_T { |
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s16 ffe_taps[MXL_EAGLE_QAM_FFE_TAPS_LENGTH]; |
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s16 spur_taps[MXL_EAGLE_QAM_SPUR_TAPS_LENGTH]; |
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s16 dfe_taps[MXL_EAGLE_QAM_DFE_TAPS_LENGTH]; |
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u8 ffe_leading_tap_index; |
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u8 dfe_taps_number; |
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}; |
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/* OOB Demodulator parameters struct, used in OOB params configuration */ |
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struct __packed MXL_EAGLE_OOB_DEMOD_PARAMS_T { |
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u8 symbol_rate; |
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u8 iq_flip; |
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u8 clk_pol; |
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}; |
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|
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/* OOB Demodulator error counters */ |
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struct MXL_EAGLE_OOB_DEMOD_ERROR_COUNTERS_T { |
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u32 corrected_packets; |
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u32 uncorrected_packets; |
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u32 total_packets_received; |
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}; |
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|
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/* OOB status */ |
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struct __packed MXL_EAGLE_OOB_DEMOD_STATUS_T { |
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u16 snr_db_tenths; |
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s16 timing_offset; |
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s32 carrier_offsetHz; |
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u8 qam_locked; |
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u8 fec_locked; |
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u8 mpeg_locked; |
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u8 retune_required; |
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u8 iq_flip; |
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}; |
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|
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/* ATSC Demodulator status */ |
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struct __packed MXL_EAGLE_ATSC_DEMOD_STATUS_T { |
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s16 snr_db_tenths; |
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s16 timing_offset; |
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s32 carrier_offset_hz; |
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u8 frame_lock; |
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u8 atsc_lock; |
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u8 fec_lock; |
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}; |
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|
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/* ATSC Demodulator error counters */ |
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struct MXL_EAGLE_ATSC_DEMOD_ERROR_COUNTERS_T { |
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u32 error_packets; |
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u32 total_packets; |
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u32 error_bytes; |
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}; |
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|
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/* ATSC Demodulator equalizers filter taps */ |
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struct __packed MXL_EAGLE_ATSC_DEMOD_EQU_FILTER_T { |
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s16 ffe_taps[MXL_EAGLE_ATSC_FFE_TAPS_LENGTH]; |
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s8 dfe_taps[MXL_EAGLE_ATSC_DFE_TAPS_LENGTH]; |
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}; |
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|
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/* Tuner AGC Status */ |
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struct __packed MXL_EAGLE_TUNER_AGC_STATUS_T { |
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u8 locked; |
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u16 raw_agc_gain; /* AGC gain [dB] = rawAgcGain / 2^6 */ |
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s16 rx_power_db_hundredths; |
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}; |
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|
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/* Tuner channel tune parameters */ |
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struct __packed MXL_EAGLE_TUNER_CHANNEL_PARAMS_T { |
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u32 freq_hz; |
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u8 tune_mode; |
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u8 bandwidth; |
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}; |
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|
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/* Tuner channel lock indications */ |
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struct __packed MXL_EAGLE_TUNER_LOCK_STATUS_T { |
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u8 rf_pll_locked; |
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u8 ref_pll_locked; |
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}; |
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|
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/* Smart antenna parameters used in Smart antenna params configuration */ |
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struct __packed MXL_EAGLE_SMA_PARAMS_T { |
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u8 full_duplex_enable; |
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u8 rx_disable; |
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u8 idle_logic_high; |
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}; |
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|
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/* Smart antenna message format */ |
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struct __packed MXL_EAGLE_SMA_MESSAGE_T { |
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u32 payload_bits; |
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u8 total_num_bits; |
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}; |
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