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419 lines
11 KiB
419 lines
11 KiB
// SPDX-License-Identifier: GPL-2.0-only |
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/* |
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* STMicroelectronics ConneXt (STA2X11) GPIO driver |
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* |
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* Copyright 2012 ST Microelectronics (Alessandro Rubini) |
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* Based on gpio-ml-ioh.c, Copyright 2010 OKI Semiconductors Ltd. |
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* Also based on previous sta2x11 work, Copyright 2011 Wind River Systems, Inc. |
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*/ |
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#include <linux/init.h> |
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#include <linux/kernel.h> |
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#include <linux/slab.h> |
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#include <linux/gpio/driver.h> |
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#include <linux/bitops.h> |
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#include <linux/interrupt.h> |
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#include <linux/irq.h> |
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#include <linux/pci.h> |
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#include <linux/platform_device.h> |
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#include <linux/mfd/sta2x11-mfd.h> |
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struct gsta_regs { |
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u32 dat; /* 0x00 */ |
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u32 dats; |
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u32 datc; |
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u32 pdis; |
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u32 dir; /* 0x10 */ |
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u32 dirs; |
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u32 dirc; |
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u32 unused_1c; |
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u32 afsela; /* 0x20 */ |
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u32 unused_24[7]; |
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u32 rimsc; /* 0x40 */ |
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u32 fimsc; |
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u32 is; |
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u32 ic; |
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}; |
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struct gsta_gpio { |
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spinlock_t lock; |
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struct device *dev; |
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void __iomem *reg_base; |
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struct gsta_regs __iomem *regs[GSTA_NR_BLOCKS]; |
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struct gpio_chip gpio; |
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int irq_base; |
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/* FIXME: save the whole config here (AF, ...) */ |
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unsigned irq_type[GSTA_NR_GPIO]; |
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}; |
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/* |
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* gpio methods |
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*/ |
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static void gsta_gpio_set(struct gpio_chip *gpio, unsigned nr, int val) |
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{ |
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struct gsta_gpio *chip = gpiochip_get_data(gpio); |
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struct gsta_regs __iomem *regs = chip->regs[nr / GSTA_GPIO_PER_BLOCK]; |
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u32 bit = BIT(nr % GSTA_GPIO_PER_BLOCK); |
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if (val) |
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writel(bit, ®s->dats); |
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else |
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writel(bit, ®s->datc); |
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} |
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static int gsta_gpio_get(struct gpio_chip *gpio, unsigned nr) |
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{ |
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struct gsta_gpio *chip = gpiochip_get_data(gpio); |
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struct gsta_regs __iomem *regs = chip->regs[nr / GSTA_GPIO_PER_BLOCK]; |
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u32 bit = BIT(nr % GSTA_GPIO_PER_BLOCK); |
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return !!(readl(®s->dat) & bit); |
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} |
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static int gsta_gpio_direction_output(struct gpio_chip *gpio, unsigned nr, |
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int val) |
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{ |
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struct gsta_gpio *chip = gpiochip_get_data(gpio); |
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struct gsta_regs __iomem *regs = chip->regs[nr / GSTA_GPIO_PER_BLOCK]; |
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u32 bit = BIT(nr % GSTA_GPIO_PER_BLOCK); |
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writel(bit, ®s->dirs); |
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/* Data register after direction, otherwise pullup/down is selected */ |
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if (val) |
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writel(bit, ®s->dats); |
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else |
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writel(bit, ®s->datc); |
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return 0; |
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} |
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static int gsta_gpio_direction_input(struct gpio_chip *gpio, unsigned nr) |
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{ |
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struct gsta_gpio *chip = gpiochip_get_data(gpio); |
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struct gsta_regs __iomem *regs = chip->regs[nr / GSTA_GPIO_PER_BLOCK]; |
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u32 bit = BIT(nr % GSTA_GPIO_PER_BLOCK); |
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writel(bit, ®s->dirc); |
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return 0; |
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} |
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static int gsta_gpio_to_irq(struct gpio_chip *gpio, unsigned offset) |
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{ |
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struct gsta_gpio *chip = gpiochip_get_data(gpio); |
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return chip->irq_base + offset; |
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} |
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static void gsta_gpio_setup(struct gsta_gpio *chip) /* called from probe */ |
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{ |
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struct gpio_chip *gpio = &chip->gpio; |
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/* |
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* ARCH_NR_GPIOS is currently 256 and dynamic allocation starts |
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* from the end. However, for compatibility, we need the first |
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* ConneXt device to start from gpio 0: it's the main chipset |
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* on most boards so documents and drivers assume gpio0..gpio127 |
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*/ |
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static int gpio_base; |
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gpio->label = dev_name(chip->dev); |
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gpio->owner = THIS_MODULE; |
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gpio->direction_input = gsta_gpio_direction_input; |
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gpio->get = gsta_gpio_get; |
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gpio->direction_output = gsta_gpio_direction_output; |
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gpio->set = gsta_gpio_set; |
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gpio->dbg_show = NULL; |
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gpio->base = gpio_base; |
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gpio->ngpio = GSTA_NR_GPIO; |
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gpio->can_sleep = false; |
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gpio->to_irq = gsta_gpio_to_irq; |
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/* |
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* After the first device, turn to dynamic gpio numbers. |
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* For example, with ARCH_NR_GPIOS = 256 we can fit two cards |
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*/ |
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if (!gpio_base) |
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gpio_base = -1; |
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} |
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/* |
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* Special method: alternate functions and pullup/pulldown. This is only |
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* invoked on startup to configure gpio's according to platform data. |
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* FIXME : this functionality shall be managed (and exported to other drivers) |
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* via the pin control subsystem. |
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*/ |
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static void gsta_set_config(struct gsta_gpio *chip, int nr, unsigned cfg) |
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{ |
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struct gsta_regs __iomem *regs = chip->regs[nr / GSTA_GPIO_PER_BLOCK]; |
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unsigned long flags; |
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u32 bit = BIT(nr % GSTA_GPIO_PER_BLOCK); |
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u32 val; |
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int err = 0; |
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pr_info("%s: %p %i %i\n", __func__, chip, nr, cfg); |
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if (cfg == PINMUX_TYPE_NONE) |
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return; |
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/* Alternate function or not? */ |
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spin_lock_irqsave(&chip->lock, flags); |
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val = readl(®s->afsela); |
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if (cfg == PINMUX_TYPE_FUNCTION) |
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val |= bit; |
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else |
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val &= ~bit; |
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writel(val | bit, ®s->afsela); |
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if (cfg == PINMUX_TYPE_FUNCTION) { |
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spin_unlock_irqrestore(&chip->lock, flags); |
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return; |
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} |
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/* not alternate function: set details */ |
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switch (cfg) { |
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case PINMUX_TYPE_OUTPUT_LOW: |
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writel(bit, ®s->dirs); |
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writel(bit, ®s->datc); |
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break; |
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case PINMUX_TYPE_OUTPUT_HIGH: |
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writel(bit, ®s->dirs); |
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writel(bit, ®s->dats); |
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break; |
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case PINMUX_TYPE_INPUT: |
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writel(bit, ®s->dirc); |
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val = readl(®s->pdis) | bit; |
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writel(val, ®s->pdis); |
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break; |
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case PINMUX_TYPE_INPUT_PULLUP: |
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writel(bit, ®s->dirc); |
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val = readl(®s->pdis) & ~bit; |
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writel(val, ®s->pdis); |
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writel(bit, ®s->dats); |
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break; |
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case PINMUX_TYPE_INPUT_PULLDOWN: |
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writel(bit, ®s->dirc); |
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val = readl(®s->pdis) & ~bit; |
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writel(val, ®s->pdis); |
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writel(bit, ®s->datc); |
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break; |
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default: |
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err = 1; |
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} |
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spin_unlock_irqrestore(&chip->lock, flags); |
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if (err) |
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pr_err("%s: chip %p, pin %i, cfg %i is invalid\n", |
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__func__, chip, nr, cfg); |
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} |
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/* |
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* Irq methods |
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*/ |
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static void gsta_irq_disable(struct irq_data *data) |
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{ |
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struct irq_chip_generic *gc = irq_data_get_irq_chip_data(data); |
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struct gsta_gpio *chip = gc->private; |
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int nr = data->irq - chip->irq_base; |
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struct gsta_regs __iomem *regs = chip->regs[nr / GSTA_GPIO_PER_BLOCK]; |
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u32 bit = BIT(nr % GSTA_GPIO_PER_BLOCK); |
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u32 val; |
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unsigned long flags; |
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spin_lock_irqsave(&chip->lock, flags); |
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if (chip->irq_type[nr] & IRQ_TYPE_EDGE_RISING) { |
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val = readl(®s->rimsc) & ~bit; |
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writel(val, ®s->rimsc); |
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} |
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if (chip->irq_type[nr] & IRQ_TYPE_EDGE_FALLING) { |
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val = readl(®s->fimsc) & ~bit; |
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writel(val, ®s->fimsc); |
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} |
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spin_unlock_irqrestore(&chip->lock, flags); |
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return; |
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} |
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static void gsta_irq_enable(struct irq_data *data) |
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{ |
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struct irq_chip_generic *gc = irq_data_get_irq_chip_data(data); |
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struct gsta_gpio *chip = gc->private; |
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int nr = data->irq - chip->irq_base; |
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struct gsta_regs __iomem *regs = chip->regs[nr / GSTA_GPIO_PER_BLOCK]; |
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u32 bit = BIT(nr % GSTA_GPIO_PER_BLOCK); |
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u32 val; |
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int type; |
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unsigned long flags; |
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type = chip->irq_type[nr]; |
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spin_lock_irqsave(&chip->lock, flags); |
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val = readl(®s->rimsc); |
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if (type & IRQ_TYPE_EDGE_RISING) |
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writel(val | bit, ®s->rimsc); |
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else |
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writel(val & ~bit, ®s->rimsc); |
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val = readl(®s->rimsc); |
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if (type & IRQ_TYPE_EDGE_FALLING) |
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writel(val | bit, ®s->fimsc); |
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else |
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writel(val & ~bit, ®s->fimsc); |
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spin_unlock_irqrestore(&chip->lock, flags); |
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return; |
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} |
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static int gsta_irq_type(struct irq_data *d, unsigned int type) |
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{ |
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struct irq_chip_generic *gc = irq_data_get_irq_chip_data(d); |
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struct gsta_gpio *chip = gc->private; |
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int nr = d->irq - chip->irq_base; |
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/* We only support edge interrupts */ |
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if (!(type & (IRQ_TYPE_EDGE_RISING | IRQ_TYPE_EDGE_FALLING))) { |
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pr_debug("%s: unsupported type 0x%x\n", __func__, type); |
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return -EINVAL; |
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} |
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chip->irq_type[nr] = type; /* used for enable/disable */ |
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gsta_irq_enable(d); |
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return 0; |
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} |
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static irqreturn_t gsta_gpio_handler(int irq, void *dev_id) |
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{ |
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struct gsta_gpio *chip = dev_id; |
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struct gsta_regs __iomem *regs; |
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u32 is; |
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int i, nr, base; |
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irqreturn_t ret = IRQ_NONE; |
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for (i = 0; i < GSTA_NR_BLOCKS; i++) { |
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regs = chip->regs[i]; |
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base = chip->irq_base + i * GSTA_GPIO_PER_BLOCK; |
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while ((is = readl(®s->is))) { |
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nr = __ffs(is); |
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irq = base + nr; |
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generic_handle_irq(irq); |
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writel(1 << nr, ®s->ic); |
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ret = IRQ_HANDLED; |
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} |
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} |
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return ret; |
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} |
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static int gsta_alloc_irq_chip(struct gsta_gpio *chip) |
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{ |
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struct irq_chip_generic *gc; |
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struct irq_chip_type *ct; |
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int rv; |
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gc = devm_irq_alloc_generic_chip(chip->dev, KBUILD_MODNAME, 1, |
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chip->irq_base, |
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chip->reg_base, handle_simple_irq); |
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if (!gc) |
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return -ENOMEM; |
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gc->private = chip; |
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ct = gc->chip_types; |
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ct->chip.irq_set_type = gsta_irq_type; |
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ct->chip.irq_disable = gsta_irq_disable; |
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ct->chip.irq_enable = gsta_irq_enable; |
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/* FIXME: this makes at most 32 interrupts. Request 0 by now */ |
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rv = devm_irq_setup_generic_chip(chip->dev, gc, |
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0 /* IRQ_MSK(GSTA_GPIO_PER_BLOCK) */, |
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0, IRQ_NOREQUEST | IRQ_NOPROBE, 0); |
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if (rv) |
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return rv; |
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/* Set up all all 128 interrupts: code from setup_generic_chip */ |
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{ |
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struct irq_chip_type *ct = gc->chip_types; |
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int i, j; |
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for (j = 0; j < GSTA_NR_GPIO; j++) { |
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i = chip->irq_base + j; |
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irq_set_chip_and_handler(i, &ct->chip, ct->handler); |
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irq_set_chip_data(i, gc); |
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irq_clear_status_flags(i, IRQ_NOREQUEST | IRQ_NOPROBE); |
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} |
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gc->irq_cnt = i - gc->irq_base; |
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} |
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return 0; |
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} |
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/* The platform device used here is instantiated by the MFD device */ |
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static int gsta_probe(struct platform_device *dev) |
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{ |
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int i, err; |
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struct pci_dev *pdev; |
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struct sta2x11_gpio_pdata *gpio_pdata; |
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struct gsta_gpio *chip; |
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pdev = *(struct pci_dev **)dev_get_platdata(&dev->dev); |
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gpio_pdata = dev_get_platdata(&pdev->dev); |
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if (gpio_pdata == NULL) |
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dev_err(&dev->dev, "no gpio config\n"); |
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pr_debug("gpio config: %p\n", gpio_pdata); |
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chip = devm_kzalloc(&dev->dev, sizeof(*chip), GFP_KERNEL); |
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if (!chip) |
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return -ENOMEM; |
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chip->dev = &dev->dev; |
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chip->reg_base = devm_platform_ioremap_resource(dev, 0); |
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if (IS_ERR(chip->reg_base)) |
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return PTR_ERR(chip->reg_base); |
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for (i = 0; i < GSTA_NR_BLOCKS; i++) { |
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chip->regs[i] = chip->reg_base + i * 4096; |
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/* disable all irqs */ |
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writel(0, &chip->regs[i]->rimsc); |
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writel(0, &chip->regs[i]->fimsc); |
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writel(~0, &chip->regs[i]->ic); |
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} |
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spin_lock_init(&chip->lock); |
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gsta_gpio_setup(chip); |
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if (gpio_pdata) |
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for (i = 0; i < GSTA_NR_GPIO; i++) |
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gsta_set_config(chip, i, gpio_pdata->pinconfig[i]); |
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/* 384 was used in previous code: be compatible for other drivers */ |
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err = devm_irq_alloc_descs(&dev->dev, -1, 384, |
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GSTA_NR_GPIO, NUMA_NO_NODE); |
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if (err < 0) { |
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dev_warn(&dev->dev, "sta2x11 gpio: Can't get irq base (%i)\n", |
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-err); |
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return err; |
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} |
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chip->irq_base = err; |
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err = gsta_alloc_irq_chip(chip); |
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if (err) |
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return err; |
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err = devm_request_irq(&dev->dev, pdev->irq, gsta_gpio_handler, |
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IRQF_SHARED, KBUILD_MODNAME, chip); |
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if (err < 0) { |
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dev_err(&dev->dev, "sta2x11 gpio: Can't request irq (%i)\n", |
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-err); |
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return err; |
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} |
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err = devm_gpiochip_add_data(&dev->dev, &chip->gpio, chip); |
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if (err < 0) { |
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dev_err(&dev->dev, "sta2x11 gpio: Can't register (%i)\n", |
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-err); |
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return err; |
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} |
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platform_set_drvdata(dev, chip); |
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return 0; |
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} |
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static struct platform_driver sta2x11_gpio_platform_driver = { |
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.driver = { |
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.name = "sta2x11-gpio", |
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.suppress_bind_attrs = true, |
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}, |
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.probe = gsta_probe, |
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}; |
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builtin_platform_driver(sta2x11_gpio_platform_driver);
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