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189 lines
4.3 KiB
189 lines
4.3 KiB
// SPDX-License-Identifier: GPL-2.0+ |
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// |
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// Synopsys CREG (Control REGisters) GPIO driver |
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// |
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// Copyright (C) 2018 Synopsys |
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// Author: Eugeniy Paltsev <[email protected]> |
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#include <linux/gpio/driver.h> |
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#include <linux/io.h> |
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#include <linux/of.h> |
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#include <linux/of_platform.h> |
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#define MAX_GPIO 32 |
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struct creg_layout { |
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u8 ngpio; |
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u8 shift[MAX_GPIO]; |
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u8 on[MAX_GPIO]; |
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u8 off[MAX_GPIO]; |
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u8 bit_per_gpio[MAX_GPIO]; |
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}; |
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struct creg_gpio { |
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struct gpio_chip gc; |
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void __iomem *regs; |
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spinlock_t lock; |
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const struct creg_layout *layout; |
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}; |
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static void creg_gpio_set(struct gpio_chip *gc, unsigned int offset, int val) |
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{ |
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struct creg_gpio *hcg = gpiochip_get_data(gc); |
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const struct creg_layout *layout = hcg->layout; |
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u32 reg, reg_shift, value; |
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unsigned long flags; |
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int i; |
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value = val ? hcg->layout->on[offset] : hcg->layout->off[offset]; |
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reg_shift = layout->shift[offset]; |
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for (i = 0; i < offset; i++) |
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reg_shift += layout->bit_per_gpio[i] + layout->shift[i]; |
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spin_lock_irqsave(&hcg->lock, flags); |
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reg = readl(hcg->regs); |
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reg &= ~(GENMASK(layout->bit_per_gpio[i] - 1, 0) << reg_shift); |
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reg |= (value << reg_shift); |
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writel(reg, hcg->regs); |
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spin_unlock_irqrestore(&hcg->lock, flags); |
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} |
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static int creg_gpio_dir_out(struct gpio_chip *gc, unsigned int offset, int val) |
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{ |
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creg_gpio_set(gc, offset, val); |
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return 0; |
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} |
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static int creg_gpio_validate_pg(struct device *dev, struct creg_gpio *hcg, |
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int i) |
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{ |
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const struct creg_layout *layout = hcg->layout; |
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if (layout->bit_per_gpio[i] < 1 || layout->bit_per_gpio[i] > 8) |
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return -EINVAL; |
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/* Check that on value fits its placeholder */ |
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if (GENMASK(31, layout->bit_per_gpio[i]) & layout->on[i]) |
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return -EINVAL; |
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/* Check that off value fits its placeholder */ |
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if (GENMASK(31, layout->bit_per_gpio[i]) & layout->off[i]) |
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return -EINVAL; |
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if (layout->on[i] == layout->off[i]) |
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return -EINVAL; |
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return 0; |
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} |
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static int creg_gpio_validate(struct device *dev, struct creg_gpio *hcg, |
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u32 ngpios) |
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{ |
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u32 reg_len = 0; |
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int i; |
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if (hcg->layout->ngpio < 1 || hcg->layout->ngpio > MAX_GPIO) |
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return -EINVAL; |
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if (ngpios < 1 || ngpios > hcg->layout->ngpio) { |
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dev_err(dev, "ngpios must be in [1:%u]\n", hcg->layout->ngpio); |
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return -EINVAL; |
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} |
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for (i = 0; i < hcg->layout->ngpio; i++) { |
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if (creg_gpio_validate_pg(dev, hcg, i)) |
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return -EINVAL; |
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reg_len += hcg->layout->shift[i] + hcg->layout->bit_per_gpio[i]; |
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} |
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/* Check that we fit in 32 bit register */ |
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if (reg_len > 32) |
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return -EINVAL; |
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return 0; |
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} |
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static const struct creg_layout hsdk_cs_ctl = { |
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.ngpio = 10, |
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.shift = { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, |
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.off = { 2, 2, 2, 2, 2, 2, 2, 2, 2, 2 }, |
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.on = { 3, 3, 3, 3, 3, 3, 3, 3, 3, 3 }, |
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.bit_per_gpio = { 2, 2, 2, 2, 2, 2, 2, 2, 2, 2 } |
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}; |
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static const struct creg_layout axs10x_flsh_cs_ctl = { |
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.ngpio = 1, |
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.shift = { 0 }, |
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.off = { 1 }, |
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.on = { 3 }, |
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.bit_per_gpio = { 2 } |
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}; |
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static const struct of_device_id creg_gpio_ids[] = { |
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{ |
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.compatible = "snps,creg-gpio-axs10x", |
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.data = &axs10x_flsh_cs_ctl |
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}, { |
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.compatible = "snps,creg-gpio-hsdk", |
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.data = &hsdk_cs_ctl |
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}, { /* sentinel */ } |
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}; |
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static int creg_gpio_probe(struct platform_device *pdev) |
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{ |
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const struct of_device_id *match; |
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struct device *dev = &pdev->dev; |
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struct creg_gpio *hcg; |
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u32 ngpios; |
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int ret; |
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hcg = devm_kzalloc(dev, sizeof(struct creg_gpio), GFP_KERNEL); |
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if (!hcg) |
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return -ENOMEM; |
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hcg->regs = devm_platform_ioremap_resource(pdev, 0); |
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if (IS_ERR(hcg->regs)) |
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return PTR_ERR(hcg->regs); |
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match = of_match_node(creg_gpio_ids, pdev->dev.of_node); |
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hcg->layout = match->data; |
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if (!hcg->layout) |
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return -EINVAL; |
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ret = of_property_read_u32(dev->of_node, "ngpios", &ngpios); |
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if (ret) |
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return ret; |
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ret = creg_gpio_validate(dev, hcg, ngpios); |
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if (ret) |
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return ret; |
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spin_lock_init(&hcg->lock); |
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hcg->gc.label = dev_name(dev); |
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hcg->gc.base = -1; |
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hcg->gc.ngpio = ngpios; |
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hcg->gc.set = creg_gpio_set; |
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hcg->gc.direction_output = creg_gpio_dir_out; |
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hcg->gc.of_node = dev->of_node; |
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ret = devm_gpiochip_add_data(dev, &hcg->gc, hcg); |
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if (ret) |
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return ret; |
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dev_info(dev, "GPIO controller with %d gpios probed\n", ngpios); |
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return 0; |
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} |
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static struct platform_driver creg_gpio_snps_driver = { |
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.driver = { |
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.name = "snps-creg-gpio", |
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.of_match_table = creg_gpio_ids, |
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}, |
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.probe = creg_gpio_probe, |
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}; |
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builtin_platform_driver(creg_gpio_snps_driver);
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