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228 lines
5.5 KiB
228 lines
5.5 KiB
// SPDX-License-Identifier: GPL-2.0-or-later |
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/* |
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* elanfreq: cpufreq driver for the AMD ELAN family |
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* |
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* (c) Copyright 2002 Robert Schwebel <[email protected]> |
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* |
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* Parts of this code are (c) Sven Geggus <[email protected]> |
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* |
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* All Rights Reserved. |
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* |
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* 2002-02-13: - initial revision for 2.4.18-pre9 by Robert Schwebel |
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*/ |
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#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt |
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#include <linux/kernel.h> |
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#include <linux/module.h> |
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#include <linux/init.h> |
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#include <linux/delay.h> |
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#include <linux/cpufreq.h> |
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#include <asm/cpu_device_id.h> |
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#include <asm/msr.h> |
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#include <linux/timex.h> |
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#include <linux/io.h> |
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#define REG_CSCIR 0x22 /* Chip Setup and Control Index Register */ |
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#define REG_CSCDR 0x23 /* Chip Setup and Control Data Register */ |
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/* Module parameter */ |
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static int max_freq; |
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struct s_elan_multiplier { |
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int clock; /* frequency in kHz */ |
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int val40h; /* PMU Force Mode register */ |
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int val80h; /* CPU Clock Speed Register */ |
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}; |
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/* |
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* It is important that the frequencies |
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* are listed in ascending order here! |
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*/ |
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static struct s_elan_multiplier elan_multiplier[] = { |
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{1000, 0x02, 0x18}, |
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{2000, 0x02, 0x10}, |
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{4000, 0x02, 0x08}, |
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{8000, 0x00, 0x00}, |
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{16000, 0x00, 0x02}, |
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{33000, 0x00, 0x04}, |
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{66000, 0x01, 0x04}, |
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{99000, 0x01, 0x05} |
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}; |
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static struct cpufreq_frequency_table elanfreq_table[] = { |
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{0, 0, 1000}, |
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{0, 1, 2000}, |
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{0, 2, 4000}, |
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{0, 3, 8000}, |
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{0, 4, 16000}, |
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{0, 5, 33000}, |
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{0, 6, 66000}, |
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{0, 7, 99000}, |
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{0, 0, CPUFREQ_TABLE_END}, |
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}; |
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/** |
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* elanfreq_get_cpu_frequency: determine current cpu speed |
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* |
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* Finds out at which frequency the CPU of the Elan SOC runs |
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* at the moment. Frequencies from 1 to 33 MHz are generated |
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* the normal way, 66 and 99 MHz are called "Hyperspeed Mode" |
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* and have the rest of the chip running with 33 MHz. |
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*/ |
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static unsigned int elanfreq_get_cpu_frequency(unsigned int cpu) |
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{ |
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u8 clockspeed_reg; /* Clock Speed Register */ |
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local_irq_disable(); |
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outb_p(0x80, REG_CSCIR); |
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clockspeed_reg = inb_p(REG_CSCDR); |
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local_irq_enable(); |
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if ((clockspeed_reg & 0xE0) == 0xE0) |
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return 0; |
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/* Are we in CPU clock multiplied mode (66/99 MHz)? */ |
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if ((clockspeed_reg & 0xE0) == 0xC0) { |
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if ((clockspeed_reg & 0x01) == 0) |
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return 66000; |
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else |
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return 99000; |
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} |
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/* 33 MHz is not 32 MHz... */ |
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if ((clockspeed_reg & 0xE0) == 0xA0) |
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return 33000; |
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return (1<<((clockspeed_reg & 0xE0) >> 5)) * 1000; |
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} |
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static int elanfreq_target(struct cpufreq_policy *policy, |
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unsigned int state) |
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{ |
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/* |
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* Access to the Elan's internal registers is indexed via |
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* 0x22: Chip Setup & Control Register Index Register (CSCI) |
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* 0x23: Chip Setup & Control Register Data Register (CSCD) |
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* |
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*/ |
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/* |
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* 0x40 is the Power Management Unit's Force Mode Register. |
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* Bit 6 enables Hyperspeed Mode (66/100 MHz core frequency) |
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*/ |
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local_irq_disable(); |
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outb_p(0x40, REG_CSCIR); /* Disable hyperspeed mode */ |
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outb_p(0x00, REG_CSCDR); |
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local_irq_enable(); /* wait till internal pipelines and */ |
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udelay(1000); /* buffers have cleaned up */ |
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local_irq_disable(); |
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/* now, set the CPU clock speed register (0x80) */ |
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outb_p(0x80, REG_CSCIR); |
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outb_p(elan_multiplier[state].val80h, REG_CSCDR); |
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/* now, the hyperspeed bit in PMU Force Mode Register (0x40) */ |
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outb_p(0x40, REG_CSCIR); |
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outb_p(elan_multiplier[state].val40h, REG_CSCDR); |
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udelay(10000); |
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local_irq_enable(); |
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return 0; |
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} |
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/* |
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* Module init and exit code |
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*/ |
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static int elanfreq_cpu_init(struct cpufreq_policy *policy) |
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{ |
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struct cpuinfo_x86 *c = &cpu_data(0); |
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struct cpufreq_frequency_table *pos; |
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/* capability check */ |
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if ((c->x86_vendor != X86_VENDOR_AMD) || |
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(c->x86 != 4) || (c->x86_model != 10)) |
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return -ENODEV; |
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/* max freq */ |
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if (!max_freq) |
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max_freq = elanfreq_get_cpu_frequency(0); |
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/* table init */ |
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cpufreq_for_each_entry(pos, elanfreq_table) |
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if (pos->frequency > max_freq) |
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pos->frequency = CPUFREQ_ENTRY_INVALID; |
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policy->freq_table = elanfreq_table; |
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return 0; |
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} |
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#ifndef MODULE |
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/** |
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* elanfreq_setup - elanfreq command line parameter parsing |
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* |
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* elanfreq command line parameter. Use: |
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* elanfreq=66000 |
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* to set the maximum CPU frequency to 66 MHz. Note that in |
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* case you do not give this boot parameter, the maximum |
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* frequency will fall back to _current_ CPU frequency which |
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* might be lower. If you build this as a module, use the |
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* max_freq module parameter instead. |
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*/ |
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static int __init elanfreq_setup(char *str) |
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{ |
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max_freq = simple_strtoul(str, &str, 0); |
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pr_warn("You're using the deprecated elanfreq command line option. Use elanfreq.max_freq instead, please!\n"); |
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return 1; |
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} |
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__setup("elanfreq=", elanfreq_setup); |
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#endif |
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static struct cpufreq_driver elanfreq_driver = { |
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.get = elanfreq_get_cpu_frequency, |
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.flags = CPUFREQ_NO_AUTO_DYNAMIC_SWITCHING, |
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.verify = cpufreq_generic_frequency_table_verify, |
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.target_index = elanfreq_target, |
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.init = elanfreq_cpu_init, |
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.name = "elanfreq", |
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.attr = cpufreq_generic_attr, |
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}; |
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static const struct x86_cpu_id elan_id[] = { |
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X86_MATCH_VENDOR_FAM_MODEL(AMD, 4, 10, NULL), |
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{} |
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}; |
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MODULE_DEVICE_TABLE(x86cpu, elan_id); |
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static int __init elanfreq_init(void) |
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{ |
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if (!x86_match_cpu(elan_id)) |
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return -ENODEV; |
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return cpufreq_register_driver(&elanfreq_driver); |
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} |
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static void __exit elanfreq_exit(void) |
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{ |
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cpufreq_unregister_driver(&elanfreq_driver); |
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} |
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module_param(max_freq, int, 0444); |
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MODULE_LICENSE("GPL"); |
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MODULE_AUTHOR("Robert Schwebel <[email protected]>, " |
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"Sven Geggus <[email protected]>"); |
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MODULE_DESCRIPTION("cpufreq driver for AMD's Elan CPUs"); |
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module_init(elanfreq_init); |
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module_exit(elanfreq_exit);
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