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142 lines
3.9 KiB
142 lines
3.9 KiB
// SPDX-License-Identifier: GPL-2.0-only |
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/* |
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* Utility functions for parsing Tegra CVB voltage tables |
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* |
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* Copyright (C) 2012-2019 NVIDIA Corporation. All rights reserved. |
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*/ |
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#include <linux/err.h> |
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#include <linux/kernel.h> |
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#include <linux/pm_opp.h> |
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#include "cvb.h" |
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/* cvb_mv = ((c2 * speedo / s_scale + c1) * speedo / s_scale + c0) */ |
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static inline int get_cvb_voltage(int speedo, int s_scale, |
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const struct cvb_coefficients *cvb) |
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{ |
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int mv; |
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/* apply only speedo scale: output mv = cvb_mv * v_scale */ |
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mv = DIV_ROUND_CLOSEST(cvb->c2 * speedo, s_scale); |
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mv = DIV_ROUND_CLOSEST((mv + cvb->c1) * speedo, s_scale) + cvb->c0; |
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return mv; |
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} |
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static int round_cvb_voltage(int mv, int v_scale, |
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const struct rail_alignment *align) |
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{ |
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/* combined: apply voltage scale and round to cvb alignment step */ |
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int uv; |
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int step = (align->step_uv ? : 1000) * v_scale; |
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int offset = align->offset_uv * v_scale; |
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uv = max(mv * 1000, offset) - offset; |
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uv = DIV_ROUND_UP(uv, step) * align->step_uv + align->offset_uv; |
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return uv / 1000; |
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} |
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enum { |
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DOWN, |
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UP |
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}; |
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static int round_voltage(int mv, const struct rail_alignment *align, int up) |
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{ |
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if (align->step_uv) { |
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int uv; |
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uv = max(mv * 1000, align->offset_uv) - align->offset_uv; |
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uv = (uv + (up ? align->step_uv - 1 : 0)) / align->step_uv; |
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return (uv * align->step_uv + align->offset_uv) / 1000; |
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} |
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return mv; |
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} |
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static int build_opp_table(struct device *dev, const struct cvb_table *table, |
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struct rail_alignment *align, |
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int speedo_value, unsigned long max_freq) |
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{ |
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int i, ret, dfll_mv, min_mv, max_mv; |
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min_mv = round_voltage(table->min_millivolts, align, UP); |
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max_mv = round_voltage(table->max_millivolts, align, DOWN); |
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for (i = 0; i < MAX_DVFS_FREQS; i++) { |
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const struct cvb_table_freq_entry *entry = &table->entries[i]; |
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if (!entry->freq || (entry->freq > max_freq)) |
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break; |
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dfll_mv = get_cvb_voltage(speedo_value, table->speedo_scale, |
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&entry->coefficients); |
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dfll_mv = round_cvb_voltage(dfll_mv, table->voltage_scale, |
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align); |
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dfll_mv = clamp(dfll_mv, min_mv, max_mv); |
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ret = dev_pm_opp_add(dev, entry->freq, dfll_mv * 1000); |
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if (ret) |
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return ret; |
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} |
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return 0; |
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} |
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/** |
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* tegra_cvb_add_opp_table - build OPP table from Tegra CVB tables |
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* @dev: the struct device * for which the OPP table is built |
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* @tables: array of CVB tables |
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* @count: size of the previously mentioned array |
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* @align: parameters of the regulator step and offset |
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* @process_id: process id of the HW module |
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* @speedo_id: speedo id of the HW module |
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* @speedo_value: speedo value of the HW module |
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* @max_freq: highest safe clock rate |
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* |
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* On Tegra, a CVB table encodes the relationship between operating voltage |
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* and safe maximal frequency for a given module (e.g. GPU or CPU). This |
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* function calculates the optimal voltage-frequency operating points |
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* for the given arguments and exports them via the OPP library for the |
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* given @dev. Returns a pointer to the struct cvb_table that matched |
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* or an ERR_PTR on failure. |
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*/ |
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const struct cvb_table * |
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tegra_cvb_add_opp_table(struct device *dev, const struct cvb_table *tables, |
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size_t count, struct rail_alignment *align, |
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int process_id, int speedo_id, int speedo_value, |
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unsigned long max_freq) |
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{ |
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size_t i; |
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int ret; |
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for (i = 0; i < count; i++) { |
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const struct cvb_table *table = &tables[i]; |
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if (table->speedo_id != -1 && table->speedo_id != speedo_id) |
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continue; |
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if (table->process_id != -1 && table->process_id != process_id) |
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continue; |
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ret = build_opp_table(dev, table, align, speedo_value, |
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max_freq); |
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return ret ? ERR_PTR(ret) : table; |
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} |
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return ERR_PTR(-EINVAL); |
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} |
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void tegra_cvb_remove_opp_table(struct device *dev, |
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const struct cvb_table *table, |
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unsigned long max_freq) |
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{ |
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unsigned int i; |
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for (i = 0; i < MAX_DVFS_FREQS; i++) { |
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const struct cvb_table_freq_entry *entry = &table->entries[i]; |
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if (!entry->freq || (entry->freq > max_freq)) |
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break; |
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dev_pm_opp_remove(dev, entry->freq); |
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} |
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}
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