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106 lines
4.0 KiB
106 lines
4.0 KiB
// SPDX-License-Identifier: GPL-2.0 |
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// |
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// Copyright (c) 2018 MediaTek Inc. |
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// Author: Weiyi Lu <[email protected]> |
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#include <linux/clk-provider.h> |
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#include <linux/platform_device.h> |
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#include "clk-mtk.h" |
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#include "clk-gate.h" |
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#include <dt-bindings/clock/mt8183-clk.h> |
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static const struct mtk_gate_regs mm0_cg_regs = { |
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.set_ofs = 0x104, |
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.clr_ofs = 0x108, |
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.sta_ofs = 0x100, |
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}; |
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static const struct mtk_gate_regs mm1_cg_regs = { |
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.set_ofs = 0x114, |
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.clr_ofs = 0x118, |
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.sta_ofs = 0x110, |
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}; |
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#define GATE_MM0(_id, _name, _parent, _shift) \ |
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GATE_MTK(_id, _name, _parent, &mm0_cg_regs, _shift, \ |
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&mtk_clk_gate_ops_setclr) |
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#define GATE_MM1(_id, _name, _parent, _shift) \ |
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GATE_MTK(_id, _name, _parent, &mm1_cg_regs, _shift, \ |
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&mtk_clk_gate_ops_setclr) |
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static const struct mtk_gate mm_clks[] = { |
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/* MM0 */ |
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GATE_MM0(CLK_MM_SMI_COMMON, "mm_smi_common", "mm_sel", 0), |
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GATE_MM0(CLK_MM_SMI_LARB0, "mm_smi_larb0", "mm_sel", 1), |
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GATE_MM0(CLK_MM_SMI_LARB1, "mm_smi_larb1", "mm_sel", 2), |
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GATE_MM0(CLK_MM_GALS_COMM0, "mm_gals_comm0", "mm_sel", 3), |
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GATE_MM0(CLK_MM_GALS_COMM1, "mm_gals_comm1", "mm_sel", 4), |
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GATE_MM0(CLK_MM_GALS_CCU2MM, "mm_gals_ccu2mm", "mm_sel", 5), |
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GATE_MM0(CLK_MM_GALS_IPU12MM, "mm_gals_ipu12mm", "mm_sel", 6), |
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GATE_MM0(CLK_MM_GALS_IMG2MM, "mm_gals_img2mm", "mm_sel", 7), |
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GATE_MM0(CLK_MM_GALS_CAM2MM, "mm_gals_cam2mm", "mm_sel", 8), |
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GATE_MM0(CLK_MM_GALS_IPU2MM, "mm_gals_ipu2mm", "mm_sel", 9), |
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GATE_MM0(CLK_MM_MDP_DL_TXCK, "mm_mdp_dl_txck", "mm_sel", 10), |
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GATE_MM0(CLK_MM_IPU_DL_TXCK, "mm_ipu_dl_txck", "mm_sel", 11), |
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GATE_MM0(CLK_MM_MDP_RDMA0, "mm_mdp_rdma0", "mm_sel", 12), |
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GATE_MM0(CLK_MM_MDP_RDMA1, "mm_mdp_rdma1", "mm_sel", 13), |
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GATE_MM0(CLK_MM_MDP_RSZ0, "mm_mdp_rsz0", "mm_sel", 14), |
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GATE_MM0(CLK_MM_MDP_RSZ1, "mm_mdp_rsz1", "mm_sel", 15), |
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GATE_MM0(CLK_MM_MDP_TDSHP, "mm_mdp_tdshp", "mm_sel", 16), |
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GATE_MM0(CLK_MM_MDP_WROT0, "mm_mdp_wrot0", "mm_sel", 17), |
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GATE_MM0(CLK_MM_MDP_WDMA0, "mm_mdp_wdma0", "mm_sel", 18), |
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GATE_MM0(CLK_MM_FAKE_ENG, "mm_fake_eng", "mm_sel", 19), |
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GATE_MM0(CLK_MM_DISP_OVL0, "mm_disp_ovl0", "mm_sel", 20), |
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GATE_MM0(CLK_MM_DISP_OVL0_2L, "mm_disp_ovl0_2l", "mm_sel", 21), |
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GATE_MM0(CLK_MM_DISP_OVL1_2L, "mm_disp_ovl1_2l", "mm_sel", 22), |
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GATE_MM0(CLK_MM_DISP_RDMA0, "mm_disp_rdma0", "mm_sel", 23), |
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GATE_MM0(CLK_MM_DISP_RDMA1, "mm_disp_rdma1", "mm_sel", 24), |
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GATE_MM0(CLK_MM_DISP_WDMA0, "mm_disp_wdma0", "mm_sel", 25), |
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GATE_MM0(CLK_MM_DISP_COLOR0, "mm_disp_color0", "mm_sel", 26), |
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GATE_MM0(CLK_MM_DISP_CCORR0, "mm_disp_ccorr0", "mm_sel", 27), |
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GATE_MM0(CLK_MM_DISP_AAL0, "mm_disp_aal0", "mm_sel", 28), |
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GATE_MM0(CLK_MM_DISP_GAMMA0, "mm_disp_gamma0", "mm_sel", 29), |
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GATE_MM0(CLK_MM_DISP_DITHER0, "mm_disp_dither0", "mm_sel", 30), |
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GATE_MM0(CLK_MM_DISP_SPLIT, "mm_disp_split", "mm_sel", 31), |
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/* MM1 */ |
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GATE_MM1(CLK_MM_DSI0_MM, "mm_dsi0_mm", "mm_sel", 0), |
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GATE_MM1(CLK_MM_DSI0_IF, "mm_dsi0_if", "mm_sel", 1), |
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GATE_MM1(CLK_MM_DPI_MM, "mm_dpi_mm", "mm_sel", 2), |
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GATE_MM1(CLK_MM_DPI_IF, "mm_dpi_if", "dpi0_sel", 3), |
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GATE_MM1(CLK_MM_FAKE_ENG2, "mm_fake_eng2", "mm_sel", 4), |
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GATE_MM1(CLK_MM_MDP_DL_RX, "mm_mdp_dl_rx", "mm_sel", 5), |
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GATE_MM1(CLK_MM_IPU_DL_RX, "mm_ipu_dl_rx", "mm_sel", 6), |
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GATE_MM1(CLK_MM_26M, "mm_26m", "f_f26m_ck", 7), |
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GATE_MM1(CLK_MM_MMSYS_R2Y, "mm_mmsys_r2y", "mm_sel", 8), |
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GATE_MM1(CLK_MM_DISP_RSZ, "mm_disp_rsz", "mm_sel", 9), |
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GATE_MM1(CLK_MM_MDP_AAL, "mm_mdp_aal", "mm_sel", 10), |
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GATE_MM1(CLK_MM_MDP_CCORR, "mm_mdp_ccorr", "mm_sel", 11), |
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GATE_MM1(CLK_MM_DBI_MM, "mm_dbi_mm", "mm_sel", 12), |
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GATE_MM1(CLK_MM_DBI_IF, "mm_dbi_if", "dpi0_sel", 13), |
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}; |
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static int clk_mt8183_mm_probe(struct platform_device *pdev) |
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{ |
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struct device *dev = &pdev->dev; |
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struct device_node *node = dev->parent->of_node; |
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struct clk_onecell_data *clk_data; |
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clk_data = mtk_alloc_clk_data(CLK_MM_NR_CLK); |
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mtk_clk_register_gates(node, mm_clks, ARRAY_SIZE(mm_clks), |
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clk_data); |
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return of_clk_add_provider(node, of_clk_src_onecell_get, clk_data); |
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} |
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static struct platform_driver clk_mt8183_mm_drv = { |
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.probe = clk_mt8183_mm_probe, |
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.driver = { |
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.name = "clk-mt8183-mm", |
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}, |
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}; |
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builtin_platform_driver(clk_mt8183_mm_drv);
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