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70 lines
1.6 KiB
70 lines
1.6 KiB
// SPDX-License-Identifier: GPL-2.0-only |
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/* |
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* Copyright (c) 2017 MediaTek Inc. |
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* Author: Kevin Chen <[email protected]> |
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*/ |
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#include <linux/clk-provider.h> |
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#include <linux/platform_device.h> |
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#include "clk-mtk.h" |
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#include "clk-gate.h" |
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#include <dt-bindings/clock/mt6797-clk.h> |
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static const struct mtk_gate_regs venc_cg_regs = { |
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.set_ofs = 0x0004, |
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.clr_ofs = 0x0008, |
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.sta_ofs = 0x0000, |
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}; |
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#define GATE_VENC(_id, _name, _parent, _shift) { \ |
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.id = _id, \ |
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.name = _name, \ |
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.parent_name = _parent, \ |
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.regs = &venc_cg_regs, \ |
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.shift = _shift, \ |
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.ops = &mtk_clk_gate_ops_setclr_inv, \ |
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} |
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static const struct mtk_gate venc_clks[] = { |
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GATE_VENC(CLK_VENC_0, "venc_0", "mm_sel", 0), |
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GATE_VENC(CLK_VENC_1, "venc_1", "venc_sel", 4), |
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GATE_VENC(CLK_VENC_2, "venc_2", "venc_sel", 8), |
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GATE_VENC(CLK_VENC_3, "venc_3", "venc_sel", 12), |
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}; |
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static const struct of_device_id of_match_clk_mt6797_venc[] = { |
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{ .compatible = "mediatek,mt6797-vencsys", }, |
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{} |
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}; |
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static int clk_mt6797_venc_probe(struct platform_device *pdev) |
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{ |
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struct clk_onecell_data *clk_data; |
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int r; |
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struct device_node *node = pdev->dev.of_node; |
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clk_data = mtk_alloc_clk_data(CLK_VENC_NR); |
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mtk_clk_register_gates(node, venc_clks, ARRAY_SIZE(venc_clks), |
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clk_data); |
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r = of_clk_add_provider(node, of_clk_src_onecell_get, clk_data); |
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if (r) |
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dev_err(&pdev->dev, |
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"could not register clock provider: %s: %d\n", |
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pdev->name, r); |
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return r; |
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} |
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static struct platform_driver clk_mt6797_venc_drv = { |
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.probe = clk_mt6797_venc_probe, |
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.driver = { |
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.name = "clk-mt6797-venc", |
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.of_match_table = of_match_clk_mt6797_venc, |
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}, |
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}; |
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builtin_platform_driver(clk_mt6797_venc_drv);
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