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100 lines
2.5 KiB
100 lines
2.5 KiB
// SPDX-License-Identifier: GPL-2.0 |
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/* |
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* Copyright (c) 2018 MediaTek Inc. |
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* Author: Owen Chen <[email protected]> |
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*/ |
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#include <linux/clk-provider.h> |
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#include <linux/platform_device.h> |
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#include "clk-mtk.h" |
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#include "clk-gate.h" |
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#include <dt-bindings/clock/mt6765-clk.h> |
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static const struct mtk_gate_regs audio0_cg_regs = { |
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.set_ofs = 0x0, |
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.clr_ofs = 0x0, |
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.sta_ofs = 0x0, |
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}; |
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static const struct mtk_gate_regs audio1_cg_regs = { |
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.set_ofs = 0x4, |
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.clr_ofs = 0x4, |
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.sta_ofs = 0x4, |
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}; |
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#define GATE_AUDIO0(_id, _name, _parent, _shift) { \ |
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.id = _id, \ |
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.name = _name, \ |
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.parent_name = _parent, \ |
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.regs = &audio0_cg_regs, \ |
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.shift = _shift, \ |
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.ops = &mtk_clk_gate_ops_no_setclr, \ |
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} |
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#define GATE_AUDIO1(_id, _name, _parent, _shift) { \ |
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.id = _id, \ |
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.name = _name, \ |
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.parent_name = _parent, \ |
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.regs = &audio1_cg_regs, \ |
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.shift = _shift, \ |
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.ops = &mtk_clk_gate_ops_no_setclr, \ |
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} |
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static const struct mtk_gate audio_clks[] = { |
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/* AUDIO0 */ |
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GATE_AUDIO0(CLK_AUDIO_AFE, "aud_afe", "audio_ck", 2), |
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GATE_AUDIO0(CLK_AUDIO_22M, "aud_22m", "aud_engen1_ck", 8), |
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GATE_AUDIO0(CLK_AUDIO_APLL_TUNER, "aud_apll_tuner", |
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"aud_engen1_ck", 19), |
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GATE_AUDIO0(CLK_AUDIO_ADC, "aud_adc", "audio_ck", 24), |
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GATE_AUDIO0(CLK_AUDIO_DAC, "aud_dac", "audio_ck", 25), |
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GATE_AUDIO0(CLK_AUDIO_DAC_PREDIS, "aud_dac_predis", |
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"audio_ck", 26), |
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GATE_AUDIO0(CLK_AUDIO_TML, "aud_tml", "audio_ck", 27), |
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/* AUDIO1 */ |
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GATE_AUDIO1(CLK_AUDIO_I2S1_BCLK, "aud_i2s1_bclk", |
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"audio_ck", 4), |
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GATE_AUDIO1(CLK_AUDIO_I2S2_BCLK, "aud_i2s2_bclk", |
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"audio_ck", 5), |
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GATE_AUDIO1(CLK_AUDIO_I2S3_BCLK, "aud_i2s3_bclk", |
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"audio_ck", 6), |
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GATE_AUDIO1(CLK_AUDIO_I2S4_BCLK, "aud_i2s4_bclk", |
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"audio_ck", 7), |
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}; |
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static int clk_mt6765_audio_probe(struct platform_device *pdev) |
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{ |
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struct clk_onecell_data *clk_data; |
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int r; |
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struct device_node *node = pdev->dev.of_node; |
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clk_data = mtk_alloc_clk_data(CLK_AUDIO_NR_CLK); |
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mtk_clk_register_gates(node, audio_clks, |
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ARRAY_SIZE(audio_clks), clk_data); |
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r = of_clk_add_provider(node, of_clk_src_onecell_get, clk_data); |
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if (r) |
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pr_err("%s(): could not register clock provider: %d\n", |
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__func__, r); |
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return r; |
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} |
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static const struct of_device_id of_match_clk_mt6765_audio[] = { |
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{ .compatible = "mediatek,mt6765-audsys", }, |
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{} |
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}; |
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static struct platform_driver clk_mt6765_audio_drv = { |
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.probe = clk_mt6765_audio_probe, |
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.driver = { |
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.name = "clk-mt6765-audio", |
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.of_match_table = of_match_clk_mt6765_audio, |
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}, |
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}; |
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builtin_platform_driver(clk_mt6765_audio_drv);
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