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235 lines
6.7 KiB
235 lines
6.7 KiB
/* SPDX-License-Identifier: GPL-2.0 */ |
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/* |
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* Copyright (c) 2011-2012, The Linux Foundation. All rights reserved. |
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*/ |
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#ifndef _CORESIGHT_PRIV_H |
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#define _CORESIGHT_PRIV_H |
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#include <linux/amba/bus.h> |
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#include <linux/bitops.h> |
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#include <linux/io.h> |
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#include <linux/coresight.h> |
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#include <linux/pm_runtime.h> |
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/* |
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* Coresight management registers (0xf00-0xfcc) |
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* 0xfa0 - 0xfa4: Management registers in PFTv1.0 |
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* Trace registers in PFTv1.1 |
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*/ |
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#define CORESIGHT_ITCTRL 0xf00 |
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#define CORESIGHT_CLAIMSET 0xfa0 |
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#define CORESIGHT_CLAIMCLR 0xfa4 |
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#define CORESIGHT_LAR 0xfb0 |
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#define CORESIGHT_LSR 0xfb4 |
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#define CORESIGHT_DEVARCH 0xfbc |
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#define CORESIGHT_AUTHSTATUS 0xfb8 |
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#define CORESIGHT_DEVID 0xfc8 |
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#define CORESIGHT_DEVTYPE 0xfcc |
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/* |
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* Coresight device CLAIM protocol. |
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* See PSCI - ARM DEN 0022D, Section: 6.8.1 Debug and Trace save and restore. |
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*/ |
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#define CORESIGHT_CLAIM_SELF_HOSTED BIT(1) |
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#define TIMEOUT_US 100 |
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#define BMVAL(val, lsb, msb) ((val & GENMASK(msb, lsb)) >> lsb) |
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#define ETM_MODE_EXCL_KERN BIT(30) |
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#define ETM_MODE_EXCL_USER BIT(31) |
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typedef u32 (*coresight_read_fn)(const struct device *, u32 offset); |
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#define __coresight_simple_func(type, func, name, lo_off, hi_off) \ |
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static ssize_t name##_show(struct device *_dev, \ |
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struct device_attribute *attr, char *buf) \ |
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{ \ |
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type *drvdata = dev_get_drvdata(_dev->parent); \ |
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coresight_read_fn fn = func; \ |
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u64 val; \ |
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pm_runtime_get_sync(_dev->parent); \ |
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if (fn) \ |
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val = (u64)fn(_dev->parent, lo_off); \ |
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else \ |
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val = coresight_read_reg_pair(drvdata->base, \ |
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lo_off, hi_off); \ |
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pm_runtime_put_sync(_dev->parent); \ |
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return scnprintf(buf, PAGE_SIZE, "0x%llx\n", val); \ |
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} \ |
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static DEVICE_ATTR_RO(name) |
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#define coresight_simple_func(type, func, name, offset) \ |
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__coresight_simple_func(type, func, name, offset, -1) |
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#define coresight_simple_reg32(type, name, offset) \ |
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__coresight_simple_func(type, NULL, name, offset, -1) |
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#define coresight_simple_reg64(type, name, lo_off, hi_off) \ |
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__coresight_simple_func(type, NULL, name, lo_off, hi_off) |
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extern const u32 coresight_barrier_pkt[4]; |
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#define CORESIGHT_BARRIER_PKT_SIZE (sizeof(coresight_barrier_pkt)) |
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enum etm_addr_type { |
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ETM_ADDR_TYPE_NONE, |
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ETM_ADDR_TYPE_SINGLE, |
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ETM_ADDR_TYPE_RANGE, |
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ETM_ADDR_TYPE_START, |
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ETM_ADDR_TYPE_STOP, |
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}; |
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enum cs_mode { |
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CS_MODE_DISABLED, |
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CS_MODE_SYSFS, |
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CS_MODE_PERF, |
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}; |
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/** |
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* struct cs_buffer - keep track of a recording session' specifics |
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* @cur: index of the current buffer |
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* @nr_pages: max number of pages granted to us |
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* @pid: PID this cs_buffer belongs to |
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* @offset: offset within the current buffer |
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* @data_size: how much we collected in this run |
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* @snapshot: is this run in snapshot mode |
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* @data_pages: a handle the ring buffer |
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*/ |
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struct cs_buffers { |
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unsigned int cur; |
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unsigned int nr_pages; |
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pid_t pid; |
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unsigned long offset; |
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local_t data_size; |
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bool snapshot; |
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void **data_pages; |
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}; |
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static inline void coresight_insert_barrier_packet(void *buf) |
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{ |
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if (buf) |
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memcpy(buf, coresight_barrier_pkt, CORESIGHT_BARRIER_PKT_SIZE); |
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} |
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static inline void CS_LOCK(void __iomem *addr) |
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{ |
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do { |
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/* Wait for things to settle */ |
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mb(); |
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writel_relaxed(0x0, addr + CORESIGHT_LAR); |
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} while (0); |
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} |
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static inline void CS_UNLOCK(void __iomem *addr) |
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{ |
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do { |
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writel_relaxed(CORESIGHT_UNLOCK, addr + CORESIGHT_LAR); |
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/* Make sure everyone has seen this */ |
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mb(); |
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} while (0); |
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} |
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static inline u64 |
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coresight_read_reg_pair(void __iomem *addr, s32 lo_offset, s32 hi_offset) |
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{ |
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u64 val; |
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val = readl_relaxed(addr + lo_offset); |
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val |= (hi_offset < 0) ? 0 : |
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(u64)readl_relaxed(addr + hi_offset) << 32; |
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return val; |
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} |
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static inline void coresight_write_reg_pair(void __iomem *addr, u64 val, |
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s32 lo_offset, s32 hi_offset) |
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{ |
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writel_relaxed((u32)val, addr + lo_offset); |
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if (hi_offset >= 0) |
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writel_relaxed((u32)(val >> 32), addr + hi_offset); |
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} |
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void coresight_disable_path(struct list_head *path); |
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int coresight_enable_path(struct list_head *path, u32 mode, void *sink_data); |
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struct coresight_device *coresight_get_sink(struct list_head *path); |
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struct coresight_device * |
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coresight_get_enabled_sink(struct coresight_device *source); |
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struct coresight_device *coresight_get_sink_by_id(u32 id); |
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struct coresight_device * |
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coresight_find_default_sink(struct coresight_device *csdev); |
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struct list_head *coresight_build_path(struct coresight_device *csdev, |
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struct coresight_device *sink); |
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void coresight_release_path(struct list_head *path); |
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int coresight_add_sysfs_link(struct coresight_sysfs_link *info); |
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void coresight_remove_sysfs_link(struct coresight_sysfs_link *info); |
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int coresight_create_conns_sysfs_group(struct coresight_device *csdev); |
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void coresight_remove_conns_sysfs_group(struct coresight_device *csdev); |
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int coresight_make_links(struct coresight_device *orig, |
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struct coresight_connection *conn, |
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struct coresight_device *target); |
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void coresight_remove_links(struct coresight_device *orig, |
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struct coresight_connection *conn); |
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#if IS_ENABLED(CONFIG_CORESIGHT_SOURCE_ETM3X) |
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extern int etm_readl_cp14(u32 off, unsigned int *val); |
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extern int etm_writel_cp14(u32 off, u32 val); |
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#else |
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static inline int etm_readl_cp14(u32 off, unsigned int *val) { return 0; } |
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static inline int etm_writel_cp14(u32 off, u32 val) { return 0; } |
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#endif |
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struct cti_assoc_op { |
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void (*add)(struct coresight_device *csdev); |
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void (*remove)(struct coresight_device *csdev); |
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}; |
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extern void coresight_set_cti_ops(const struct cti_assoc_op *cti_op); |
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extern void coresight_remove_cti_ops(void); |
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/* |
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* Macros and inline functions to handle CoreSight UCI data and driver |
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* private data in AMBA ID table entries, and extract data values. |
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*/ |
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/* coresight AMBA ID, no UCI, no driver data: id table entry */ |
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#define CS_AMBA_ID(pid) \ |
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{ \ |
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.id = pid, \ |
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.mask = 0x000fffff, \ |
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} |
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/* coresight AMBA ID, UCI with driver data only: id table entry. */ |
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#define CS_AMBA_ID_DATA(pid, dval) \ |
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{ \ |
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.id = pid, \ |
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.mask = 0x000fffff, \ |
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.data = (void *)&(struct amba_cs_uci_id) \ |
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{ \ |
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.data = (void *)dval, \ |
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} \ |
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} |
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/* coresight AMBA ID, full UCI structure: id table entry. */ |
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#define CS_AMBA_UCI_ID(pid, uci_ptr) \ |
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{ \ |
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.id = pid, \ |
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.mask = 0x000fffff, \ |
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.data = (void *)uci_ptr \ |
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} |
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/* extract the data value from a UCI structure given amba_id pointer. */ |
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static inline void *coresight_get_uci_data(const struct amba_id *id) |
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{ |
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struct amba_cs_uci_id *uci_id = id->data; |
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if (!uci_id) |
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return NULL; |
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return uci_id->data; |
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} |
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void coresight_release_platform_data(struct coresight_device *csdev, |
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struct coresight_platform_data *pdata); |
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struct coresight_device * |
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coresight_find_csdev_by_fwnode(struct fwnode_handle *r_fwnode); |
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void coresight_set_assoc_ectdev_mutex(struct coresight_device *csdev, |
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struct coresight_device *ect_csdev); |
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#endif
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