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175 lines
4.4 KiB
175 lines
4.4 KiB
/* |
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* This file is subject to the terms and conditions of the GNU General Public |
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* License. See the file "COPYING" in the main directory of this archive |
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* for more details. |
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* |
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* KVM/MIPS: Interrupt delivery |
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* |
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* Copyright (C) 2012 MIPS Technologies, Inc. All rights reserved. |
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* Authors: Sanjay Lal <[email protected]> |
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*/ |
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#include <linux/errno.h> |
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#include <linux/err.h> |
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#include <linux/vmalloc.h> |
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#include <linux/fs.h> |
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#include <linux/memblock.h> |
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#include <asm/page.h> |
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#include <asm/cacheflush.h> |
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#include <linux/kvm_host.h> |
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#include "interrupt.h" |
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void kvm_mips_queue_irq(struct kvm_vcpu *vcpu, unsigned int priority) |
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{ |
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set_bit(priority, &vcpu->arch.pending_exceptions); |
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} |
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void kvm_mips_dequeue_irq(struct kvm_vcpu *vcpu, unsigned int priority) |
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{ |
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clear_bit(priority, &vcpu->arch.pending_exceptions); |
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} |
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void kvm_mips_queue_timer_int_cb(struct kvm_vcpu *vcpu) |
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{ |
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/* |
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* Cause bits to reflect the pending timer interrupt, |
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* the EXC code will be set when we are actually |
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* delivering the interrupt: |
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*/ |
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kvm_set_c0_guest_cause(vcpu->arch.cop0, (C_IRQ5 | C_TI)); |
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/* Queue up an INT exception for the core */ |
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kvm_mips_queue_irq(vcpu, MIPS_EXC_INT_TIMER); |
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} |
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void kvm_mips_dequeue_timer_int_cb(struct kvm_vcpu *vcpu) |
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{ |
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kvm_clear_c0_guest_cause(vcpu->arch.cop0, (C_IRQ5 | C_TI)); |
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kvm_mips_dequeue_irq(vcpu, MIPS_EXC_INT_TIMER); |
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} |
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void kvm_mips_queue_io_int_cb(struct kvm_vcpu *vcpu, |
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struct kvm_mips_interrupt *irq) |
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{ |
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int intr = (int)irq->irq; |
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/* |
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* Cause bits to reflect the pending IO interrupt, |
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* the EXC code will be set when we are actually |
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* delivering the interrupt: |
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*/ |
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kvm_set_c0_guest_cause(vcpu->arch.cop0, 1 << (intr + 8)); |
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kvm_mips_queue_irq(vcpu, kvm_irq_to_priority(intr)); |
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} |
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void kvm_mips_dequeue_io_int_cb(struct kvm_vcpu *vcpu, |
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struct kvm_mips_interrupt *irq) |
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{ |
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int intr = (int)irq->irq; |
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kvm_clear_c0_guest_cause(vcpu->arch.cop0, 1 << (-intr + 8)); |
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kvm_mips_dequeue_irq(vcpu, kvm_irq_to_priority(-intr)); |
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} |
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/* Deliver the interrupt of the corresponding priority, if possible. */ |
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int kvm_mips_irq_deliver_cb(struct kvm_vcpu *vcpu, unsigned int priority, |
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u32 cause) |
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{ |
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int allowed = 0; |
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u32 exccode, ie; |
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struct kvm_vcpu_arch *arch = &vcpu->arch; |
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struct mips_coproc *cop0 = vcpu->arch.cop0; |
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if (priority == MIPS_EXC_MAX) |
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return 0; |
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ie = 1 << (kvm_priority_to_irq[priority] + 8); |
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if ((kvm_read_c0_guest_status(cop0) & ST0_IE) |
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&& (!(kvm_read_c0_guest_status(cop0) & (ST0_EXL | ST0_ERL))) |
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&& (kvm_read_c0_guest_status(cop0) & ie)) { |
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allowed = 1; |
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exccode = EXCCODE_INT; |
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} |
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/* Are we allowed to deliver the interrupt ??? */ |
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if (allowed) { |
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if ((kvm_read_c0_guest_status(cop0) & ST0_EXL) == 0) { |
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/* save old pc */ |
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kvm_write_c0_guest_epc(cop0, arch->pc); |
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kvm_set_c0_guest_status(cop0, ST0_EXL); |
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if (cause & CAUSEF_BD) |
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kvm_set_c0_guest_cause(cop0, CAUSEF_BD); |
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else |
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kvm_clear_c0_guest_cause(cop0, CAUSEF_BD); |
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kvm_debug("Delivering INT @ pc %#lx\n", arch->pc); |
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} else |
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kvm_err("Trying to deliver interrupt when EXL is already set\n"); |
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kvm_change_c0_guest_cause(cop0, CAUSEF_EXCCODE, |
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(exccode << CAUSEB_EXCCODE)); |
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/* XXXSL Set PC to the interrupt exception entry point */ |
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arch->pc = kvm_mips_guest_exception_base(vcpu); |
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if (kvm_read_c0_guest_cause(cop0) & CAUSEF_IV) |
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arch->pc += 0x200; |
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else |
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arch->pc += 0x180; |
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clear_bit(priority, &vcpu->arch.pending_exceptions); |
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} |
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return allowed; |
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} |
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int kvm_mips_irq_clear_cb(struct kvm_vcpu *vcpu, unsigned int priority, |
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u32 cause) |
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{ |
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return 1; |
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} |
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void kvm_mips_deliver_interrupts(struct kvm_vcpu *vcpu, u32 cause) |
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{ |
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unsigned long *pending = &vcpu->arch.pending_exceptions; |
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unsigned long *pending_clr = &vcpu->arch.pending_exceptions_clr; |
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unsigned int priority; |
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if (!(*pending) && !(*pending_clr)) |
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return; |
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priority = __ffs(*pending_clr); |
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while (priority <= MIPS_EXC_MAX) { |
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if (kvm_mips_callbacks->irq_clear(vcpu, priority, cause)) { |
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if (!KVM_MIPS_IRQ_CLEAR_ALL_AT_ONCE) |
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break; |
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} |
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priority = find_next_bit(pending_clr, |
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BITS_PER_BYTE * sizeof(*pending_clr), |
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priority + 1); |
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} |
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priority = __ffs(*pending); |
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while (priority <= MIPS_EXC_MAX) { |
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if (kvm_mips_callbacks->irq_deliver(vcpu, priority, cause)) { |
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if (!KVM_MIPS_IRQ_DELIVER_ALL_AT_ONCE) |
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break; |
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} |
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priority = find_next_bit(pending, |
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BITS_PER_BYTE * sizeof(*pending), |
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priority + 1); |
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} |
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} |
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int kvm_mips_pending_timer(struct kvm_vcpu *vcpu) |
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{ |
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return test_bit(MIPS_EXC_INT_TIMER, &vcpu->arch.pending_exceptions); |
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}
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