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90 lines
2.2 KiB
90 lines
2.2 KiB
/* |
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* Copyright 2006 Freescale Semiconductor. |
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* Jeffrey Brown |
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* Srikanth Srinivasan ([email protected]) |
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*/ |
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#ifndef __MPC86xx_H__ |
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#define __MPC86xx_H__ |
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#include <asm/fsl_lbc.h> |
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#define EXC_OFF_SYS_RESET 0x0100 /* System reset offset */ |
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#define _START_OFFSET EXC_OFF_SYS_RESET |
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/* |
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* platform register addresses |
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*/ |
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#define GUTS_SVR (CONFIG_SYS_CCSRBAR + 0xE00A4) |
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#define MCM_ABCR (CONFIG_SYS_CCSRBAR + 0x01000) |
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#define MCM_DBCR (CONFIG_SYS_CCSRBAR + 0x01008) |
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/* |
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* l2cr values. Look in config_<BOARD>.h for the actual setup |
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*/ |
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#define l2cr 1017 |
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#define L2CR_L2E 0x80000000 /* bit 0 - enable */ |
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#define L2CR_L2PE 0x40000000 /* bit 1 - data parity */ |
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#define L2CR_L2I 0x00200000 /* bit 10 - global invalidate bit */ |
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#define L2CR_L2CTL 0x00100000 /* bit 11 - l2 ram control */ |
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#define L2CR_L2DO 0x00010000 /* bit 15 - data-only mode */ |
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#define L2CR_REP 0x00001000 /* bit 19 - l2 replacement alg */ |
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#define L2CR_HWF 0x00000800 /* bit 20 - hardware flush */ |
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#define L2CR_L2IP 0x00000001 /* global invalidate in progress */ |
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#define HID0_XBSEN 0x00000100 |
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#define HID0_HIGH_BAT_EN 0x00800000 |
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#define HID0_XAEN 0x00020000 |
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#ifndef __ASSEMBLY__ |
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typedef struct { |
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unsigned long freq_processor; |
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unsigned long freq_systembus; |
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unsigned long freq_localbus; |
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} MPC86xx_SYS_INFO; |
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#define l1icache_enable icache_enable |
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void l2cache_enable(void); |
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void l1dcache_enable(void); |
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static __inline__ unsigned long get_hid0 (void) |
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{ |
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unsigned long hid0; |
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asm volatile("mfspr %0, 1008" : "=r" (hid0) :); |
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return hid0; |
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} |
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static __inline__ unsigned long get_hid1 (void) |
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{ |
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unsigned long hid1; |
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asm volatile("mfspr %0, 1009" : "=r" (hid1) :); |
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return hid1; |
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} |
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static __inline__ void set_hid0 (unsigned long hid0) |
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{ |
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asm volatile("mtspr 1008, %0" : : "r" (hid0)); |
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} |
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static __inline__ void set_hid1 (unsigned long hid1) |
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{ |
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asm volatile("mtspr 1009, %0" : : "r" (hid1)); |
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} |
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static __inline__ unsigned long get_l2cr (void) |
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{ |
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unsigned long l2cr_val; |
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asm volatile("mfspr %0, 1017" : "=r" (l2cr_val) :); |
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return l2cr_val; |
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} |
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void setup_ddr_bat(phys_addr_t dram_size); |
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extern void setup_bats(void); |
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#endif /* _ASMLANGUAGE */ |
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#endif /* __MPC86xx_H__ */
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