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53 lines
1.3 KiB
53 lines
1.3 KiB
/* SPDX-License-Identifier: GPL-2.0-only */ |
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/* |
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* Copyright (C) 2015 Regents of the University of California |
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*/ |
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#ifndef _ASM_RISCV_CACHEFLUSH_H |
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#define _ASM_RISCV_CACHEFLUSH_H |
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#include <linux/mm.h> |
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static inline void local_flush_icache_all(void) |
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{ |
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asm volatile ("fence.i" ::: "memory"); |
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} |
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#define PG_dcache_clean PG_arch_1 |
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static inline void flush_dcache_page(struct page *page) |
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{ |
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if (test_bit(PG_dcache_clean, &page->flags)) |
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clear_bit(PG_dcache_clean, &page->flags); |
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} |
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#define ARCH_IMPLEMENTS_FLUSH_DCACHE_PAGE 1 |
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/* |
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* RISC-V doesn't have an instruction to flush parts of the instruction cache, |
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* so instead we just flush the whole thing. |
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*/ |
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#define flush_icache_range(start, end) flush_icache_all() |
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#define flush_icache_user_page(vma, pg, addr, len) \ |
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flush_icache_mm(vma->vm_mm, 0) |
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#ifndef CONFIG_SMP |
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#define flush_icache_all() local_flush_icache_all() |
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#define flush_icache_mm(mm, local) flush_icache_all() |
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#else /* CONFIG_SMP */ |
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void flush_icache_all(void); |
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void flush_icache_mm(struct mm_struct *mm, bool local); |
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#endif /* CONFIG_SMP */ |
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/* |
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* Bits in sys_riscv_flush_icache()'s flags argument. |
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*/ |
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#define SYS_RISCV_FLUSH_ICACHE_LOCAL 1UL |
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#define SYS_RISCV_FLUSH_ICACHE_ALL (SYS_RISCV_FLUSH_ICACHE_LOCAL) |
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#include <asm-generic/cacheflush.h> |
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#endif /* _ASM_RISCV_CACHEFLUSH_H */
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