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131 lines
3.8 KiB
131 lines
3.8 KiB
/* SPDX-License-Identifier: GPL-2.0-only */ |
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/* |
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* Copyright (c) 2015, Linaro Limited |
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*/ |
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#include <linux/linkage.h> |
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#include <linux/arm-smccc.h> |
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#include <asm/asm-offsets.h> |
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#include <asm/assembler.h> |
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#include <asm/thread_info.h> |
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/* |
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* If we have SMCCC v1.3 and (as is likely) no SVE state in |
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* the registers then set the SMCCC hint bit to say there's no |
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* need to preserve it. Do this by directly adjusting the SMCCC |
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* function value which is already stored in x0 ready to be called. |
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*/ |
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SYM_FUNC_START(__arm_smccc_sve_check) |
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ldr_l x16, smccc_has_sve_hint |
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cbz x16, 2f |
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get_current_task x16 |
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ldr x16, [x16, #TSK_TI_FLAGS] |
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tbnz x16, #TIF_FOREIGN_FPSTATE, 1f // Any live FP state? |
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tbnz x16, #TIF_SVE, 2f // Does that state include SVE? |
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1: orr x0, x0, ARM_SMCCC_1_3_SVE_HINT |
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2: ret |
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SYM_FUNC_END(__arm_smccc_sve_check) |
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EXPORT_SYMBOL(__arm_smccc_sve_check) |
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.macro SMCCC instr |
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stp x29, x30, [sp, #-16]! |
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mov x29, sp |
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alternative_if ARM64_SVE |
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bl __arm_smccc_sve_check |
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alternative_else_nop_endif |
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\instr #0 |
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ldr x4, [sp, #16] |
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stp x0, x1, [x4, #ARM_SMCCC_RES_X0_OFFS] |
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stp x2, x3, [x4, #ARM_SMCCC_RES_X2_OFFS] |
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ldr x4, [sp, #24] |
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cbz x4, 1f /* no quirk structure */ |
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ldr x9, [x4, #ARM_SMCCC_QUIRK_ID_OFFS] |
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cmp x9, #ARM_SMCCC_QUIRK_QCOM_A6 |
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b.ne 1f |
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str x6, [x4, ARM_SMCCC_QUIRK_STATE_OFFS] |
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1: ldp x29, x30, [sp], #16 |
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ret |
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.endm |
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/* |
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* void arm_smccc_smc(unsigned long a0, unsigned long a1, unsigned long a2, |
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* unsigned long a3, unsigned long a4, unsigned long a5, |
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* unsigned long a6, unsigned long a7, struct arm_smccc_res *res, |
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* struct arm_smccc_quirk *quirk) |
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*/ |
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SYM_FUNC_START(__arm_smccc_smc) |
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SMCCC smc |
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SYM_FUNC_END(__arm_smccc_smc) |
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EXPORT_SYMBOL(__arm_smccc_smc) |
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/* |
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* void arm_smccc_hvc(unsigned long a0, unsigned long a1, unsigned long a2, |
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* unsigned long a3, unsigned long a4, unsigned long a5, |
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* unsigned long a6, unsigned long a7, struct arm_smccc_res *res, |
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* struct arm_smccc_quirk *quirk) |
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*/ |
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SYM_FUNC_START(__arm_smccc_hvc) |
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SMCCC hvc |
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SYM_FUNC_END(__arm_smccc_hvc) |
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EXPORT_SYMBOL(__arm_smccc_hvc) |
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.macro SMCCC_1_2 instr |
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/* Save `res` and free a GPR that won't be clobbered */ |
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stp x1, x19, [sp, #-16]! |
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/* Ensure `args` won't be clobbered while loading regs in next step */ |
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mov x19, x0 |
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/* Load the registers x0 - x17 from the struct arm_smccc_1_2_regs */ |
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ldp x0, x1, [x19, #ARM_SMCCC_1_2_REGS_X0_OFFS] |
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ldp x2, x3, [x19, #ARM_SMCCC_1_2_REGS_X2_OFFS] |
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ldp x4, x5, [x19, #ARM_SMCCC_1_2_REGS_X4_OFFS] |
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ldp x6, x7, [x19, #ARM_SMCCC_1_2_REGS_X6_OFFS] |
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ldp x8, x9, [x19, #ARM_SMCCC_1_2_REGS_X8_OFFS] |
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ldp x10, x11, [x19, #ARM_SMCCC_1_2_REGS_X10_OFFS] |
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ldp x12, x13, [x19, #ARM_SMCCC_1_2_REGS_X12_OFFS] |
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ldp x14, x15, [x19, #ARM_SMCCC_1_2_REGS_X14_OFFS] |
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ldp x16, x17, [x19, #ARM_SMCCC_1_2_REGS_X16_OFFS] |
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\instr #0 |
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/* Load the `res` from the stack */ |
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ldr x19, [sp] |
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/* Store the registers x0 - x17 into the result structure */ |
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stp x0, x1, [x19, #ARM_SMCCC_1_2_REGS_X0_OFFS] |
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stp x2, x3, [x19, #ARM_SMCCC_1_2_REGS_X2_OFFS] |
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stp x4, x5, [x19, #ARM_SMCCC_1_2_REGS_X4_OFFS] |
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stp x6, x7, [x19, #ARM_SMCCC_1_2_REGS_X6_OFFS] |
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stp x8, x9, [x19, #ARM_SMCCC_1_2_REGS_X8_OFFS] |
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stp x10, x11, [x19, #ARM_SMCCC_1_2_REGS_X10_OFFS] |
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stp x12, x13, [x19, #ARM_SMCCC_1_2_REGS_X12_OFFS] |
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stp x14, x15, [x19, #ARM_SMCCC_1_2_REGS_X14_OFFS] |
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stp x16, x17, [x19, #ARM_SMCCC_1_2_REGS_X16_OFFS] |
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/* Restore original x19 */ |
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ldp xzr, x19, [sp], #16 |
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ret |
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.endm |
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/* |
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* void arm_smccc_1_2_hvc(const struct arm_smccc_1_2_regs *args, |
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* struct arm_smccc_1_2_regs *res); |
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*/ |
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SYM_FUNC_START(arm_smccc_1_2_hvc) |
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SMCCC_1_2 hvc |
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SYM_FUNC_END(arm_smccc_1_2_hvc) |
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EXPORT_SYMBOL(arm_smccc_1_2_hvc) |
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/* |
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* void arm_smccc_1_2_smc(const struct arm_smccc_1_2_regs *args, |
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* struct arm_smccc_1_2_regs *res); |
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*/ |
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SYM_FUNC_START(arm_smccc_1_2_smc) |
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SMCCC_1_2 smc |
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SYM_FUNC_END(arm_smccc_1_2_smc) |
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EXPORT_SYMBOL(arm_smccc_1_2_smc)
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