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1114 lines
19 KiB
1114 lines
19 KiB
// SPDX-License-Identifier: GPL-2.0 |
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/dts-v1/; |
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#include <dt-bindings/input/linux-event-codes.h> |
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#include <dt-bindings/input/gpio-keys.h> |
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#include "tegra186-p3310.dtsi" |
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/ { |
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model = "NVIDIA Jetson TX2 Developer Kit"; |
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compatible = "nvidia,p2771-0000", "nvidia,tegra186"; |
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aconnect@2900000 { |
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status = "okay"; |
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dma-controller@2930000 { |
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status = "okay"; |
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}; |
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interrupt-controller@2a40000 { |
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status = "okay"; |
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}; |
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ahub@2900800 { |
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status = "okay"; |
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ports { |
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#address-cells = <1>; |
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#size-cells = <0>; |
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port@0 { |
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reg = <0x0>; |
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xbar_admaif0_ep: endpoint { |
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remote-endpoint = <&admaif0_ep>; |
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}; |
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}; |
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port@1 { |
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reg = <0x1>; |
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xbar_admaif1_ep: endpoint { |
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remote-endpoint = <&admaif1_ep>; |
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}; |
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}; |
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port@2 { |
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reg = <0x2>; |
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xbar_admaif2_ep: endpoint { |
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remote-endpoint = <&admaif2_ep>; |
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}; |
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}; |
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port@3 { |
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reg = <0x3>; |
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xbar_admaif3_ep: endpoint { |
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remote-endpoint = <&admaif3_ep>; |
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}; |
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}; |
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port@4 { |
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reg = <0x4>; |
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xbar_admaif4_ep: endpoint { |
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remote-endpoint = <&admaif4_ep>; |
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}; |
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}; |
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port@5 { |
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reg = <0x5>; |
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xbar_admaif5_ep: endpoint { |
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remote-endpoint = <&admaif5_ep>; |
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}; |
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}; |
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port@6 { |
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reg = <0x6>; |
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xbar_admaif6_ep: endpoint { |
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remote-endpoint = <&admaif6_ep>; |
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}; |
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}; |
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port@7 { |
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reg = <0x7>; |
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xbar_admaif7_ep: endpoint { |
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remote-endpoint = <&admaif7_ep>; |
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}; |
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}; |
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port@8 { |
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reg = <0x8>; |
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xbar_admaif8_ep: endpoint { |
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remote-endpoint = <&admaif8_ep>; |
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}; |
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}; |
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port@9 { |
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reg = <0x9>; |
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xbar_admaif9_ep: endpoint { |
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remote-endpoint = <&admaif9_ep>; |
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}; |
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}; |
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port@a { |
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reg = <0xa>; |
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xbar_admaif10_ep: endpoint { |
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remote-endpoint = <&admaif10_ep>; |
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}; |
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}; |
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port@b { |
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reg = <0xb>; |
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xbar_admaif11_ep: endpoint { |
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remote-endpoint = <&admaif11_ep>; |
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}; |
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}; |
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port@c { |
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reg = <0xc>; |
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xbar_admaif12_ep: endpoint { |
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remote-endpoint = <&admaif12_ep>; |
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}; |
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}; |
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port@d { |
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reg = <0xd>; |
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xbar_admaif13_ep: endpoint { |
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remote-endpoint = <&admaif13_ep>; |
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}; |
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}; |
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port@e { |
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reg = <0xe>; |
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xbar_admaif14_ep: endpoint { |
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remote-endpoint = <&admaif14_ep>; |
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}; |
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}; |
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port@f { |
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reg = <0xf>; |
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xbar_admaif15_ep: endpoint { |
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remote-endpoint = <&admaif15_ep>; |
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}; |
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}; |
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port@10 { |
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reg = <0x10>; |
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xbar_admaif16_ep: endpoint { |
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remote-endpoint = <&admaif16_ep>; |
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}; |
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}; |
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port@11 { |
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reg = <0x11>; |
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xbar_admaif17_ep: endpoint { |
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remote-endpoint = <&admaif17_ep>; |
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}; |
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}; |
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port@12 { |
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reg = <0x12>; |
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xbar_admaif18_ep: endpoint { |
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remote-endpoint = <&admaif18_ep>; |
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}; |
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}; |
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port@13 { |
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reg = <0x13>; |
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xbar_admaif19_ep: endpoint { |
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remote-endpoint = <&admaif19_ep>; |
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}; |
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}; |
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xbar_i2s1_port: port@14 { |
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reg = <0x14>; |
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xbar_i2s1_ep: endpoint { |
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remote-endpoint = <&i2s1_cif_ep>; |
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}; |
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}; |
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xbar_i2s2_port: port@15 { |
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reg = <0x15>; |
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xbar_i2s2_ep: endpoint { |
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remote-endpoint = <&i2s2_cif_ep>; |
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}; |
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}; |
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xbar_i2s3_port: port@16 { |
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reg = <0x16>; |
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xbar_i2s3_ep: endpoint { |
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remote-endpoint = <&i2s3_cif_ep>; |
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}; |
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}; |
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xbar_i2s4_port: port@17 { |
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reg = <0x17>; |
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xbar_i2s4_ep: endpoint { |
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remote-endpoint = <&i2s4_cif_ep>; |
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}; |
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}; |
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xbar_i2s5_port: port@18 { |
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reg = <0x18>; |
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xbar_i2s5_ep: endpoint { |
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remote-endpoint = <&i2s5_cif_ep>; |
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}; |
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}; |
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xbar_i2s6_port: port@19 { |
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reg = <0x19>; |
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xbar_i2s6_ep: endpoint { |
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remote-endpoint = <&i2s6_cif_ep>; |
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}; |
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}; |
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xbar_dmic1_port: port@1a { |
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reg = <0x1a>; |
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xbar_dmic1_ep: endpoint { |
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remote-endpoint = <&dmic1_cif_ep>; |
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}; |
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}; |
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xbar_dmic2_port: port@1b { |
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reg = <0x1b>; |
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xbar_dmic2_ep: endpoint { |
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remote-endpoint = <&dmic2_cif_ep>; |
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}; |
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}; |
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xbar_dmic3_port: port@1c { |
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reg = <0x1c>; |
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xbar_dmic3_ep: endpoint { |
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remote-endpoint = <&dmic3_cif_ep>; |
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}; |
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}; |
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xbar_dspk1_port: port@1e { |
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reg = <0x1e>; |
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xbar_dspk1_ep: endpoint { |
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remote-endpoint = <&dspk1_cif_ep>; |
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}; |
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}; |
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xbar_dspk2_port: port@1f { |
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reg = <0x1f>; |
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xbar_dspk2_ep: endpoint { |
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remote-endpoint = <&dspk2_cif_ep>; |
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}; |
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}; |
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}; |
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admaif@290f000 { |
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status = "okay"; |
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ports { |
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#address-cells = <1>; |
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#size-cells = <0>; |
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admaif0_port: port@0 { |
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reg = <0x0>; |
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admaif0_ep: endpoint { |
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remote-endpoint = <&xbar_admaif0_ep>; |
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}; |
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}; |
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admaif1_port: port@1 { |
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reg = <0x1>; |
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admaif1_ep: endpoint { |
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remote-endpoint = <&xbar_admaif1_ep>; |
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}; |
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}; |
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admaif2_port: port@2 { |
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reg = <0x2>; |
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admaif2_ep: endpoint { |
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remote-endpoint = <&xbar_admaif2_ep>; |
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}; |
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}; |
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admaif3_port: port@3 { |
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reg = <0x3>; |
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admaif3_ep: endpoint { |
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remote-endpoint = <&xbar_admaif3_ep>; |
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}; |
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}; |
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admaif4_port: port@4 { |
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reg = <0x4>; |
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admaif4_ep: endpoint { |
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remote-endpoint = <&xbar_admaif4_ep>; |
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}; |
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}; |
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admaif5_port: port@5 { |
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reg = <0x5>; |
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admaif5_ep: endpoint { |
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remote-endpoint = <&xbar_admaif5_ep>; |
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}; |
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}; |
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admaif6_port: port@6 { |
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reg = <0x6>; |
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admaif6_ep: endpoint { |
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remote-endpoint = <&xbar_admaif6_ep>; |
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}; |
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}; |
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admaif7_port: port@7 { |
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reg = <0x7>; |
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admaif7_ep: endpoint { |
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remote-endpoint = <&xbar_admaif7_ep>; |
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}; |
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}; |
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admaif8_port: port@8 { |
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reg = <0x8>; |
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admaif8_ep: endpoint { |
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remote-endpoint = <&xbar_admaif8_ep>; |
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}; |
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}; |
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admaif9_port: port@9 { |
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reg = <0x9>; |
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admaif9_ep: endpoint { |
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remote-endpoint = <&xbar_admaif9_ep>; |
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}; |
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}; |
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admaif10_port: port@a { |
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reg = <0xa>; |
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admaif10_ep: endpoint { |
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remote-endpoint = <&xbar_admaif10_ep>; |
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}; |
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}; |
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admaif11_port: port@b { |
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reg = <0xb>; |
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admaif11_ep: endpoint { |
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remote-endpoint = <&xbar_admaif11_ep>; |
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}; |
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}; |
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admaif12_port: port@c { |
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reg = <0xc>; |
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admaif12_ep: endpoint { |
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remote-endpoint = <&xbar_admaif12_ep>; |
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}; |
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}; |
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admaif13_port: port@d { |
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reg = <0xd>; |
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admaif13_ep: endpoint { |
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remote-endpoint = <&xbar_admaif13_ep>; |
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}; |
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}; |
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admaif14_port: port@e { |
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reg = <0xe>; |
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admaif14_ep: endpoint { |
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remote-endpoint = <&xbar_admaif14_ep>; |
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}; |
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}; |
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admaif15_port: port@f { |
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reg = <0xf>; |
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admaif15_ep: endpoint { |
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remote-endpoint = <&xbar_admaif15_ep>; |
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}; |
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}; |
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admaif16_port: port@10 { |
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reg = <0x10>; |
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admaif16_ep: endpoint { |
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remote-endpoint = <&xbar_admaif16_ep>; |
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}; |
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}; |
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admaif17_port: port@11 { |
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reg = <0x11>; |
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admaif17_ep: endpoint { |
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remote-endpoint = <&xbar_admaif17_ep>; |
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}; |
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}; |
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admaif18_port: port@12 { |
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reg = <0x12>; |
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admaif18_ep: endpoint { |
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remote-endpoint = <&xbar_admaif18_ep>; |
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}; |
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}; |
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admaif19_port: port@13 { |
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reg = <0x13>; |
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admaif19_ep: endpoint { |
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remote-endpoint = <&xbar_admaif19_ep>; |
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}; |
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}; |
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}; |
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}; |
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i2s@2901000 { |
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status = "okay"; |
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ports { |
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#address-cells = <1>; |
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#size-cells = <0>; |
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port@0 { |
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reg = <0>; |
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i2s1_cif_ep: endpoint { |
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remote-endpoint = <&xbar_i2s1_ep>; |
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}; |
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}; |
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i2s1_port: port@1 { |
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reg = <1>; |
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i2s1_dap_ep: endpoint { |
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dai-format = "i2s"; |
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/* Placeholder for external Codec */ |
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}; |
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}; |
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}; |
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}; |
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i2s@2901100 { |
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status = "okay"; |
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ports { |
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#address-cells = <1>; |
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#size-cells = <0>; |
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port@0 { |
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reg = <0>; |
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i2s2_cif_ep: endpoint { |
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remote-endpoint = <&xbar_i2s2_ep>; |
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}; |
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}; |
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i2s2_port: port@1 { |
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reg = <1>; |
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i2s2_dap_ep: endpoint { |
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dai-format = "i2s"; |
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/* Placeholder for external Codec */ |
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}; |
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}; |
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}; |
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}; |
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i2s@2901200 { |
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status = "okay"; |
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ports { |
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#address-cells = <1>; |
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#size-cells = <0>; |
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port@0 { |
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reg = <0>; |
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i2s3_cif_ep: endpoint { |
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remote-endpoint = <&xbar_i2s3_ep>; |
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}; |
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}; |
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i2s3_port: port@1 { |
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reg = <1>; |
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i2s3_dap_ep: endpoint { |
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dai-format = "i2s"; |
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/* Placeholder for external Codec */ |
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}; |
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}; |
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}; |
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}; |
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i2s@2901300 { |
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status = "okay"; |
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ports { |
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#address-cells = <1>; |
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#size-cells = <0>; |
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port@0 { |
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reg = <0>; |
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i2s4_cif_ep: endpoint { |
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remote-endpoint = <&xbar_i2s4_ep>; |
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}; |
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}; |
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i2s4_port: port@1 { |
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reg = <1>; |
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i2s4_dap_ep: endpoint { |
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dai-format = "i2s"; |
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/* Placeholder for external Codec */ |
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}; |
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}; |
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}; |
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}; |
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i2s@2901400 { |
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status = "okay"; |
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ports { |
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#address-cells = <1>; |
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#size-cells = <0>; |
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port@0 { |
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reg = <0>; |
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i2s5_cif_ep: endpoint { |
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remote-endpoint = <&xbar_i2s5_ep>; |
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}; |
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}; |
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i2s5_port: port@1 { |
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reg = <1>; |
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i2s5_dap_ep: endpoint { |
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dai-format = "i2s"; |
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/* Placeholder for external Codec */ |
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}; |
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}; |
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}; |
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}; |
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i2s@2901500 { |
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status = "okay"; |
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|
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ports { |
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#address-cells = <1>; |
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#size-cells = <0>; |
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port@0 { |
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reg = <0>; |
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i2s6_cif_ep: endpoint { |
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remote-endpoint = <&xbar_i2s6_ep>; |
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}; |
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}; |
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i2s6_port: port@1 { |
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reg = <1>; |
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i2s6_dap_ep: endpoint { |
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dai-format = "i2s"; |
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/* Placeholder for external Codec */ |
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}; |
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}; |
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}; |
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}; |
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|
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dmic@2904000 { |
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status = "okay"; |
|
|
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ports { |
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#address-cells = <1>; |
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#size-cells = <0>; |
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port@0 { |
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reg = <0>; |
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dmic1_cif_ep: endpoint { |
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remote-endpoint = <&xbar_dmic1_ep>; |
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}; |
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}; |
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dmic1_port: port@1 { |
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reg = <1>; |
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dmic1_dap_ep: endpoint { |
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/* Place holder for external Codec */ |
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}; |
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}; |
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}; |
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}; |
|
|
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dmic@2904100 { |
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status = "okay"; |
|
|
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ports { |
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#address-cells = <1>; |
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#size-cells = <0>; |
|
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port@0 { |
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reg = <0>; |
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dmic2_cif_ep: endpoint { |
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remote-endpoint = <&xbar_dmic2_ep>; |
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}; |
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}; |
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dmic2_port: port@1 { |
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reg = <1>; |
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dmic2_dap_ep: endpoint { |
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/* Place holder for external Codec */ |
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}; |
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}; |
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}; |
|
}; |
|
|
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dmic@2904200 { |
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status = "okay"; |
|
|
|
ports { |
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#address-cells = <1>; |
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#size-cells = <0>; |
|
|
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port@0 { |
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reg = <0>; |
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dmic3_cif_ep: endpoint { |
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remote-endpoint = <&xbar_dmic3_ep>; |
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}; |
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}; |
|
|
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dmic3_port: port@1 { |
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reg = <1>; |
|
|
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dmic3_dap_ep: endpoint { |
|
/* Place holder for external Codec */ |
|
}; |
|
}; |
|
}; |
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}; |
|
|
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dspk@2905000 { |
|
status = "okay"; |
|
|
|
ports { |
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#address-cells = <1>; |
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#size-cells = <0>; |
|
|
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port@0 { |
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reg = <0>; |
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|
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dspk1_cif_ep: endpoint { |
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remote-endpoint = <&xbar_dspk1_ep>; |
|
}; |
|
}; |
|
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dspk1_port: port@1 { |
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reg = <1>; |
|
|
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dspk1_dap_ep: endpoint { |
|
/* Place holder for external Codec */ |
|
}; |
|
}; |
|
}; |
|
}; |
|
|
|
dspk@2905100 { |
|
status = "okay"; |
|
|
|
ports { |
|
#address-cells = <1>; |
|
#size-cells = <0>; |
|
|
|
port@0 { |
|
reg = <0>; |
|
|
|
dspk2_cif_ep: endpoint { |
|
remote-endpoint = <&xbar_dspk2_ep>; |
|
}; |
|
}; |
|
|
|
dspk2_port: port@1 { |
|
reg = <1>; |
|
|
|
dspk2_dap_ep: endpoint { |
|
/* Place holder for external Codec */ |
|
}; |
|
}; |
|
}; |
|
}; |
|
}; |
|
}; |
|
|
|
i2c@3160000 { |
|
power-monitor@42 { |
|
compatible = "ti,ina3221"; |
|
reg = <0x42>; |
|
#address-cells = <1>; |
|
#size-cells = <0>; |
|
|
|
channel@0 { |
|
reg = <0x0>; |
|
label = "VDD_MUX"; |
|
shunt-resistor-micro-ohms = <20000>; |
|
}; |
|
|
|
channel@1 { |
|
reg = <0x1>; |
|
label = "VDD_5V0_IO_SYS"; |
|
shunt-resistor-micro-ohms = <5000>; |
|
}; |
|
|
|
channel@2 { |
|
reg = <0x2>; |
|
label = "VDD_3V3_SYS"; |
|
shunt-resistor-micro-ohms = <10000>; |
|
}; |
|
}; |
|
|
|
power-monitor@43 { |
|
compatible = "ti,ina3221"; |
|
reg = <0x43>; |
|
#address-cells = <1>; |
|
#size-cells = <0>; |
|
|
|
channel@0 { |
|
reg = <0x0>; |
|
label = "VDD_3V3_IO_SLP"; |
|
shunt-resistor-micro-ohms = <10000>; |
|
}; |
|
|
|
channel@1 { |
|
reg = <0x1>; |
|
label = "VDD_1V8_IO"; |
|
shunt-resistor-micro-ohms = <10000>; |
|
}; |
|
|
|
channel@2 { |
|
reg = <0x2>; |
|
label = "VDD_M2_IN"; |
|
shunt-resistor-micro-ohms = <10000>; |
|
}; |
|
}; |
|
|
|
exp1: gpio@74 { |
|
compatible = "ti,tca9539"; |
|
reg = <0x74>; |
|
|
|
interrupt-parent = <&gpio>; |
|
interrupts = <TEGRA186_MAIN_GPIO(Y, 0) |
|
GPIO_ACTIVE_LOW>; |
|
|
|
#gpio-cells = <2>; |
|
gpio-controller; |
|
|
|
vcc-supply = <&vdd_3v3_sys>; |
|
}; |
|
|
|
exp2: gpio@77 { |
|
compatible = "ti,tca9539"; |
|
reg = <0x77>; |
|
|
|
interrupt-parent = <&gpio>; |
|
interrupts = <TEGRA186_MAIN_GPIO(Y, 6) |
|
GPIO_ACTIVE_LOW>; |
|
|
|
#gpio-cells = <2>; |
|
gpio-controller; |
|
|
|
vcc-supply = <&vdd_1v8>; |
|
}; |
|
}; |
|
|
|
/* SDMMC1 (SD/MMC) */ |
|
mmc@3400000 { |
|
status = "okay"; |
|
|
|
vmmc-supply = <&vdd_sd>; |
|
}; |
|
|
|
hda@3510000 { |
|
nvidia,model = "NVIDIA Jetson TX2 HDA"; |
|
status = "okay"; |
|
}; |
|
|
|
padctl@3520000 { |
|
status = "okay"; |
|
|
|
avdd-pll-erefeut-supply = <&vdd_1v8_pll>; |
|
avdd-usb-supply = <&vdd_3v3_sys>; |
|
vclamp-usb-supply = <&vdd_1v8>; |
|
vddio-hsic-supply = <&gnd>; |
|
|
|
pads { |
|
usb2 { |
|
status = "okay"; |
|
|
|
lanes { |
|
micro_b: usb2-0 { |
|
nvidia,function = "xusb"; |
|
status = "okay"; |
|
}; |
|
|
|
usb2-1 { |
|
nvidia,function = "xusb"; |
|
status = "okay"; |
|
}; |
|
|
|
usb2-2 { |
|
nvidia,function = "xusb"; |
|
status = "okay"; |
|
}; |
|
}; |
|
}; |
|
|
|
usb3 { |
|
status = "okay"; |
|
|
|
lanes { |
|
usb3-0 { |
|
nvidia,function = "xusb"; |
|
status = "okay"; |
|
}; |
|
|
|
usb3-1 { |
|
nvidia,function = "xusb"; |
|
status = "okay"; |
|
}; |
|
|
|
usb3-2 { |
|
nvidia,function = "xusb"; |
|
status = "okay"; |
|
}; |
|
}; |
|
}; |
|
}; |
|
|
|
ports { |
|
usb2-0 { |
|
status = "okay"; |
|
mode = "otg"; |
|
vbus-supply = <&vdd_usb0>; |
|
usb-role-switch; |
|
|
|
connector { |
|
compatible = "gpio-usb-b-connector", |
|
"usb-b-connector"; |
|
label = "micro-USB"; |
|
type = "micro"; |
|
vbus-gpios = <&gpio |
|
TEGRA186_MAIN_GPIO(X, 7) |
|
GPIO_ACTIVE_LOW>; |
|
id-gpios = <&pmic 0 GPIO_ACTIVE_HIGH>; |
|
}; |
|
}; |
|
|
|
usb2-1 { |
|
status = "okay"; |
|
mode = "host"; |
|
|
|
vbus-supply = <&vdd_usb1>; |
|
}; |
|
|
|
usb3-0 { |
|
nvidia,usb2-companion = <1>; |
|
vbus-supply = <&vdd_usb1>; |
|
status = "okay"; |
|
}; |
|
}; |
|
}; |
|
|
|
usb@3530000 { |
|
status = "okay"; |
|
|
|
phys = <&{/padctl@3520000/pads/usb2/lanes/usb2-0}>, |
|
<&{/padctl@3520000/pads/usb2/lanes/usb2-1}>, |
|
<&{/padctl@3520000/pads/usb3/lanes/usb3-0}>; |
|
phy-names = "usb2-0", "usb2-1", "usb3-0"; |
|
}; |
|
|
|
usb@3550000 { |
|
status = "okay"; |
|
|
|
phys = <µ_b>; |
|
phy-names = "usb2-0"; |
|
}; |
|
|
|
i2c@c250000 { |
|
/* carrier board ID EEPROM */ |
|
eeprom@57 { |
|
compatible = "atmel,24c02"; |
|
reg = <0x57>; |
|
|
|
label = "system"; |
|
vcc-supply = <&vdd_1v8>; |
|
address-width = <8>; |
|
pagesize = <8>; |
|
size = <256>; |
|
read-only; |
|
}; |
|
}; |
|
|
|
pcie@10003000 { |
|
status = "okay"; |
|
|
|
dvdd-pex-supply = <&vdd_pex>; |
|
hvdd-pex-pll-supply = <&vdd_1v8>; |
|
hvdd-pex-supply = <&vdd_1v8>; |
|
vddio-pexctl-aud-supply = <&vdd_1v8>; |
|
|
|
pci@1,0 { |
|
nvidia,num-lanes = <4>; |
|
status = "okay"; |
|
}; |
|
|
|
pci@2,0 { |
|
nvidia,num-lanes = <0>; |
|
status = "disabled"; |
|
}; |
|
|
|
pci@3,0 { |
|
nvidia,num-lanes = <1>; |
|
status = "disabled"; |
|
}; |
|
}; |
|
|
|
host1x@13e00000 { |
|
status = "okay"; |
|
|
|
dpaux@15040000 { |
|
status = "okay"; |
|
}; |
|
|
|
display-hub@15200000 { |
|
status = "okay"; |
|
}; |
|
|
|
dsi@15300000 { |
|
status = "disabled"; |
|
}; |
|
|
|
/* DP on E3320 */ |
|
sor@15540000 { |
|
status = "okay"; |
|
|
|
avdd-io-hdmi-dp-supply = <&vdd_hdmi_1v05>; |
|
vdd-hdmi-dp-pll-supply = <&vdd_1v8_ap>; |
|
|
|
nvidia,dpaux = <&dpaux>; |
|
}; |
|
|
|
sor@15580000 { |
|
status = "okay"; |
|
|
|
avdd-io-hdmi-dp-supply = <&vdd_hdmi_1v05>; |
|
vdd-hdmi-dp-pll-supply = <&vdd_1v8_ap>; |
|
hdmi-supply = <&vdd_hdmi>; |
|
|
|
nvidia,ddc-i2c-bus = <&ddc>; |
|
nvidia,hpd-gpio = <&gpio TEGRA186_MAIN_GPIO(P, 1) |
|
GPIO_ACTIVE_LOW>; |
|
}; |
|
|
|
dpaux@155c0000 { |
|
status = "okay"; |
|
}; |
|
}; |
|
|
|
sata@3507000 { |
|
status = "okay"; |
|
}; |
|
|
|
gpio-keys { |
|
compatible = "gpio-keys"; |
|
|
|
power { |
|
label = "Power"; |
|
gpios = <&gpio_aon TEGRA186_AON_GPIO(FF, 0) |
|
GPIO_ACTIVE_LOW>; |
|
linux,input-type = <EV_KEY>; |
|
linux,code = <KEY_POWER>; |
|
debounce-interval = <10>; |
|
wakeup-event-action = <EV_ACT_ASSERTED>; |
|
wakeup-source; |
|
}; |
|
|
|
volume-up { |
|
label = "Volume Up"; |
|
gpios = <&gpio_aon TEGRA186_AON_GPIO(FF, 1) |
|
GPIO_ACTIVE_LOW>; |
|
linux,input-type = <EV_KEY>; |
|
linux,code = <KEY_VOLUMEUP>; |
|
debounce-interval = <10>; |
|
}; |
|
|
|
volume-down { |
|
label = "Volume Down"; |
|
gpios = <&gpio_aon TEGRA186_AON_GPIO(FF, 2) |
|
GPIO_ACTIVE_LOW>; |
|
linux,input-type = <EV_KEY>; |
|
linux,code = <KEY_VOLUMEDOWN>; |
|
debounce-interval = <10>; |
|
}; |
|
}; |
|
|
|
vdd_sd: regulator@100 { |
|
compatible = "regulator-fixed"; |
|
regulator-name = "SD_CARD_SW_PWR"; |
|
regulator-min-microvolt = <3300000>; |
|
regulator-max-microvolt = <3300000>; |
|
|
|
gpio = <&gpio TEGRA186_MAIN_GPIO(P, 6) GPIO_ACTIVE_HIGH>; |
|
enable-active-high; |
|
|
|
vin-supply = <&vdd_3v3_sys>; |
|
}; |
|
|
|
vdd_hdmi: regulator@101 { |
|
compatible = "regulator-fixed"; |
|
regulator-name = "VDD_HDMI_5V0"; |
|
regulator-min-microvolt = <5000000>; |
|
regulator-max-microvolt = <5000000>; |
|
|
|
gpio = <&exp1 14 GPIO_ACTIVE_HIGH>; |
|
enable-active-high; |
|
|
|
vin-supply = <&vdd_5v0_sys>; |
|
}; |
|
|
|
vdd_usb0: regulator@102 { |
|
compatible = "regulator-fixed"; |
|
regulator-name = "VDD_USB0"; |
|
regulator-min-microvolt = <5000000>; |
|
regulator-max-microvolt = <5000000>; |
|
|
|
gpio = <&gpio TEGRA186_MAIN_GPIO(L, 4) GPIO_ACTIVE_HIGH>; |
|
enable-active-high; |
|
|
|
vin-supply = <&vdd_5v0_sys>; |
|
}; |
|
|
|
vdd_usb1: regulator@103 { |
|
compatible = "regulator-fixed"; |
|
regulator-name = "VDD_USB1"; |
|
regulator-min-microvolt = <5000000>; |
|
regulator-max-microvolt = <5000000>; |
|
|
|
gpio = <&gpio TEGRA186_MAIN_GPIO(L, 5) GPIO_ACTIVE_HIGH>; |
|
enable-active-high; |
|
|
|
vin-supply = <&vdd_5v0_sys>; |
|
}; |
|
|
|
sound { |
|
compatible = "nvidia,tegra186-audio-graph-card"; |
|
status = "okay"; |
|
|
|
dais = /* FE */ |
|
<&admaif0_port>, <&admaif1_port>, <&admaif2_port>, <&admaif3_port>, |
|
<&admaif4_port>, <&admaif5_port>, <&admaif6_port>, <&admaif7_port>, |
|
<&admaif8_port>, <&admaif9_port>, <&admaif10_port>, <&admaif11_port>, |
|
<&admaif12_port>, <&admaif13_port>, <&admaif14_port>, <&admaif15_port>, |
|
<&admaif16_port>, <&admaif17_port>, <&admaif18_port>, <&admaif19_port>, |
|
/* Router */ |
|
<&xbar_i2s1_port>, <&xbar_i2s2_port>, <&xbar_i2s3_port>, |
|
<&xbar_i2s4_port>, <&xbar_i2s5_port>, <&xbar_i2s6_port>, |
|
<&xbar_dmic1_port>, <&xbar_dmic2_port>, <&xbar_dmic3_port>, |
|
<&xbar_dspk1_port>, <&xbar_dspk2_port>, |
|
/* I/O */ |
|
<&i2s1_port>, <&i2s2_port>, <&i2s3_port>, <&i2s4_port>, |
|
<&i2s5_port>, <&i2s6_port>, <&dmic1_port>, <&dmic2_port>, |
|
<&dmic3_port>, <&dspk1_port>, <&dspk2_port>; |
|
|
|
label = "NVIDIA Jetson TX2 APE"; |
|
}; |
|
};
|
|
|