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522 lines
12 KiB
522 lines
12 KiB
// SPDX-License-Identifier: (GPL-2.0+ OR MIT) |
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/* |
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* Device Tree Include file for Marvell Armada 37xx family of SoCs. |
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* |
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* Copyright (C) 2016 Marvell |
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* |
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* Gregory CLEMENT <[email protected]> |
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* |
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*/ |
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#include <dt-bindings/interrupt-controller/arm-gic.h> |
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/ { |
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model = "Marvell Armada 37xx SoC"; |
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compatible = "marvell,armada3700"; |
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interrupt-parent = <&gic>; |
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#address-cells = <2>; |
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#size-cells = <2>; |
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aliases { |
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serial0 = &uart0; |
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serial1 = &uart1; |
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}; |
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reserved-memory { |
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#address-cells = <2>; |
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#size-cells = <2>; |
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ranges; |
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/* |
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* The PSCI firmware region depicted below is the default one |
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* and should be updated by the bootloader. |
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*/ |
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psci-area@4000000 { |
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reg = <0 0x4000000 0 0x200000>; |
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no-map; |
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}; |
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}; |
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cpus { |
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#address-cells = <1>; |
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#size-cells = <0>; |
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cpu0: cpu@0 { |
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device_type = "cpu"; |
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compatible = "arm,cortex-a53"; |
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reg = <0>; |
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clocks = <&nb_periph_clk 16>; |
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enable-method = "psci"; |
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}; |
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}; |
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psci { |
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compatible = "arm,psci-0.2"; |
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method = "smc"; |
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}; |
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timer { |
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compatible = "arm,armv8-timer"; |
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interrupts = <GIC_PPI 13 IRQ_TYPE_LEVEL_HIGH>, |
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<GIC_PPI 14 IRQ_TYPE_LEVEL_HIGH>, |
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<GIC_PPI 11 IRQ_TYPE_LEVEL_HIGH>, |
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<GIC_PPI 10 IRQ_TYPE_LEVEL_HIGH>; |
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}; |
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pmu { |
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compatible = "arm,armv8-pmuv3"; |
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interrupts = <GIC_PPI 7 IRQ_TYPE_LEVEL_HIGH>; |
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}; |
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soc { |
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compatible = "simple-bus"; |
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#address-cells = <2>; |
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#size-cells = <2>; |
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ranges; |
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internal-regs@d0000000 { |
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#address-cells = <1>; |
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#size-cells = <1>; |
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compatible = "simple-bus"; |
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/* 32M internal register @ 0xd000_0000 */ |
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ranges = <0x0 0x0 0xd0000000 0x2000000>; |
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wdt: watchdog@8300 { |
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compatible = "marvell,armada-3700-wdt"; |
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reg = <0x8300 0x40>; |
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marvell,system-controller = <&cpu_misc>; |
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clocks = <&xtalclk>; |
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}; |
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cpu_misc: system-controller@d000 { |
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compatible = "marvell,armada-3700-cpu-misc", |
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"syscon"; |
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reg = <0xd000 0x1000>; |
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}; |
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spi0: spi@10600 { |
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compatible = "marvell,armada-3700-spi"; |
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#address-cells = <1>; |
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#size-cells = <0>; |
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reg = <0x10600 0xA00>; |
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clocks = <&nb_periph_clk 7>; |
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interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>; |
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num-cs = <4>; |
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status = "disabled"; |
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}; |
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i2c0: i2c@11000 { |
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compatible = "marvell,armada-3700-i2c"; |
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reg = <0x11000 0x24>; |
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#address-cells = <1>; |
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#size-cells = <0>; |
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clocks = <&nb_periph_clk 10>; |
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interrupts = <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>; |
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mrvl,i2c-fast-mode; |
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status = "disabled"; |
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}; |
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i2c1: i2c@11080 { |
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compatible = "marvell,armada-3700-i2c"; |
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reg = <0x11080 0x24>; |
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#address-cells = <1>; |
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#size-cells = <0>; |
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clocks = <&nb_periph_clk 9>; |
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interrupts = <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>; |
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mrvl,i2c-fast-mode; |
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status = "disabled"; |
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}; |
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avs: avs@11500 { |
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compatible = "marvell,armada-3700-avs", |
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"syscon"; |
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reg = <0x11500 0x40>; |
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}; |
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uart0: serial@12000 { |
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compatible = "marvell,armada-3700-uart"; |
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reg = <0x12000 0x18>; |
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clocks = <&xtalclk>; |
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interrupts = |
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<GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>, |
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<GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>, |
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<GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>; |
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interrupt-names = "uart-sum", "uart-tx", "uart-rx"; |
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status = "disabled"; |
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}; |
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uart1: serial@12200 { |
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compatible = "marvell,armada-3700-uart-ext"; |
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reg = <0x12200 0x30>; |
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clocks = <&xtalclk>; |
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interrupts = |
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<GIC_SPI 30 IRQ_TYPE_EDGE_RISING>, |
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<GIC_SPI 31 IRQ_TYPE_EDGE_RISING>; |
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interrupt-names = "uart-tx", "uart-rx"; |
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status = "disabled"; |
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}; |
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nb_periph_clk: nb-periph-clk@13000 { |
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compatible = "marvell,armada-3700-periph-clock-nb", |
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"syscon"; |
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reg = <0x13000 0x100>; |
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clocks = <&tbg 0>, <&tbg 1>, <&tbg 2>, |
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<&tbg 3>, <&xtalclk>; |
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#clock-cells = <1>; |
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}; |
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sb_periph_clk: sb-periph-clk@18000 { |
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compatible = "marvell,armada-3700-periph-clock-sb"; |
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reg = <0x18000 0x100>; |
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clocks = <&tbg 0>, <&tbg 1>, <&tbg 2>, |
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<&tbg 3>, <&xtalclk>; |
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#clock-cells = <1>; |
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}; |
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tbg: tbg@13200 { |
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compatible = "marvell,armada-3700-tbg-clock"; |
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reg = <0x13200 0x100>; |
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clocks = <&xtalclk>; |
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#clock-cells = <1>; |
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}; |
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pinctrl_nb: pinctrl@13800 { |
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compatible = "marvell,armada3710-nb-pinctrl", |
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"syscon", "simple-mfd"; |
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reg = <0x13800 0x100>, <0x13C00 0x20>; |
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/* MPP1[19:0] */ |
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gpionb: gpio { |
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#gpio-cells = <2>; |
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gpio-ranges = <&pinctrl_nb 0 0 36>; |
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gpio-controller; |
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interrupt-controller; |
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#interrupt-cells = <2>; |
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interrupts = |
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<GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH>, |
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<GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>, |
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<GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>, |
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<GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>, |
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<GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>, |
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<GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>, |
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<GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>, |
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<GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>, |
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<GIC_SPI 152 IRQ_TYPE_LEVEL_HIGH>, |
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<GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>, |
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<GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>, |
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<GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>; |
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}; |
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xtalclk: xtal-clk { |
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compatible = "marvell,armada-3700-xtal-clock"; |
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clock-output-names = "xtal"; |
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#clock-cells = <0>; |
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}; |
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spi_quad_pins: spi-quad-pins { |
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groups = "spi_quad"; |
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function = "spi"; |
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}; |
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spi_cs1_pins: spi-cs1-pins { |
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groups = "spi_cs1"; |
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function = "spi"; |
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}; |
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i2c1_pins: i2c1-pins { |
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groups = "i2c1"; |
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function = "i2c"; |
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}; |
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i2c2_pins: i2c2-pins { |
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groups = "i2c2"; |
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function = "i2c"; |
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}; |
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uart1_pins: uart1-pins { |
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groups = "uart1"; |
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function = "uart"; |
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}; |
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uart2_pins: uart2-pins { |
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groups = "uart2"; |
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function = "uart"; |
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}; |
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mmc_pins: mmc-pins { |
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groups = "emmc_nb"; |
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function = "emmc"; |
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}; |
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}; |
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nb_pm: syscon@14000 { |
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compatible = "marvell,armada-3700-nb-pm", |
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"syscon"; |
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reg = <0x14000 0x60>; |
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}; |
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comphy: phy@18300 { |
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compatible = "marvell,comphy-a3700"; |
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reg = <0x18300 0x300>, |
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<0x1F000 0x400>, |
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<0x5C000 0x400>, |
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<0xe0178 0x8>; |
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reg-names = "comphy", |
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"lane1_pcie_gbe", |
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"lane0_usb3_gbe", |
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"lane2_sata_usb3"; |
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#address-cells = <1>; |
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#size-cells = <0>; |
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comphy0: phy@0 { |
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reg = <0>; |
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#phy-cells = <1>; |
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}; |
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comphy1: phy@1 { |
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reg = <1>; |
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#phy-cells = <1>; |
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}; |
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comphy2: phy@2 { |
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reg = <2>; |
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#phy-cells = <1>; |
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}; |
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}; |
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pinctrl_sb: pinctrl@18800 { |
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compatible = "marvell,armada3710-sb-pinctrl", |
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"syscon", "simple-mfd"; |
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reg = <0x18800 0x100>, <0x18C00 0x20>; |
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/* MPP2[23:0] */ |
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gpiosb: gpio { |
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#gpio-cells = <2>; |
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gpio-ranges = <&pinctrl_sb 0 0 30>; |
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gpio-controller; |
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interrupt-controller; |
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#interrupt-cells = <2>; |
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interrupts = |
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<GIC_SPI 160 IRQ_TYPE_LEVEL_HIGH>, |
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<GIC_SPI 159 IRQ_TYPE_LEVEL_HIGH>, |
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<GIC_SPI 158 IRQ_TYPE_LEVEL_HIGH>, |
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<GIC_SPI 157 IRQ_TYPE_LEVEL_HIGH>, |
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<GIC_SPI 156 IRQ_TYPE_LEVEL_HIGH>; |
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}; |
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rgmii_pins: mii-pins { |
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groups = "rgmii"; |
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function = "mii"; |
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}; |
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smi_pins: smi-pins { |
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groups = "smi"; |
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function = "smi"; |
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}; |
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sdio_pins: sdio-pins { |
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groups = "sdio_sb"; |
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function = "sdio"; |
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}; |
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pcie_reset_pins: pcie-reset-pins { |
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groups = "pcie1"; /* this actually controls "pcie1_reset" */ |
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function = "gpio"; |
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}; |
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pcie_clkreq_pins: pcie-clkreq-pins { |
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groups = "pcie1_clkreq"; |
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function = "pcie"; |
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}; |
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}; |
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eth0: ethernet@30000 { |
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compatible = "marvell,armada-3700-neta"; |
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reg = <0x30000 0x4000>; |
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interrupts = <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>; |
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clocks = <&sb_periph_clk 8>; |
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status = "disabled"; |
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}; |
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mdio: mdio@32004 { |
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#address-cells = <1>; |
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#size-cells = <0>; |
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compatible = "marvell,orion-mdio"; |
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reg = <0x32004 0x4>; |
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}; |
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eth1: ethernet@40000 { |
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compatible = "marvell,armada-3700-neta"; |
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reg = <0x40000 0x4000>; |
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interrupts = <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>; |
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clocks = <&sb_periph_clk 7>; |
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status = "disabled"; |
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}; |
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usb3: usb@58000 { |
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compatible = "marvell,armada3700-xhci", |
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"generic-xhci"; |
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reg = <0x58000 0x4000>; |
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marvell,usb-misc-reg = <&usb32_syscon>; |
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interrupts = <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>; |
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clocks = <&sb_periph_clk 12>; |
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phys = <&comphy0 0>, <&usb2_utmi_otg_phy>; |
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phy-names = "usb3-phy", "usb2-utmi-otg-phy"; |
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status = "disabled"; |
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}; |
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usb2_utmi_otg_phy: phy@5d000 { |
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compatible = "marvell,a3700-utmi-otg-phy"; |
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reg = <0x5d000 0x800>; |
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marvell,usb-misc-reg = <&usb32_syscon>; |
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#phy-cells = <0>; |
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}; |
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usb32_syscon: system-controller@5d800 { |
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compatible = "marvell,armada-3700-usb2-host-device-misc", |
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"syscon"; |
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reg = <0x5d800 0x800>; |
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}; |
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usb2: usb@5e000 { |
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compatible = "marvell,armada-3700-ehci"; |
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reg = <0x5e000 0x1000>; |
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marvell,usb-misc-reg = <&usb2_syscon>; |
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interrupts = <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>; |
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phys = <&usb2_utmi_host_phy>; |
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phy-names = "usb2-utmi-host-phy"; |
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status = "disabled"; |
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}; |
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usb2_utmi_host_phy: phy@5f000 { |
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compatible = "marvell,a3700-utmi-host-phy"; |
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reg = <0x5f000 0x800>; |
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marvell,usb-misc-reg = <&usb2_syscon>; |
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#phy-cells = <0>; |
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}; |
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usb2_syscon: system-controller@5f800 { |
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compatible = "marvell,armada-3700-usb2-host-misc", |
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"syscon"; |
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reg = <0x5f800 0x800>; |
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}; |
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xor@60900 { |
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compatible = "marvell,armada-3700-xor"; |
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reg = <0x60900 0x100>, |
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<0x60b00 0x100>; |
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xor10 { |
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interrupts = <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>; |
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}; |
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xor11 { |
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interrupts = <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>; |
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}; |
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}; |
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crypto: crypto@90000 { |
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compatible = "inside-secure,safexcel-eip97ies"; |
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reg = <0x90000 0x20000>; |
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interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>, |
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<GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>, |
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<GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>, |
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<GIC_SPI 22 IRQ_TYPE_LEVEL_HIGH>, |
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<GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>, |
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<GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>; |
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interrupt-names = "mem", "ring0", "ring1", |
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"ring2", "ring3", "eip"; |
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clocks = <&nb_periph_clk 15>; |
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}; |
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rwtm: mailbox@b0000 { |
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compatible = "marvell,armada-3700-rwtm-mailbox"; |
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reg = <0xb0000 0x100>; |
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interrupts = <GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH>; |
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#mbox-cells = <1>; |
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}; |
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sdhci1: sdhci@d0000 { |
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compatible = "marvell,armada-3700-sdhci", |
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"marvell,sdhci-xenon"; |
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reg = <0xd0000 0x300>, |
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<0x1e808 0x4>; |
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interrupts = <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>; |
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clocks = <&nb_periph_clk 0>; |
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clock-names = "core"; |
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status = "disabled"; |
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}; |
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sdhci0: sdhci@d8000 { |
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compatible = "marvell,armada-3700-sdhci", |
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"marvell,sdhci-xenon"; |
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reg = <0xd8000 0x300>, |
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<0x17808 0x4>; |
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interrupts = <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>; |
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clocks = <&nb_periph_clk 0>; |
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clock-names = "core"; |
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status = "disabled"; |
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}; |
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sata: sata@e0000 { |
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compatible = "marvell,armada-3700-ahci"; |
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reg = <0xe0000 0x178>; |
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interrupts = <GIC_SPI 27 IRQ_TYPE_LEVEL_HIGH>; |
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clocks = <&nb_periph_clk 1>; |
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phys = <&comphy2 0>; |
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phy-names = "sata-phy"; |
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status = "disabled"; |
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}; |
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gic: interrupt-controller@1d00000 { |
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compatible = "arm,gic-v3"; |
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#interrupt-cells = <3>; |
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interrupt-controller; |
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reg = <0x1d00000 0x10000>, /* GICD */ |
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<0x1d40000 0x40000>, /* GICR */ |
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<0x1d80000 0x2000>, /* GICC */ |
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<0x1d90000 0x2000>, /* GICH */ |
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<0x1da0000 0x20000>; /* GICV */ |
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interrupts = <GIC_PPI 9 IRQ_TYPE_LEVEL_HIGH>; |
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}; |
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}; |
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pcie0: pcie@d0070000 { |
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compatible = "marvell,armada-3700-pcie"; |
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device_type = "pci"; |
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status = "disabled"; |
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reg = <0 0xd0070000 0 0x20000>; |
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#address-cells = <3>; |
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#size-cells = <2>; |
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bus-range = <0x00 0xff>; |
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interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>; |
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#interrupt-cells = <1>; |
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msi-parent = <&pcie0>; |
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msi-controller; |
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/* |
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* The 128 MiB address range [0xe8000000-0xf0000000] is |
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* dedicated for PCIe and can be assigned to 8 windows |
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* with size a power of two. Use one 64 KiB window for |
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* IO at the end and the remaining seven windows |
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* (totaling 127 MiB) for MEM. |
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*/ |
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ranges = <0x82000000 0 0xe8000000 0 0xe8000000 0 0x07f00000 /* Port 0 MEM */ |
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0x81000000 0 0xefff0000 0 0xefff0000 0 0x00010000>; /* Port 0 IO */ |
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interrupt-map-mask = <0 0 0 7>; |
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interrupt-map = <0 0 0 1 &pcie_intc 0>, |
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<0 0 0 2 &pcie_intc 1>, |
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<0 0 0 3 &pcie_intc 2>, |
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<0 0 0 4 &pcie_intc 3>; |
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max-link-speed = <2>; |
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phys = <&comphy1 0>; |
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pcie_intc: interrupt-controller { |
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interrupt-controller; |
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#interrupt-cells = <1>; |
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}; |
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}; |
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}; |
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firmware { |
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armada-3700-rwtm { |
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compatible = "marvell,armada-3700-rwtm-firmware"; |
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mboxes = <&rwtm 0>; |
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status = "okay"; |
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}; |
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}; |
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};
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