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482 lines
8.9 KiB
482 lines
8.9 KiB
// SPDX-License-Identifier: GPL-2.0-only |
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/* |
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* dtsi file for Hisilicon Hi6220 coresight |
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* |
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* Copyright (C) 2017 Hisilicon Ltd. |
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* |
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* Author: Pengcheng Li <[email protected]> |
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* Leo Yan <[email protected]> |
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*/ |
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/ { |
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soc { |
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funnel@f6401000 { |
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compatible = "arm,coresight-dynamic-funnel", "arm,primecell"; |
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reg = <0 0xf6401000 0 0x1000>; |
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clocks = <&acpu_sctrl HI6220_ACPU_SFT_AT_S>; |
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clock-names = "apb_pclk"; |
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out-ports { |
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port { |
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soc_funnel_out: endpoint { |
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remote-endpoint = |
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<&etf_in>; |
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}; |
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}; |
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}; |
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in-ports { |
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port { |
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soc_funnel_in: endpoint { |
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remote-endpoint = |
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<&acpu_funnel_out>; |
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}; |
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}; |
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}; |
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}; |
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etf@f6402000 { |
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compatible = "arm,coresight-tmc", "arm,primecell"; |
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reg = <0 0xf6402000 0 0x1000>; |
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clocks = <&acpu_sctrl HI6220_ACPU_SFT_AT_S>; |
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clock-names = "apb_pclk"; |
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in-ports { |
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port { |
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etf_in: endpoint { |
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remote-endpoint = |
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<&soc_funnel_out>; |
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}; |
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}; |
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}; |
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out-ports { |
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port { |
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etf_out: endpoint { |
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remote-endpoint = |
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<&replicator_in>; |
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}; |
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}; |
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}; |
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}; |
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replicator { |
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compatible = "arm,coresight-static-replicator"; |
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clocks = <&acpu_sctrl HI6220_ACPU_SFT_AT_S>; |
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clock-names = "apb_pclk"; |
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in-ports { |
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port { |
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replicator_in: endpoint { |
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remote-endpoint = |
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<&etf_out>; |
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}; |
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}; |
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}; |
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out-ports { |
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#address-cells = <1>; |
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#size-cells = <0>; |
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port@0 { |
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reg = <0>; |
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replicator_out0: endpoint { |
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remote-endpoint = |
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<&etr_in>; |
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}; |
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}; |
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port@1 { |
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reg = <1>; |
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replicator_out1: endpoint { |
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remote-endpoint = |
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<&tpiu_in>; |
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}; |
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}; |
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}; |
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}; |
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etr@f6404000 { |
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compatible = "arm,coresight-tmc", "arm,primecell"; |
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reg = <0 0xf6404000 0 0x1000>; |
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clocks = <&acpu_sctrl HI6220_ACPU_SFT_AT_S>; |
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clock-names = "apb_pclk"; |
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in-ports { |
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port { |
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etr_in: endpoint { |
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remote-endpoint = |
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<&replicator_out0>; |
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}; |
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}; |
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}; |
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}; |
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tpiu@f6405000 { |
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compatible = "arm,coresight-tpiu", "arm,primecell"; |
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reg = <0 0xf6405000 0 0x1000>; |
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clocks = <&acpu_sctrl HI6220_ACPU_SFT_AT_S>; |
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clock-names = "apb_pclk"; |
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in-ports { |
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port { |
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tpiu_in: endpoint { |
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remote-endpoint = |
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<&replicator_out1>; |
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}; |
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}; |
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}; |
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}; |
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funnel@f6501000 { |
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compatible = "arm,coresight-dynamic-funnel", "arm,primecell"; |
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reg = <0 0xf6501000 0 0x1000>; |
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clocks = <&acpu_sctrl HI6220_ACPU_SFT_AT_S>; |
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clock-names = "apb_pclk"; |
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out-ports { |
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port { |
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acpu_funnel_out: endpoint { |
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remote-endpoint = |
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<&soc_funnel_in>; |
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}; |
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}; |
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}; |
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in-ports { |
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#address-cells = <1>; |
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#size-cells = <0>; |
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port@0 { |
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reg = <0>; |
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acpu_funnel_in0: endpoint { |
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remote-endpoint = |
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<&etm0_out>; |
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}; |
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}; |
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port@1 { |
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reg = <1>; |
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acpu_funnel_in1: endpoint { |
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remote-endpoint = |
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<&etm1_out>; |
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}; |
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}; |
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port@2 { |
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reg = <2>; |
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acpu_funnel_in2: endpoint { |
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remote-endpoint = |
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<&etm2_out>; |
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}; |
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}; |
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port@3 { |
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reg = <3>; |
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acpu_funnel_in3: endpoint { |
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remote-endpoint = |
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<&etm3_out>; |
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}; |
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}; |
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port@4 { |
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reg = <4>; |
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acpu_funnel_in4: endpoint { |
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remote-endpoint = |
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<&etm4_out>; |
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}; |
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}; |
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port@5 { |
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reg = <5>; |
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acpu_funnel_in5: endpoint { |
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remote-endpoint = |
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<&etm5_out>; |
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}; |
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}; |
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port@6 { |
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reg = <6>; |
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acpu_funnel_in6: endpoint { |
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remote-endpoint = |
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<&etm6_out>; |
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}; |
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}; |
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port@7 { |
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reg = <7>; |
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acpu_funnel_in7: endpoint { |
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remote-endpoint = |
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<&etm7_out>; |
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}; |
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}; |
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}; |
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}; |
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etm0: etm@f659c000 { |
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compatible = "arm,coresight-etm4x", "arm,primecell"; |
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reg = <0 0xf659c000 0 0x1000>; |
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clocks = <&acpu_sctrl HI6220_ACPU_SFT_AT_S>; |
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clock-names = "apb_pclk"; |
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cpu = <&cpu0>; |
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out-ports { |
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port { |
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etm0_out: endpoint { |
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remote-endpoint = |
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<&acpu_funnel_in0>; |
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}; |
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}; |
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}; |
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}; |
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etm1: etm@f659d000 { |
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compatible = "arm,coresight-etm4x", "arm,primecell"; |
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reg = <0 0xf659d000 0 0x1000>; |
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clocks = <&acpu_sctrl HI6220_ACPU_SFT_AT_S>; |
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clock-names = "apb_pclk"; |
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cpu = <&cpu1>; |
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out-ports { |
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port { |
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etm1_out: endpoint { |
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remote-endpoint = |
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<&acpu_funnel_in1>; |
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}; |
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}; |
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}; |
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}; |
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etm2: etm@f659e000 { |
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compatible = "arm,coresight-etm4x", "arm,primecell"; |
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reg = <0 0xf659e000 0 0x1000>; |
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clocks = <&acpu_sctrl HI6220_ACPU_SFT_AT_S>; |
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clock-names = "apb_pclk"; |
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cpu = <&cpu2>; |
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out-ports { |
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port { |
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etm2_out: endpoint { |
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remote-endpoint = |
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<&acpu_funnel_in2>; |
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}; |
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}; |
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}; |
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}; |
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etm3: etm@f659f000 { |
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compatible = "arm,coresight-etm4x", "arm,primecell"; |
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reg = <0 0xf659f000 0 0x1000>; |
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clocks = <&acpu_sctrl HI6220_ACPU_SFT_AT_S>; |
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clock-names = "apb_pclk"; |
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cpu = <&cpu3>; |
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out-ports { |
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port { |
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etm3_out: endpoint { |
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remote-endpoint = |
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<&acpu_funnel_in3>; |
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}; |
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}; |
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}; |
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}; |
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etm4: etm@f65dc000 { |
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compatible = "arm,coresight-etm4x", "arm,primecell"; |
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reg = <0 0xf65dc000 0 0x1000>; |
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clocks = <&acpu_sctrl HI6220_ACPU_SFT_AT_S>; |
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clock-names = "apb_pclk"; |
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cpu = <&cpu4>; |
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out-ports { |
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port { |
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etm4_out: endpoint { |
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remote-endpoint = |
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<&acpu_funnel_in4>; |
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}; |
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}; |
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}; |
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}; |
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etm5: etm@f65dd000 { |
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compatible = "arm,coresight-etm4x", "arm,primecell"; |
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reg = <0 0xf65dd000 0 0x1000>; |
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clocks = <&acpu_sctrl HI6220_ACPU_SFT_AT_S>; |
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clock-names = "apb_pclk"; |
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cpu = <&cpu5>; |
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out-ports { |
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port { |
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etm5_out: endpoint { |
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remote-endpoint = |
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<&acpu_funnel_in5>; |
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}; |
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}; |
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}; |
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}; |
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etm6: etm@f65de000 { |
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compatible = "arm,coresight-etm4x", "arm,primecell"; |
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reg = <0 0xf65de000 0 0x1000>; |
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clocks = <&acpu_sctrl HI6220_ACPU_SFT_AT_S>; |
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clock-names = "apb_pclk"; |
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cpu = <&cpu6>; |
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out-ports { |
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port { |
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etm6_out: endpoint { |
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remote-endpoint = |
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<&acpu_funnel_in6>; |
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}; |
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}; |
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}; |
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}; |
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etm7: etm@f65df000 { |
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compatible = "arm,coresight-etm4x", "arm,primecell"; |
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reg = <0 0xf65df000 0 0x1000>; |
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clocks = <&acpu_sctrl HI6220_ACPU_SFT_AT_S>; |
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clock-names = "apb_pclk"; |
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cpu = <&cpu7>; |
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out-ports { |
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port { |
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etm7_out: endpoint { |
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remote-endpoint = |
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<&acpu_funnel_in7>; |
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}; |
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}; |
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}; |
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}; |
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/* System CTIs */ |
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/* CTI 0 - TMC and TPIU connections */ |
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cti@f6403000 { |
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compatible = "arm,coresight-cti", "arm,primecell"; |
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reg = <0 0xf6403000 0 0x1000>; |
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clocks = <&acpu_sctrl HI6220_ACPU_SFT_AT_S>; |
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clock-names = "apb_pclk"; |
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}; |
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/* CTI - CPU-0 */ |
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cti@f6598000 { |
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compatible = "arm,coresight-cti-v8-arch", |
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"arm,coresight-cti", "arm,primecell"; |
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reg = <0 0xf6598000 0 0x1000>; |
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clocks = <&acpu_sctrl HI6220_ACPU_SFT_AT_S>; |
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clock-names = "apb_pclk"; |
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cpu = <&cpu0>; |
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arm,cs-dev-assoc = <&etm0>; |
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}; |
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/* CTI - CPU-1 */ |
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cti@f6599000 { |
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compatible = "arm,coresight-cti-v8-arch", |
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"arm,coresight-cti", "arm,primecell"; |
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reg = <0 0xf6599000 0 0x1000>; |
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clocks = <&acpu_sctrl HI6220_ACPU_SFT_AT_S>; |
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clock-names = "apb_pclk"; |
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cpu = <&cpu1>; |
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arm,cs-dev-assoc = <&etm1>; |
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}; |
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/* CTI - CPU-2 */ |
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cti@f659a000 { |
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compatible = "arm,coresight-cti-v8-arch", |
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"arm,coresight-cti", "arm,primecell"; |
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reg = <0 0xf659a000 0 0x1000>; |
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clocks = <&acpu_sctrl HI6220_ACPU_SFT_AT_S>; |
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clock-names = "apb_pclk"; |
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cpu = <&cpu2>; |
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arm,cs-dev-assoc = <&etm2>; |
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}; |
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/* CTI - CPU-3 */ |
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cti@f659b000 { |
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compatible = "arm,coresight-cti-v8-arch", |
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"arm,coresight-cti", "arm,primecell"; |
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reg = <0 0xf659b000 0 0x1000>; |
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clocks = <&acpu_sctrl HI6220_ACPU_SFT_AT_S>; |
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clock-names = "apb_pclk"; |
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cpu = <&cpu3>; |
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arm,cs-dev-assoc = <&etm3>; |
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}; |
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/* CTI - CPU-4 */ |
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cti@f65d8000 { |
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compatible = "arm,coresight-cti-v8-arch", |
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"arm,coresight-cti", "arm,primecell"; |
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reg = <0 0xf65d8000 0 0x1000>; |
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clocks = <&acpu_sctrl HI6220_ACPU_SFT_AT_S>; |
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clock-names = "apb_pclk"; |
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cpu = <&cpu4>; |
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arm,cs-dev-assoc = <&etm4>; |
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}; |
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/* CTI - CPU-5 */ |
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cti@f65d9000 { |
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compatible = "arm,coresight-cti-v8-arch", |
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"arm,coresight-cti", "arm,primecell"; |
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reg = <0 0xf65d9000 0 0x1000>; |
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clocks = <&acpu_sctrl HI6220_ACPU_SFT_AT_S>; |
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clock-names = "apb_pclk"; |
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cpu = <&cpu5>; |
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arm,cs-dev-assoc = <&etm5>; |
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}; |
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/* CTI - CPU-6 */ |
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cti@f65da000 { |
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compatible = "arm,coresight-cti-v8-arch", |
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"arm,coresight-cti", "arm,primecell"; |
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reg = <0 0xf65da000 0 0x1000>; |
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clocks = <&acpu_sctrl HI6220_ACPU_SFT_AT_S>; |
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clock-names = "apb_pclk"; |
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cpu = <&cpu6>; |
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arm,cs-dev-assoc = <&etm6>; |
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}; |
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/* CTI - CPU-7 */ |
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cti@f65db000 { |
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compatible = "arm,coresight-cti-v8-arch", |
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"arm,coresight-cti", "arm,primecell"; |
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reg = <0 0xf65db000 0 0x1000>; |
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clocks = <&acpu_sctrl HI6220_ACPU_SFT_AT_S>; |
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clock-names = "apb_pclk"; |
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cpu = <&cpu7>; |
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arm,cs-dev-assoc = <&etm7>; |
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}; |
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}; |
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};
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