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884 lines
19 KiB
884 lines
19 KiB
// SPDX-License-Identifier: (GPL-2.0+ OR MIT) |
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/* |
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* Copyright 2021 Gateworks Corporation |
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*/ |
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/dts-v1/; |
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#include <dt-bindings/gpio/gpio.h> |
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#include <dt-bindings/input/linux-event-codes.h> |
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#include <dt-bindings/leds/common.h> |
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#include <dt-bindings/net/ti-dp83867.h> |
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#include "imx8mn.dtsi" |
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/ { |
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model = "Gateworks Venice GW7902 i.MX8MN board"; |
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compatible = "gw,imx8mn-gw7902", "fsl,imx8mn"; |
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aliases { |
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usb0 = &usbotg1; |
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}; |
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chosen { |
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stdout-path = &uart2; |
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}; |
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memory@40000000 { |
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device_type = "memory"; |
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reg = <0x0 0x40000000 0 0x80000000>; |
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}; |
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can20m: can20m { |
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compatible = "fixed-clock"; |
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#clock-cells = <0>; |
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clock-frequency = <20000000>; |
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clock-output-names = "can20m"; |
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}; |
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gpio-keys { |
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compatible = "gpio-keys"; |
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user-pb { |
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label = "user_pb"; |
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gpios = <&gpio 2 GPIO_ACTIVE_LOW>; |
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linux,code = <BTN_0>; |
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}; |
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user-pb1x { |
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label = "user_pb1x"; |
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linux,code = <BTN_1>; |
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interrupt-parent = <&gsc>; |
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interrupts = <0>; |
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}; |
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key-erased { |
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label = "key_erased"; |
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linux,code = <BTN_2>; |
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interrupt-parent = <&gsc>; |
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interrupts = <1>; |
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}; |
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eeprom-wp { |
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label = "eeprom_wp"; |
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linux,code = <BTN_3>; |
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interrupt-parent = <&gsc>; |
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interrupts = <2>; |
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}; |
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tamper { |
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label = "tamper"; |
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linux,code = <BTN_4>; |
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interrupt-parent = <&gsc>; |
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interrupts = <5>; |
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}; |
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switch-hold { |
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label = "switch_hold"; |
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linux,code = <BTN_5>; |
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interrupt-parent = <&gsc>; |
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interrupts = <7>; |
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}; |
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}; |
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led-controller { |
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compatible = "gpio-leds"; |
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pinctrl-names = "default"; |
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pinctrl-0 = <&pinctrl_gpio_leds>; |
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led-0 { |
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function = LED_FUNCTION_STATUS; |
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color = <LED_COLOR_ID_GREEN>; |
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label = "panel1"; |
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gpios = <&gpio3 21 GPIO_ACTIVE_LOW>; |
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default-state = "off"; |
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}; |
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led-1 { |
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function = LED_FUNCTION_STATUS; |
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color = <LED_COLOR_ID_GREEN>; |
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label = "panel2"; |
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gpios = <&gpio3 23 GPIO_ACTIVE_LOW>; |
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default-state = "off"; |
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}; |
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led-2 { |
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function = LED_FUNCTION_STATUS; |
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color = <LED_COLOR_ID_GREEN>; |
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label = "panel3"; |
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gpios = <&gpio3 22 GPIO_ACTIVE_LOW>; |
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default-state = "off"; |
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}; |
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led-3 { |
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function = LED_FUNCTION_STATUS; |
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color = <LED_COLOR_ID_GREEN>; |
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label = "panel4"; |
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gpios = <&gpio3 20 GPIO_ACTIVE_LOW>; |
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default-state = "off"; |
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}; |
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led-4 { |
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function = LED_FUNCTION_STATUS; |
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color = <LED_COLOR_ID_GREEN>; |
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label = "panel5"; |
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gpios = <&gpio3 25 GPIO_ACTIVE_LOW>; |
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default-state = "off"; |
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}; |
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}; |
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pps { |
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compatible = "pps-gpio"; |
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pinctrl-names = "default"; |
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pinctrl-0 = <&pinctrl_pps>; |
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gpios = <&gpio3 24 GPIO_ACTIVE_HIGH>; |
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status = "okay"; |
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}; |
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reg_3p3v: regulator-3p3v { |
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compatible = "regulator-fixed"; |
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regulator-name = "3P3V"; |
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regulator-min-microvolt = <3300000>; |
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regulator-max-microvolt = <3300000>; |
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regulator-always-on; |
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}; |
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reg_usb1_vbus: regulator-usb1 { |
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compatible = "regulator-fixed"; |
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pinctrl-names = "default"; |
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pinctrl-0 = <&pinctrl_reg_usb1>; |
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regulator-name = "usb_usb1_vbus"; |
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gpio = <&gpio2 7 GPIO_ACTIVE_HIGH>; |
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enable-active-high; |
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regulator-min-microvolt = <5000000>; |
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regulator-max-microvolt = <5000000>; |
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}; |
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reg_wifi: regulator-wifi { |
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compatible = "regulator-fixed"; |
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pinctrl-names = "default"; |
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pinctrl-0 = <&pinctrl_reg_wl>; |
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regulator-name = "wifi"; |
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gpio = <&gpio2 19 GPIO_ACTIVE_HIGH>; |
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enable-active-high; |
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startup-delay-us = <100>; |
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regulator-min-microvolt = <3300000>; |
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regulator-max-microvolt = <3300000>; |
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}; |
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}; |
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&A53_0 { |
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cpu-supply = <&buck2>; |
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}; |
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&A53_1 { |
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cpu-supply = <&buck2>; |
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}; |
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&A53_2 { |
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cpu-supply = <&buck2>; |
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}; |
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&A53_3 { |
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cpu-supply = <&buck2>; |
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}; |
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&ddrc { |
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operating-points-v2 = <&ddrc_opp_table>; |
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ddrc_opp_table: opp-table { |
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compatible = "operating-points-v2"; |
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opp-25M { |
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opp-hz = /bits/ 64 <25000000>; |
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}; |
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opp-100M { |
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opp-hz = /bits/ 64 <100000000>; |
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}; |
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opp-750M { |
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opp-hz = /bits/ 64 <750000000>; |
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}; |
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}; |
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}; |
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&ecspi1 { |
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pinctrl-names = "default"; |
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pinctrl-0 = <&pinctrl_spi1>; |
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cs-gpios = <&gpio5 9 GPIO_ACTIVE_LOW>; |
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status = "okay"; |
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can@0 { |
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compatible = "microchip,mcp2515"; |
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reg = <0>; |
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clocks = <&can20m>; |
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oscillator-frequency = <20000000>; |
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interrupt-parent = <&gpio2>; |
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interrupts = <3 IRQ_TYPE_LEVEL_LOW>; |
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spi-max-frequency = <10000000>; |
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}; |
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}; |
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/* off-board header */ |
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&ecspi2 { |
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pinctrl-names = "default"; |
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pinctrl-0 = <&pinctrl_spi2>; |
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cs-gpios = <&gpio5 13 GPIO_ACTIVE_LOW>; |
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status = "okay"; |
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}; |
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&fec1 { |
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pinctrl-names = "default"; |
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pinctrl-0 = <&pinctrl_fec1>; |
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phy-mode = "rgmii-id"; |
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phy-handle = <ðphy0>; |
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local-mac-address = [00 00 00 00 00 00]; |
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status = "okay"; |
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mdio { |
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#address-cells = <1>; |
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#size-cells = <0>; |
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ethphy0: ethernet-phy@0 { |
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compatible = "ethernet-phy-ieee802.3-c22"; |
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reg = <0>; |
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ti,rx-internal-delay = <DP83867_RGMIIDCTL_2_00_NS>; |
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ti,tx-internal-delay = <DP83867_RGMIIDCTL_2_00_NS>; |
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tx-fifo-depth = <DP83867_PHYCR_FIFO_DEPTH_4_B_NIB>; |
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rx-fifo-depth = <DP83867_PHYCR_FIFO_DEPTH_4_B_NIB>; |
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}; |
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}; |
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}; |
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&i2c1 { |
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clock-frequency = <100000>; |
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pinctrl-names = "default"; |
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pinctrl-0 = <&pinctrl_i2c1>; |
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status = "okay"; |
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gsc: gsc@20 { |
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compatible = "gw,gsc"; |
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reg = <0x20>; |
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pinctrl-0 = <&pinctrl_gsc>; |
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interrupt-parent = <&gpio2>; |
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interrupts = <6 IRQ_TYPE_EDGE_FALLING>; |
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interrupt-controller; |
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#interrupt-cells = <1>; |
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adc { |
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compatible = "gw,gsc-adc"; |
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#address-cells = <1>; |
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#size-cells = <0>; |
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channel@6 { |
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gw,mode = <0>; |
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reg = <0x06>; |
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label = "temp"; |
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}; |
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channel@8 { |
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gw,mode = <1>; |
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reg = <0x08>; |
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label = "vdd_bat"; |
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}; |
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channel@82 { |
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gw,mode = <2>; |
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reg = <0x82>; |
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label = "vin"; |
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gw,voltage-divider-ohms = <22100 1000>; |
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gw,voltage-offset-microvolt = <700000>; |
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}; |
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channel@84 { |
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gw,mode = <2>; |
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reg = <0x84>; |
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label = "vin_4p0"; |
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gw,voltage-divider-ohms = <10000 10000>; |
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}; |
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channel@86 { |
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gw,mode = <2>; |
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reg = <0x86>; |
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label = "vdd_3p3"; |
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gw,voltage-divider-ohms = <10000 10000>; |
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}; |
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channel@88 { |
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gw,mode = <2>; |
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reg = <0x88>; |
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label = "vdd_0p9"; |
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}; |
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channel@8c { |
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gw,mode = <2>; |
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reg = <0x8c>; |
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label = "vdd_soc"; |
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}; |
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channel@8e { |
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gw,mode = <2>; |
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reg = <0x8e>; |
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label = "vdd_arm"; |
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}; |
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channel@90 { |
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gw,mode = <2>; |
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reg = <0x90>; |
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label = "vdd_1p8"; |
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}; |
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channel@92 { |
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gw,mode = <2>; |
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reg = <0x92>; |
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label = "vdd_dram"; |
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}; |
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channel@98 { |
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gw,mode = <2>; |
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reg = <0x98>; |
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label = "vdd_1p0"; |
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}; |
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channel@9a { |
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gw,mode = <2>; |
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reg = <0x9a>; |
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label = "vdd_2p5"; |
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gw,voltage-divider-ohms = <10000 10000>; |
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}; |
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channel@a2 { |
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gw,mode = <2>; |
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reg = <0xa2>; |
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label = "vdd_gsc"; |
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gw,voltage-divider-ohms = <10000 10000>; |
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}; |
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}; |
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}; |
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gpio: gpio@23 { |
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compatible = "nxp,pca9555"; |
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reg = <0x23>; |
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gpio-controller; |
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#gpio-cells = <2>; |
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interrupt-parent = <&gsc>; |
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interrupts = <4>; |
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}; |
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pmic@4b { |
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compatible = "rohm,bd71847"; |
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reg = <0x4b>; |
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pinctrl-names = "default"; |
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pinctrl-0 = <&pinctrl_pmic>; |
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interrupt-parent = <&gpio3>; |
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interrupts = <8 IRQ_TYPE_LEVEL_LOW>; |
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rohm,reset-snvs-powered; |
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#clock-cells = <0>; |
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clocks = <&osc_32k 0>; |
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clock-output-names = "clk-32k-out"; |
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regulators { |
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/* vdd_soc: 0.805-0.900V (typ=0.8V) */ |
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BUCK1 { |
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regulator-name = "buck1"; |
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regulator-min-microvolt = <700000>; |
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regulator-max-microvolt = <1300000>; |
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regulator-boot-on; |
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regulator-always-on; |
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regulator-ramp-delay = <1250>; |
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}; |
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/* vdd_arm: 0.805-1.0V (typ=0.9V) */ |
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buck2: BUCK2 { |
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regulator-name = "buck2"; |
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regulator-min-microvolt = <700000>; |
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regulator-max-microvolt = <1300000>; |
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regulator-boot-on; |
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regulator-always-on; |
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regulator-ramp-delay = <1250>; |
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rohm,dvs-run-voltage = <1000000>; |
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rohm,dvs-idle-voltage = <900000>; |
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}; |
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/* vdd_0p9: 0.805-1.0V (typ=0.9V) */ |
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BUCK3 { |
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regulator-name = "buck3"; |
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regulator-min-microvolt = <700000>; |
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regulator-max-microvolt = <1350000>; |
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regulator-boot-on; |
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regulator-always-on; |
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}; |
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/* vdd_3p3 */ |
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BUCK4 { |
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regulator-name = "buck4"; |
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regulator-min-microvolt = <3000000>; |
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regulator-max-microvolt = <3300000>; |
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regulator-boot-on; |
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regulator-always-on; |
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}; |
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/* vdd_1p8 */ |
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BUCK5 { |
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regulator-name = "buck5"; |
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regulator-min-microvolt = <1605000>; |
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regulator-max-microvolt = <1995000>; |
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regulator-boot-on; |
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regulator-always-on; |
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}; |
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/* vdd_dram */ |
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BUCK6 { |
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regulator-name = "buck6"; |
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regulator-min-microvolt = <800000>; |
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regulator-max-microvolt = <1400000>; |
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regulator-boot-on; |
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regulator-always-on; |
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}; |
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/* nvcc_snvs_1p8 */ |
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LDO1 { |
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regulator-name = "ldo1"; |
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regulator-min-microvolt = <1600000>; |
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regulator-max-microvolt = <1900000>; |
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regulator-boot-on; |
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regulator-always-on; |
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}; |
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/* vdd_snvs_0p8 */ |
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LDO2 { |
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regulator-name = "ldo2"; |
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regulator-min-microvolt = <800000>; |
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regulator-max-microvolt = <900000>; |
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regulator-boot-on; |
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regulator-always-on; |
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}; |
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/* vdda_1p8 */ |
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LDO3 { |
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regulator-name = "ldo3"; |
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regulator-min-microvolt = <1800000>; |
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regulator-max-microvolt = <3300000>; |
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regulator-boot-on; |
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regulator-always-on; |
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}; |
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LDO4 { |
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regulator-name = "ldo4"; |
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regulator-min-microvolt = <900000>; |
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regulator-max-microvolt = <1800000>; |
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regulator-boot-on; |
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regulator-always-on; |
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}; |
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LDO6 { |
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regulator-name = "ldo6"; |
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regulator-min-microvolt = <900000>; |
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regulator-max-microvolt = <1800000>; |
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regulator-boot-on; |
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regulator-always-on; |
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}; |
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}; |
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}; |
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eeprom@50 { |
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compatible = "atmel,24c02"; |
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reg = <0x50>; |
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pagesize = <16>; |
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}; |
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eeprom@51 { |
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compatible = "atmel,24c02"; |
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reg = <0x51>; |
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pagesize = <16>; |
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}; |
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eeprom@52 { |
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compatible = "atmel,24c02"; |
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reg = <0x52>; |
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pagesize = <16>; |
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}; |
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eeprom@53 { |
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compatible = "atmel,24c02"; |
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reg = <0x53>; |
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pagesize = <16>; |
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}; |
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rtc@68 { |
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compatible = "dallas,ds1672"; |
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reg = <0x68>; |
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}; |
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}; |
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&i2c2 { |
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clock-frequency = <400000>; |
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pinctrl-names = "default"; |
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pinctrl-0 = <&pinctrl_i2c2>; |
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status = "okay"; |
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accelerometer@19 { |
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compatible = "st,lis2de12"; |
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pinctrl-names = "default"; |
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pinctrl-0 = <&pinctrl_accel>; |
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reg = <0x19>; |
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st,drdy-int-pin = <1>; |
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interrupt-parent = <&gpio1>; |
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interrupts = <12 IRQ_TYPE_LEVEL_LOW>; |
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interrupt-names = "INT1"; |
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}; |
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}; |
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/* off-board header */ |
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&i2c3 { |
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clock-frequency = <400000>; |
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pinctrl-names = "default"; |
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pinctrl-0 = <&pinctrl_i2c3>; |
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status = "okay"; |
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}; |
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/* off-board header */ |
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&i2c4 { |
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clock-frequency = <400000>; |
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pinctrl-names = "default"; |
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pinctrl-0 = <&pinctrl_i2c4>; |
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status = "okay"; |
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}; |
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/* off-board header */ |
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&sai3 { |
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pinctrl-names = "default"; |
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pinctrl-0 = <&pinctrl_sai3>; |
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assigned-clocks = <&clk IMX8MN_CLK_SAI3>; |
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assigned-clock-parents = <&clk IMX8MN_AUDIO_PLL1_OUT>; |
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assigned-clock-rates = <24576000>; |
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status = "okay"; |
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}; |
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/* RS232/RS485/RS422 selectable */ |
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&uart1 { |
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pinctrl-names = "default"; |
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pinctrl-0 = <&pinctrl_uart1>, <&pinctrl_uart1_gpio>; |
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status = "okay"; |
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}; |
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/* RS232 console */ |
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&uart2 { |
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pinctrl-names = "default"; |
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pinctrl-0 = <&pinctrl_uart2>; |
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status = "okay"; |
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}; |
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/* bluetooth HCI */ |
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&uart3 { |
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pinctrl-names = "default"; |
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pinctrl-0 = <&pinctrl_uart3>, <&pinctrl_uart3_gpio>; |
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rts-gpios = <&gpio2 1 GPIO_ACTIVE_LOW>; |
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cts-gpios = <&gpio2 0 GPIO_ACTIVE_LOW>; |
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status = "okay"; |
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bluetooth { |
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compatible = "brcm,bcm4330-bt"; |
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shutdown-gpios = <&gpio2 12 GPIO_ACTIVE_HIGH>; |
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}; |
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}; |
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/* LTE Cat M1/NB1/EGPRS modem or GPS (loading option) */ |
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&uart4 { |
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pinctrl-names = "default"; |
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pinctrl-0 = <&pinctrl_uart4>; |
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status = "okay"; |
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}; |
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&usbotg1 { |
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dr_mode = "host"; |
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vbus-supply = <®_usb1_vbus>; |
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disable-over-current; |
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status = "okay"; |
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}; |
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/* SDIO WiFi */ |
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&usdhc2 { |
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pinctrl-names = "default"; |
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pinctrl-0 = <&pinctrl_usdhc2>; |
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bus-width = <4>; |
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non-removable; |
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vmmc-supply = <®_wifi>; |
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status = "okay"; |
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}; |
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/* eMMC */ |
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&usdhc3 { |
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pinctrl-names = "default", "state_100mhz", "state_200mhz"; |
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pinctrl-0 = <&pinctrl_usdhc3>; |
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pinctrl-1 = <&pinctrl_usdhc3_100mhz>; |
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pinctrl-2 = <&pinctrl_usdhc3_200mhz>; |
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bus-width = <8>; |
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non-removable; |
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status = "okay"; |
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}; |
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&wdog1 { |
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pinctrl-names = "default"; |
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pinctrl-0 = <&pinctrl_wdog>; |
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fsl,ext-reset-output; |
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status = "okay"; |
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}; |
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&iomuxc { |
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pinctrl-names = "default"; |
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pinctrl-0 = <&pinctrl_hog>; |
|
|
|
pinctrl_hog: hoggrp { |
|
fsl,pins = < |
|
MX8MN_IOMUXC_NAND_CE0_B_GPIO3_IO1 0x40000159 /* M2_GDIS# */ |
|
MX8MN_IOMUXC_GPIO1_IO12_GPIO1_IO12 0x40000041 /* M2_RST# */ |
|
MX8MN_IOMUXC_NAND_DATA01_GPIO3_IO7 0x40000119 /* M2_OFF# */ |
|
MX8MN_IOMUXC_GPIO1_IO15_GPIO1_IO15 0x40000159 /* M2_WDIS# */ |
|
MX8MN_IOMUXC_SAI2_RXFS_GPIO4_IO21 0x40000041 /* APP GPIO1 */ |
|
MX8MN_IOMUXC_SAI2_MCLK_GPIO4_IO27 0x40000041 /* APP GPIO2 */ |
|
MX8MN_IOMUXC_SD1_DATA6_GPIO2_IO8 0x40000041 /* UART2_EN# */ |
|
MX8MN_IOMUXC_SAI3_RXFS_GPIO4_IO28 0x40000041 /* MIPI_GPIO1 */ |
|
MX8MN_IOMUXC_SPDIF_EXT_CLK_GPIO5_IO5 0x40000041 /* MIPI_GPIO2 */ |
|
MX8MN_IOMUXC_SPDIF_RX_GPIO5_IO4 0x40000041 /* MIPI_GPIO3/PWM2 */ |
|
MX8MN_IOMUXC_SPDIF_TX_GPIO5_IO3 0x40000041 /* MIPI_GPIO4/PWM3 */ |
|
>; |
|
}; |
|
|
|
pinctrl_accel: accelgrp { |
|
fsl,pins = < |
|
MX8MN_IOMUXC_GPIO1_IO12_GPIO1_IO12 0x159 |
|
>; |
|
}; |
|
|
|
pinctrl_fec1: fec1grp { |
|
fsl,pins = < |
|
MX8MN_IOMUXC_ENET_MDC_ENET1_MDC 0x3 |
|
MX8MN_IOMUXC_ENET_MDIO_ENET1_MDIO 0x3 |
|
MX8MN_IOMUXC_ENET_TD3_ENET1_RGMII_TD3 0x1f |
|
MX8MN_IOMUXC_ENET_TD2_ENET1_RGMII_TD2 0x1f |
|
MX8MN_IOMUXC_ENET_TD1_ENET1_RGMII_TD1 0x1f |
|
MX8MN_IOMUXC_ENET_TD0_ENET1_RGMII_TD0 0x1f |
|
MX8MN_IOMUXC_ENET_RD3_ENET1_RGMII_RD3 0x91 |
|
MX8MN_IOMUXC_ENET_RD2_ENET1_RGMII_RD2 0x91 |
|
MX8MN_IOMUXC_ENET_RD1_ENET1_RGMII_RD1 0x91 |
|
MX8MN_IOMUXC_ENET_RD0_ENET1_RGMII_RD0 0x91 |
|
MX8MN_IOMUXC_ENET_TXC_ENET1_RGMII_TXC 0x1f |
|
MX8MN_IOMUXC_ENET_RXC_ENET1_RGMII_RXC 0x91 |
|
MX8MN_IOMUXC_ENET_RX_CTL_ENET1_RGMII_RX_CTL 0x91 |
|
MX8MN_IOMUXC_ENET_TX_CTL_ENET1_RGMII_TX_CTL 0x1f |
|
MX8MN_IOMUXC_GPIO1_IO10_GPIO1_IO10 0x19 /* RST# */ |
|
MX8MN_IOMUXC_GPIO1_IO11_GPIO1_IO11 0x19 /* IRQ# */ |
|
MX8MN_IOMUXC_GPIO1_IO08_ENET1_1588_EVENT0_IN 0x141 |
|
MX8MN_IOMUXC_GPIO1_IO09_ENET1_1588_EVENT0_OUT 0x141 |
|
>; |
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}; |
|
|
|
pinctrl_gsc: gscgrp { |
|
fsl,pins = < |
|
MX8MN_IOMUXC_SD1_DATA4_GPIO2_IO6 0x40 |
|
>; |
|
}; |
|
|
|
pinctrl_i2c1: i2c1grp { |
|
fsl,pins = < |
|
MX8MN_IOMUXC_I2C1_SCL_I2C1_SCL 0x400001c3 |
|
MX8MN_IOMUXC_I2C1_SDA_I2C1_SDA 0x400001c3 |
|
>; |
|
}; |
|
|
|
pinctrl_i2c2: i2c2grp { |
|
fsl,pins = < |
|
MX8MN_IOMUXC_I2C2_SCL_I2C2_SCL 0x400001c3 |
|
MX8MN_IOMUXC_I2C2_SDA_I2C2_SDA 0x400001c3 |
|
>; |
|
}; |
|
|
|
pinctrl_i2c3: i2c3grp { |
|
fsl,pins = < |
|
MX8MN_IOMUXC_I2C3_SCL_I2C3_SCL 0x400001c3 |
|
MX8MN_IOMUXC_I2C3_SDA_I2C3_SDA 0x400001c3 |
|
>; |
|
}; |
|
|
|
pinctrl_i2c4: i2c4grp { |
|
fsl,pins = < |
|
MX8MN_IOMUXC_I2C4_SCL_I2C4_SCL 0x400001c3 |
|
MX8MN_IOMUXC_I2C4_SDA_I2C4_SDA 0x400001c3 |
|
>; |
|
}; |
|
|
|
pinctrl_gpio_leds: gpioledgrp { |
|
fsl,pins = < |
|
MX8MN_IOMUXC_SAI5_RXD0_GPIO3_IO21 0x19 |
|
MX8MN_IOMUXC_SAI5_RXD2_GPIO3_IO23 0x19 |
|
MX8MN_IOMUXC_SAI5_RXD1_GPIO3_IO22 0x19 |
|
MX8MN_IOMUXC_SAI5_RXC_GPIO3_IO20 0x19 |
|
MX8MN_IOMUXC_SAI5_MCLK_GPIO3_IO25 0x19 |
|
>; |
|
}; |
|
|
|
pinctrl_pmic: pmicgrp { |
|
fsl,pins = < |
|
MX8MN_IOMUXC_NAND_DATA02_GPIO3_IO8 0x41 |
|
>; |
|
}; |
|
|
|
pinctrl_pps: ppsgrp { |
|
fsl,pins = < |
|
MX8MN_IOMUXC_SAI5_RXD3_GPIO3_IO24 0x141 /* PPS */ |
|
>; |
|
}; |
|
|
|
pinctrl_reg_wl: regwlgrp { |
|
fsl,pins = < |
|
MX8MN_IOMUXC_SD2_RESET_B_GPIO2_IO19 0x41 /* WLAN_WLON */ |
|
>; |
|
}; |
|
|
|
pinctrl_reg_usb1: regusb1grp { |
|
fsl,pins = < |
|
MX8MN_IOMUXC_SD1_DATA5_GPIO2_IO7 0x41 |
|
>; |
|
}; |
|
|
|
pinctrl_sai3: sai3grp { |
|
fsl,pins = < |
|
MX8MN_IOMUXC_SAI3_MCLK_SAI3_MCLK 0xd6 |
|
MX8MN_IOMUXC_SAI3_RXD_SAI3_RX_DATA0 0xd6 |
|
MX8MN_IOMUXC_SAI3_TXC_SAI3_TX_BCLK 0xd6 |
|
MX8MN_IOMUXC_SAI3_TXD_SAI3_TX_DATA0 0xd6 |
|
MX8MN_IOMUXC_SAI3_TXFS_SAI3_TX_SYNC 0xd6 |
|
>; |
|
}; |
|
|
|
pinctrl_spi1: spi1grp { |
|
fsl,pins = < |
|
MX8MN_IOMUXC_ECSPI1_SCLK_ECSPI1_SCLK 0x82 |
|
MX8MN_IOMUXC_ECSPI1_MOSI_ECSPI1_MOSI 0x82 |
|
MX8MN_IOMUXC_ECSPI1_MISO_ECSPI1_MISO 0x82 |
|
MX8MN_IOMUXC_ECSPI1_SS0_GPIO5_IO9 0x40 |
|
MX8MN_IOMUXC_SD1_DATA1_GPIO2_IO3 0x140 /* CAN_IRQ# */ |
|
>; |
|
}; |
|
|
|
pinctrl_spi2: spi2grp { |
|
fsl,pins = < |
|
MX8MN_IOMUXC_ECSPI2_SCLK_ECSPI2_SCLK 0x82 |
|
MX8MN_IOMUXC_ECSPI2_MOSI_ECSPI2_MOSI 0x82 |
|
MX8MN_IOMUXC_ECSPI2_MISO_ECSPI2_MISO 0x82 |
|
MX8MN_IOMUXC_ECSPI2_SS0_GPIO5_IO13 0x40 /* SS0 */ |
|
>; |
|
}; |
|
|
|
pinctrl_uart1: uart1grp { |
|
fsl,pins = < |
|
MX8MN_IOMUXC_UART1_RXD_UART1_DCE_RX 0x140 |
|
MX8MN_IOMUXC_UART1_TXD_UART1_DCE_TX 0x140 |
|
>; |
|
}; |
|
|
|
pinctrl_uart1_gpio: uart1gpiogrp { |
|
fsl,pins = < |
|
MX8MN_IOMUXC_SAI2_TXD0_GPIO4_IO26 0x40000110 /* HALF */ |
|
MX8MN_IOMUXC_SAI2_TXC_GPIO4_IO25 0x40000110 /* TERM */ |
|
MX8MN_IOMUXC_SAI2_RXD0_GPIO4_IO23 0x40000110 /* RS485 */ |
|
>; |
|
}; |
|
|
|
pinctrl_uart2: uart2grp { |
|
fsl,pins = < |
|
MX8MN_IOMUXC_UART2_RXD_UART2_DCE_RX 0x140 |
|
MX8MN_IOMUXC_UART2_TXD_UART2_DCE_TX 0x140 |
|
>; |
|
}; |
|
|
|
pinctrl_uart3_gpio: uart3_gpiogrp { |
|
fsl,pins = < |
|
MX8MN_IOMUXC_SD2_CD_B_GPIO2_IO12 0x41 /* BT_EN# */ |
|
>; |
|
}; |
|
|
|
pinctrl_uart3: uart3grp { |
|
fsl,pins = < |
|
MX8MN_IOMUXC_UART3_RXD_UART3_DCE_RX 0x140 |
|
MX8MN_IOMUXC_UART3_TXD_UART3_DCE_TX 0x140 |
|
MX8MN_IOMUXC_SD1_CLK_GPIO2_IO0 0x140 /* CTS */ |
|
MX8MN_IOMUXC_SD1_CMD_GPIO2_IO1 0x140 /* RTS */ |
|
>; |
|
}; |
|
|
|
pinctrl_uart4: uart4grp { |
|
fsl,pins = < |
|
MX8MN_IOMUXC_UART4_RXD_UART4_DCE_RX 0x140 |
|
MX8MN_IOMUXC_UART4_TXD_UART4_DCE_TX 0x140 |
|
MX8MN_IOMUXC_GPIO1_IO06_GPIO1_IO6 0x141 /* GNSS_GASP */ |
|
>; |
|
}; |
|
|
|
pinctrl_usdhc2: usdhc2grp { |
|
fsl,pins = < |
|
MX8MN_IOMUXC_SD2_CLK_USDHC2_CLK 0x190 |
|
MX8MN_IOMUXC_SD2_CMD_USDHC2_CMD 0x1d0 |
|
MX8MN_IOMUXC_SD2_DATA0_USDHC2_DATA0 0x1d0 |
|
MX8MN_IOMUXC_SD2_DATA1_USDHC2_DATA1 0x1d0 |
|
MX8MN_IOMUXC_SD2_DATA2_USDHC2_DATA2 0x1d0 |
|
MX8MN_IOMUXC_SD2_DATA3_USDHC2_DATA3 0x1d0 |
|
>; |
|
}; |
|
|
|
pinctrl_usdhc3: usdhc3grp { |
|
fsl,pins = < |
|
MX8MN_IOMUXC_NAND_WE_B_USDHC3_CLK 0x190 |
|
MX8MN_IOMUXC_NAND_WP_B_USDHC3_CMD 0x1d0 |
|
MX8MN_IOMUXC_NAND_DATA04_USDHC3_DATA0 0x1d0 |
|
MX8MN_IOMUXC_NAND_DATA05_USDHC3_DATA1 0x1d0 |
|
MX8MN_IOMUXC_NAND_DATA06_USDHC3_DATA2 0x1d0 |
|
MX8MN_IOMUXC_NAND_DATA07_USDHC3_DATA3 0x1d0 |
|
MX8MN_IOMUXC_NAND_RE_B_USDHC3_DATA4 0x1d0 |
|
MX8MN_IOMUXC_NAND_CE2_B_USDHC3_DATA5 0x1d0 |
|
MX8MN_IOMUXC_NAND_CE3_B_USDHC3_DATA6 0x1d0 |
|
MX8MN_IOMUXC_NAND_CLE_USDHC3_DATA7 0x1d0 |
|
MX8MN_IOMUXC_NAND_CE1_B_USDHC3_STROBE 0x190 |
|
>; |
|
}; |
|
|
|
pinctrl_usdhc3_100mhz: usdhc3-100mhzgrp { |
|
fsl,pins = < |
|
MX8MN_IOMUXC_NAND_WE_B_USDHC3_CLK 0x194 |
|
MX8MN_IOMUXC_NAND_WP_B_USDHC3_CMD 0x1d4 |
|
MX8MN_IOMUXC_NAND_DATA04_USDHC3_DATA0 0x1d4 |
|
MX8MN_IOMUXC_NAND_DATA05_USDHC3_DATA1 0x1d4 |
|
MX8MN_IOMUXC_NAND_DATA06_USDHC3_DATA2 0x1d4 |
|
MX8MN_IOMUXC_NAND_DATA07_USDHC3_DATA3 0x1d4 |
|
MX8MN_IOMUXC_NAND_RE_B_USDHC3_DATA4 0x1d4 |
|
MX8MN_IOMUXC_NAND_CE2_B_USDHC3_DATA5 0x1d4 |
|
MX8MN_IOMUXC_NAND_CE3_B_USDHC3_DATA6 0x1d4 |
|
MX8MN_IOMUXC_NAND_CLE_USDHC3_DATA7 0x1d4 |
|
MX8MN_IOMUXC_NAND_CE1_B_USDHC3_STROBE 0x194 |
|
>; |
|
}; |
|
|
|
pinctrl_usdhc3_200mhz: usdhc3-200mhzgrp { |
|
fsl,pins = < |
|
MX8MN_IOMUXC_NAND_WE_B_USDHC3_CLK 0x196 |
|
MX8MN_IOMUXC_NAND_WP_B_USDHC3_CMD 0x1d6 |
|
MX8MN_IOMUXC_NAND_DATA04_USDHC3_DATA0 0x1d6 |
|
MX8MN_IOMUXC_NAND_DATA05_USDHC3_DATA1 0x1d6 |
|
MX8MN_IOMUXC_NAND_DATA06_USDHC3_DATA2 0x1d6 |
|
MX8MN_IOMUXC_NAND_DATA07_USDHC3_DATA3 0x1d6 |
|
MX8MN_IOMUXC_NAND_RE_B_USDHC3_DATA4 0x1d6 |
|
MX8MN_IOMUXC_NAND_CE2_B_USDHC3_DATA5 0x1d6 |
|
MX8MN_IOMUXC_NAND_CE3_B_USDHC3_DATA6 0x1d6 |
|
MX8MN_IOMUXC_NAND_CLE_USDHC3_DATA7 0x1d6 |
|
MX8MN_IOMUXC_NAND_CE1_B_USDHC3_STROBE 0x196 |
|
>; |
|
}; |
|
|
|
pinctrl_wdog: wdoggrp { |
|
fsl,pins = < |
|
MX8MN_IOMUXC_GPIO1_IO02_WDOG1_WDOG_B 0xc6 |
|
>; |
|
}; |
|
};
|
|
|