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783 lines
22 KiB
783 lines
22 KiB
// SPDX-License-Identifier: GPL-2.0-only |
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/* |
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* C-Media CMI8788 driver - PCM code |
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* |
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* Copyright (c) Clemens Ladisch <[email protected]> |
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*/ |
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|
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#include <linux/pci.h> |
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#include <sound/control.h> |
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#include <sound/core.h> |
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#include <sound/pcm.h> |
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#include <sound/pcm_params.h> |
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#include "oxygen.h" |
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/* most DMA channels have a 16-bit counter for 32-bit words */ |
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#define BUFFER_BYTES_MAX ((1 << 16) * 4) |
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/* the multichannel DMA channel has a 24-bit counter */ |
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#define BUFFER_BYTES_MAX_MULTICH ((1 << 24) * 4) |
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#define FIFO_BYTES 256 |
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#define FIFO_BYTES_MULTICH 1024 |
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#define PERIOD_BYTES_MIN 64 |
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#define DEFAULT_BUFFER_BYTES (BUFFER_BYTES_MAX / 2) |
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#define DEFAULT_BUFFER_BYTES_MULTICH (1024 * 1024) |
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static const struct snd_pcm_hardware oxygen_stereo_hardware = { |
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.info = SNDRV_PCM_INFO_MMAP | |
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SNDRV_PCM_INFO_MMAP_VALID | |
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SNDRV_PCM_INFO_INTERLEAVED | |
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SNDRV_PCM_INFO_PAUSE | |
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SNDRV_PCM_INFO_SYNC_START | |
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SNDRV_PCM_INFO_NO_PERIOD_WAKEUP, |
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.formats = SNDRV_PCM_FMTBIT_S16_LE | |
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SNDRV_PCM_FMTBIT_S32_LE, |
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.rates = SNDRV_PCM_RATE_32000 | |
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SNDRV_PCM_RATE_44100 | |
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SNDRV_PCM_RATE_48000 | |
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SNDRV_PCM_RATE_64000 | |
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SNDRV_PCM_RATE_88200 | |
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SNDRV_PCM_RATE_96000 | |
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SNDRV_PCM_RATE_176400 | |
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SNDRV_PCM_RATE_192000, |
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.rate_min = 32000, |
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.rate_max = 192000, |
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.channels_min = 2, |
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.channels_max = 2, |
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.buffer_bytes_max = BUFFER_BYTES_MAX, |
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.period_bytes_min = PERIOD_BYTES_MIN, |
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.period_bytes_max = BUFFER_BYTES_MAX, |
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.periods_min = 1, |
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.periods_max = BUFFER_BYTES_MAX / PERIOD_BYTES_MIN, |
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.fifo_size = FIFO_BYTES, |
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}; |
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static const struct snd_pcm_hardware oxygen_multichannel_hardware = { |
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.info = SNDRV_PCM_INFO_MMAP | |
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SNDRV_PCM_INFO_MMAP_VALID | |
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SNDRV_PCM_INFO_INTERLEAVED | |
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SNDRV_PCM_INFO_PAUSE | |
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SNDRV_PCM_INFO_SYNC_START | |
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SNDRV_PCM_INFO_NO_PERIOD_WAKEUP, |
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.formats = SNDRV_PCM_FMTBIT_S16_LE | |
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SNDRV_PCM_FMTBIT_S32_LE, |
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.rates = SNDRV_PCM_RATE_32000 | |
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SNDRV_PCM_RATE_44100 | |
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SNDRV_PCM_RATE_48000 | |
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SNDRV_PCM_RATE_64000 | |
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SNDRV_PCM_RATE_88200 | |
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SNDRV_PCM_RATE_96000 | |
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SNDRV_PCM_RATE_176400 | |
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SNDRV_PCM_RATE_192000, |
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.rate_min = 32000, |
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.rate_max = 192000, |
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.channels_min = 2, |
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.channels_max = 8, |
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.buffer_bytes_max = BUFFER_BYTES_MAX_MULTICH, |
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.period_bytes_min = PERIOD_BYTES_MIN, |
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.period_bytes_max = BUFFER_BYTES_MAX_MULTICH, |
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.periods_min = 1, |
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.periods_max = BUFFER_BYTES_MAX_MULTICH / PERIOD_BYTES_MIN, |
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.fifo_size = FIFO_BYTES_MULTICH, |
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}; |
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static const struct snd_pcm_hardware oxygen_ac97_hardware = { |
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.info = SNDRV_PCM_INFO_MMAP | |
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SNDRV_PCM_INFO_MMAP_VALID | |
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SNDRV_PCM_INFO_INTERLEAVED | |
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SNDRV_PCM_INFO_PAUSE | |
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SNDRV_PCM_INFO_SYNC_START | |
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SNDRV_PCM_INFO_NO_PERIOD_WAKEUP, |
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.formats = SNDRV_PCM_FMTBIT_S16_LE, |
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.rates = SNDRV_PCM_RATE_48000, |
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.rate_min = 48000, |
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.rate_max = 48000, |
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.channels_min = 2, |
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.channels_max = 2, |
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.buffer_bytes_max = BUFFER_BYTES_MAX, |
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.period_bytes_min = PERIOD_BYTES_MIN, |
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.period_bytes_max = BUFFER_BYTES_MAX, |
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.periods_min = 1, |
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.periods_max = BUFFER_BYTES_MAX / PERIOD_BYTES_MIN, |
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.fifo_size = FIFO_BYTES, |
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}; |
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static const struct snd_pcm_hardware *const oxygen_hardware[PCM_COUNT] = { |
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[PCM_A] = &oxygen_stereo_hardware, |
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[PCM_B] = &oxygen_stereo_hardware, |
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[PCM_C] = &oxygen_stereo_hardware, |
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[PCM_SPDIF] = &oxygen_stereo_hardware, |
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[PCM_MULTICH] = &oxygen_multichannel_hardware, |
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[PCM_AC97] = &oxygen_ac97_hardware, |
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}; |
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static inline unsigned int |
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oxygen_substream_channel(struct snd_pcm_substream *substream) |
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{ |
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return (unsigned int)(uintptr_t)substream->runtime->private_data; |
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} |
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static int oxygen_open(struct snd_pcm_substream *substream, |
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unsigned int channel) |
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{ |
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struct oxygen *chip = snd_pcm_substream_chip(substream); |
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struct snd_pcm_runtime *runtime = substream->runtime; |
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int err; |
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runtime->private_data = (void *)(uintptr_t)channel; |
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if (channel == PCM_B && chip->has_ac97_1 && |
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(chip->model.device_config & CAPTURE_2_FROM_AC97_1)) |
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runtime->hw = oxygen_ac97_hardware; |
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else |
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runtime->hw = *oxygen_hardware[channel]; |
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switch (channel) { |
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case PCM_C: |
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if (chip->model.device_config & CAPTURE_1_FROM_SPDIF) { |
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runtime->hw.rates &= ~(SNDRV_PCM_RATE_32000 | |
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SNDRV_PCM_RATE_64000); |
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runtime->hw.rate_min = 44100; |
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} |
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fallthrough; |
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case PCM_A: |
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case PCM_B: |
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runtime->hw.fifo_size = 0; |
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break; |
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case PCM_MULTICH: |
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runtime->hw.channels_max = chip->model.dac_channels_pcm; |
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break; |
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} |
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if (chip->model.pcm_hardware_filter) |
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chip->model.pcm_hardware_filter(channel, &runtime->hw); |
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err = snd_pcm_hw_constraint_step(runtime, 0, |
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SNDRV_PCM_HW_PARAM_PERIOD_BYTES, 32); |
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if (err < 0) |
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return err; |
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err = snd_pcm_hw_constraint_step(runtime, 0, |
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SNDRV_PCM_HW_PARAM_BUFFER_BYTES, 32); |
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if (err < 0) |
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return err; |
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if (runtime->hw.formats & SNDRV_PCM_FMTBIT_S32_LE) { |
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err = snd_pcm_hw_constraint_msbits(runtime, 0, 32, 24); |
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if (err < 0) |
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return err; |
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} |
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if (runtime->hw.channels_max > 2) { |
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err = snd_pcm_hw_constraint_step(runtime, 0, |
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SNDRV_PCM_HW_PARAM_CHANNELS, |
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2); |
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if (err < 0) |
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return err; |
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} |
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snd_pcm_set_sync(substream); |
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chip->streams[channel] = substream; |
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mutex_lock(&chip->mutex); |
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chip->pcm_active |= 1 << channel; |
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if (channel == PCM_SPDIF) { |
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chip->spdif_pcm_bits = chip->spdif_bits; |
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chip->controls[CONTROL_SPDIF_PCM]->vd[0].access &= |
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~SNDRV_CTL_ELEM_ACCESS_INACTIVE; |
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snd_ctl_notify(chip->card, SNDRV_CTL_EVENT_MASK_VALUE | |
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SNDRV_CTL_EVENT_MASK_INFO, |
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&chip->controls[CONTROL_SPDIF_PCM]->id); |
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} |
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mutex_unlock(&chip->mutex); |
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return 0; |
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} |
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static int oxygen_rec_a_open(struct snd_pcm_substream *substream) |
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{ |
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return oxygen_open(substream, PCM_A); |
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} |
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static int oxygen_rec_b_open(struct snd_pcm_substream *substream) |
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{ |
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return oxygen_open(substream, PCM_B); |
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} |
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static int oxygen_rec_c_open(struct snd_pcm_substream *substream) |
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{ |
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return oxygen_open(substream, PCM_C); |
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} |
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static int oxygen_spdif_open(struct snd_pcm_substream *substream) |
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{ |
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return oxygen_open(substream, PCM_SPDIF); |
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} |
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static int oxygen_multich_open(struct snd_pcm_substream *substream) |
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{ |
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return oxygen_open(substream, PCM_MULTICH); |
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} |
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static int oxygen_ac97_open(struct snd_pcm_substream *substream) |
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{ |
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return oxygen_open(substream, PCM_AC97); |
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} |
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static int oxygen_close(struct snd_pcm_substream *substream) |
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{ |
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struct oxygen *chip = snd_pcm_substream_chip(substream); |
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unsigned int channel = oxygen_substream_channel(substream); |
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mutex_lock(&chip->mutex); |
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chip->pcm_active &= ~(1 << channel); |
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if (channel == PCM_SPDIF) { |
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chip->controls[CONTROL_SPDIF_PCM]->vd[0].access |= |
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SNDRV_CTL_ELEM_ACCESS_INACTIVE; |
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snd_ctl_notify(chip->card, SNDRV_CTL_EVENT_MASK_VALUE | |
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SNDRV_CTL_EVENT_MASK_INFO, |
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&chip->controls[CONTROL_SPDIF_PCM]->id); |
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} |
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if (channel == PCM_SPDIF || channel == PCM_MULTICH) |
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oxygen_update_spdif_source(chip); |
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mutex_unlock(&chip->mutex); |
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chip->streams[channel] = NULL; |
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return 0; |
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} |
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static unsigned int oxygen_format(struct snd_pcm_hw_params *hw_params) |
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{ |
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if (params_format(hw_params) == SNDRV_PCM_FORMAT_S32_LE) |
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return OXYGEN_FORMAT_24; |
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else |
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return OXYGEN_FORMAT_16; |
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} |
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static unsigned int oxygen_rate(struct snd_pcm_hw_params *hw_params) |
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{ |
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switch (params_rate(hw_params)) { |
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case 32000: |
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return OXYGEN_RATE_32000; |
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case 44100: |
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return OXYGEN_RATE_44100; |
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default: /* 48000 */ |
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return OXYGEN_RATE_48000; |
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case 64000: |
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return OXYGEN_RATE_64000; |
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case 88200: |
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return OXYGEN_RATE_88200; |
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case 96000: |
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return OXYGEN_RATE_96000; |
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case 176400: |
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return OXYGEN_RATE_176400; |
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case 192000: |
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return OXYGEN_RATE_192000; |
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} |
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} |
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static unsigned int oxygen_i2s_bits(struct snd_pcm_hw_params *hw_params) |
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{ |
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if (params_format(hw_params) == SNDRV_PCM_FORMAT_S32_LE) |
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return OXYGEN_I2S_BITS_24; |
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else |
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return OXYGEN_I2S_BITS_16; |
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} |
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static unsigned int oxygen_play_channels(struct snd_pcm_hw_params *hw_params) |
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{ |
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switch (params_channels(hw_params)) { |
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default: /* 2 */ |
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return OXYGEN_PLAY_CHANNELS_2; |
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case 4: |
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return OXYGEN_PLAY_CHANNELS_4; |
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case 6: |
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return OXYGEN_PLAY_CHANNELS_6; |
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case 8: |
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return OXYGEN_PLAY_CHANNELS_8; |
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} |
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} |
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static const unsigned int channel_base_registers[PCM_COUNT] = { |
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[PCM_A] = OXYGEN_DMA_A_ADDRESS, |
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[PCM_B] = OXYGEN_DMA_B_ADDRESS, |
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[PCM_C] = OXYGEN_DMA_C_ADDRESS, |
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[PCM_SPDIF] = OXYGEN_DMA_SPDIF_ADDRESS, |
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[PCM_MULTICH] = OXYGEN_DMA_MULTICH_ADDRESS, |
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[PCM_AC97] = OXYGEN_DMA_AC97_ADDRESS, |
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}; |
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static int oxygen_hw_params(struct snd_pcm_substream *substream, |
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struct snd_pcm_hw_params *hw_params) |
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{ |
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struct oxygen *chip = snd_pcm_substream_chip(substream); |
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unsigned int channel = oxygen_substream_channel(substream); |
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oxygen_write32(chip, channel_base_registers[channel], |
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(u32)substream->runtime->dma_addr); |
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if (channel == PCM_MULTICH) { |
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oxygen_write32(chip, OXYGEN_DMA_MULTICH_COUNT, |
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params_buffer_bytes(hw_params) / 4 - 1); |
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oxygen_write32(chip, OXYGEN_DMA_MULTICH_TCOUNT, |
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params_period_bytes(hw_params) / 4 - 1); |
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} else { |
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oxygen_write16(chip, channel_base_registers[channel] + 4, |
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params_buffer_bytes(hw_params) / 4 - 1); |
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oxygen_write16(chip, channel_base_registers[channel] + 6, |
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params_period_bytes(hw_params) / 4 - 1); |
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} |
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return 0; |
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} |
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static u16 get_mclk(struct oxygen *chip, unsigned int channel, |
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struct snd_pcm_hw_params *params) |
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{ |
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unsigned int mclks, shift; |
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if (channel == PCM_MULTICH) |
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mclks = chip->model.dac_mclks; |
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else |
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mclks = chip->model.adc_mclks; |
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if (params_rate(params) <= 48000) |
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shift = 0; |
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else if (params_rate(params) <= 96000) |
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shift = 2; |
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else |
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shift = 4; |
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return OXYGEN_I2S_MCLK(mclks >> shift); |
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} |
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static int oxygen_rec_a_hw_params(struct snd_pcm_substream *substream, |
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struct snd_pcm_hw_params *hw_params) |
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{ |
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struct oxygen *chip = snd_pcm_substream_chip(substream); |
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int err; |
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err = oxygen_hw_params(substream, hw_params); |
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if (err < 0) |
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return err; |
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spin_lock_irq(&chip->reg_lock); |
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oxygen_write8_masked(chip, OXYGEN_REC_FORMAT, |
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oxygen_format(hw_params) << OXYGEN_REC_FORMAT_A_SHIFT, |
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OXYGEN_REC_FORMAT_A_MASK); |
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oxygen_write16_masked(chip, OXYGEN_I2S_A_FORMAT, |
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oxygen_rate(hw_params) | |
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chip->model.adc_i2s_format | |
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get_mclk(chip, PCM_A, hw_params) | |
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oxygen_i2s_bits(hw_params), |
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OXYGEN_I2S_RATE_MASK | |
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OXYGEN_I2S_FORMAT_MASK | |
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OXYGEN_I2S_MCLK_MASK | |
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OXYGEN_I2S_BITS_MASK); |
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spin_unlock_irq(&chip->reg_lock); |
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mutex_lock(&chip->mutex); |
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chip->model.set_adc_params(chip, hw_params); |
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mutex_unlock(&chip->mutex); |
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return 0; |
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} |
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static int oxygen_rec_b_hw_params(struct snd_pcm_substream *substream, |
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struct snd_pcm_hw_params *hw_params) |
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{ |
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struct oxygen *chip = snd_pcm_substream_chip(substream); |
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int is_ac97; |
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int err; |
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err = oxygen_hw_params(substream, hw_params); |
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if (err < 0) |
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return err; |
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is_ac97 = chip->has_ac97_1 && |
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(chip->model.device_config & CAPTURE_2_FROM_AC97_1); |
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spin_lock_irq(&chip->reg_lock); |
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oxygen_write8_masked(chip, OXYGEN_REC_FORMAT, |
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oxygen_format(hw_params) << OXYGEN_REC_FORMAT_B_SHIFT, |
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OXYGEN_REC_FORMAT_B_MASK); |
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if (!is_ac97) |
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oxygen_write16_masked(chip, OXYGEN_I2S_B_FORMAT, |
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oxygen_rate(hw_params) | |
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chip->model.adc_i2s_format | |
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get_mclk(chip, PCM_B, hw_params) | |
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oxygen_i2s_bits(hw_params), |
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OXYGEN_I2S_RATE_MASK | |
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OXYGEN_I2S_FORMAT_MASK | |
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OXYGEN_I2S_MCLK_MASK | |
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OXYGEN_I2S_BITS_MASK); |
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spin_unlock_irq(&chip->reg_lock); |
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if (!is_ac97) { |
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mutex_lock(&chip->mutex); |
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chip->model.set_adc_params(chip, hw_params); |
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mutex_unlock(&chip->mutex); |
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} |
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return 0; |
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} |
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static int oxygen_rec_c_hw_params(struct snd_pcm_substream *substream, |
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struct snd_pcm_hw_params *hw_params) |
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{ |
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struct oxygen *chip = snd_pcm_substream_chip(substream); |
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bool is_spdif; |
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int err; |
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err = oxygen_hw_params(substream, hw_params); |
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if (err < 0) |
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return err; |
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is_spdif = chip->model.device_config & CAPTURE_1_FROM_SPDIF; |
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spin_lock_irq(&chip->reg_lock); |
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oxygen_write8_masked(chip, OXYGEN_REC_FORMAT, |
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oxygen_format(hw_params) << OXYGEN_REC_FORMAT_C_SHIFT, |
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OXYGEN_REC_FORMAT_C_MASK); |
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if (!is_spdif) |
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oxygen_write16_masked(chip, OXYGEN_I2S_C_FORMAT, |
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oxygen_rate(hw_params) | |
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chip->model.adc_i2s_format | |
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get_mclk(chip, PCM_B, hw_params) | |
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oxygen_i2s_bits(hw_params), |
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OXYGEN_I2S_RATE_MASK | |
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OXYGEN_I2S_FORMAT_MASK | |
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OXYGEN_I2S_MCLK_MASK | |
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OXYGEN_I2S_BITS_MASK); |
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spin_unlock_irq(&chip->reg_lock); |
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if (!is_spdif) { |
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mutex_lock(&chip->mutex); |
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chip->model.set_adc_params(chip, hw_params); |
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mutex_unlock(&chip->mutex); |
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} |
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return 0; |
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} |
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static int oxygen_spdif_hw_params(struct snd_pcm_substream *substream, |
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struct snd_pcm_hw_params *hw_params) |
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{ |
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struct oxygen *chip = snd_pcm_substream_chip(substream); |
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int err; |
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err = oxygen_hw_params(substream, hw_params); |
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if (err < 0) |
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return err; |
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mutex_lock(&chip->mutex); |
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spin_lock_irq(&chip->reg_lock); |
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oxygen_clear_bits32(chip, OXYGEN_SPDIF_CONTROL, |
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OXYGEN_SPDIF_OUT_ENABLE); |
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oxygen_write8_masked(chip, OXYGEN_PLAY_FORMAT, |
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oxygen_format(hw_params) << OXYGEN_SPDIF_FORMAT_SHIFT, |
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OXYGEN_SPDIF_FORMAT_MASK); |
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oxygen_write32_masked(chip, OXYGEN_SPDIF_CONTROL, |
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oxygen_rate(hw_params) << OXYGEN_SPDIF_OUT_RATE_SHIFT, |
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OXYGEN_SPDIF_OUT_RATE_MASK); |
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oxygen_update_spdif_source(chip); |
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spin_unlock_irq(&chip->reg_lock); |
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mutex_unlock(&chip->mutex); |
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return 0; |
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} |
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|
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static int oxygen_multich_hw_params(struct snd_pcm_substream *substream, |
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struct snd_pcm_hw_params *hw_params) |
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{ |
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struct oxygen *chip = snd_pcm_substream_chip(substream); |
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int err; |
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err = oxygen_hw_params(substream, hw_params); |
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if (err < 0) |
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return err; |
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mutex_lock(&chip->mutex); |
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spin_lock_irq(&chip->reg_lock); |
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oxygen_write8_masked(chip, OXYGEN_PLAY_CHANNELS, |
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oxygen_play_channels(hw_params), |
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OXYGEN_PLAY_CHANNELS_MASK); |
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oxygen_write8_masked(chip, OXYGEN_PLAY_FORMAT, |
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oxygen_format(hw_params) << OXYGEN_MULTICH_FORMAT_SHIFT, |
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OXYGEN_MULTICH_FORMAT_MASK); |
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oxygen_write16_masked(chip, OXYGEN_I2S_MULTICH_FORMAT, |
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oxygen_rate(hw_params) | |
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chip->model.dac_i2s_format | |
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get_mclk(chip, PCM_MULTICH, hw_params) | |
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oxygen_i2s_bits(hw_params), |
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OXYGEN_I2S_RATE_MASK | |
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OXYGEN_I2S_FORMAT_MASK | |
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OXYGEN_I2S_MCLK_MASK | |
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OXYGEN_I2S_BITS_MASK); |
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oxygen_update_spdif_source(chip); |
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spin_unlock_irq(&chip->reg_lock); |
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|
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chip->model.set_dac_params(chip, hw_params); |
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oxygen_update_dac_routing(chip); |
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mutex_unlock(&chip->mutex); |
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return 0; |
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} |
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|
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static int oxygen_hw_free(struct snd_pcm_substream *substream) |
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{ |
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struct oxygen *chip = snd_pcm_substream_chip(substream); |
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unsigned int channel = oxygen_substream_channel(substream); |
|
unsigned int channel_mask = 1 << channel; |
|
|
|
spin_lock_irq(&chip->reg_lock); |
|
chip->interrupt_mask &= ~channel_mask; |
|
oxygen_write16(chip, OXYGEN_INTERRUPT_MASK, chip->interrupt_mask); |
|
|
|
oxygen_set_bits8(chip, OXYGEN_DMA_FLUSH, channel_mask); |
|
oxygen_clear_bits8(chip, OXYGEN_DMA_FLUSH, channel_mask); |
|
spin_unlock_irq(&chip->reg_lock); |
|
|
|
return 0; |
|
} |
|
|
|
static int oxygen_spdif_hw_free(struct snd_pcm_substream *substream) |
|
{ |
|
struct oxygen *chip = snd_pcm_substream_chip(substream); |
|
|
|
spin_lock_irq(&chip->reg_lock); |
|
oxygen_clear_bits32(chip, OXYGEN_SPDIF_CONTROL, |
|
OXYGEN_SPDIF_OUT_ENABLE); |
|
spin_unlock_irq(&chip->reg_lock); |
|
return oxygen_hw_free(substream); |
|
} |
|
|
|
static int oxygen_prepare(struct snd_pcm_substream *substream) |
|
{ |
|
struct oxygen *chip = snd_pcm_substream_chip(substream); |
|
unsigned int channel = oxygen_substream_channel(substream); |
|
unsigned int channel_mask = 1 << channel; |
|
|
|
spin_lock_irq(&chip->reg_lock); |
|
oxygen_set_bits8(chip, OXYGEN_DMA_FLUSH, channel_mask); |
|
oxygen_clear_bits8(chip, OXYGEN_DMA_FLUSH, channel_mask); |
|
|
|
if (substream->runtime->no_period_wakeup) |
|
chip->interrupt_mask &= ~channel_mask; |
|
else |
|
chip->interrupt_mask |= channel_mask; |
|
oxygen_write16(chip, OXYGEN_INTERRUPT_MASK, chip->interrupt_mask); |
|
spin_unlock_irq(&chip->reg_lock); |
|
return 0; |
|
} |
|
|
|
static int oxygen_trigger(struct snd_pcm_substream *substream, int cmd) |
|
{ |
|
struct oxygen *chip = snd_pcm_substream_chip(substream); |
|
struct snd_pcm_substream *s; |
|
unsigned int mask = 0; |
|
int pausing; |
|
|
|
switch (cmd) { |
|
case SNDRV_PCM_TRIGGER_STOP: |
|
case SNDRV_PCM_TRIGGER_START: |
|
case SNDRV_PCM_TRIGGER_SUSPEND: |
|
pausing = 0; |
|
break; |
|
case SNDRV_PCM_TRIGGER_PAUSE_PUSH: |
|
case SNDRV_PCM_TRIGGER_PAUSE_RELEASE: |
|
pausing = 1; |
|
break; |
|
default: |
|
return -EINVAL; |
|
} |
|
|
|
snd_pcm_group_for_each_entry(s, substream) { |
|
if (snd_pcm_substream_chip(s) == chip) { |
|
mask |= 1 << oxygen_substream_channel(s); |
|
snd_pcm_trigger_done(s, substream); |
|
} |
|
} |
|
|
|
spin_lock(&chip->reg_lock); |
|
if (!pausing) { |
|
if (cmd == SNDRV_PCM_TRIGGER_START) |
|
chip->pcm_running |= mask; |
|
else |
|
chip->pcm_running &= ~mask; |
|
oxygen_write8(chip, OXYGEN_DMA_STATUS, chip->pcm_running); |
|
} else { |
|
if (cmd == SNDRV_PCM_TRIGGER_PAUSE_PUSH) |
|
oxygen_set_bits8(chip, OXYGEN_DMA_PAUSE, mask); |
|
else |
|
oxygen_clear_bits8(chip, OXYGEN_DMA_PAUSE, mask); |
|
} |
|
spin_unlock(&chip->reg_lock); |
|
return 0; |
|
} |
|
|
|
static snd_pcm_uframes_t oxygen_pointer(struct snd_pcm_substream *substream) |
|
{ |
|
struct oxygen *chip = snd_pcm_substream_chip(substream); |
|
struct snd_pcm_runtime *runtime = substream->runtime; |
|
unsigned int channel = oxygen_substream_channel(substream); |
|
u32 curr_addr; |
|
|
|
/* no spinlock, this read should be atomic */ |
|
curr_addr = oxygen_read32(chip, channel_base_registers[channel]); |
|
return bytes_to_frames(runtime, curr_addr - (u32)runtime->dma_addr); |
|
} |
|
|
|
static const struct snd_pcm_ops oxygen_rec_a_ops = { |
|
.open = oxygen_rec_a_open, |
|
.close = oxygen_close, |
|
.hw_params = oxygen_rec_a_hw_params, |
|
.hw_free = oxygen_hw_free, |
|
.prepare = oxygen_prepare, |
|
.trigger = oxygen_trigger, |
|
.pointer = oxygen_pointer, |
|
}; |
|
|
|
static const struct snd_pcm_ops oxygen_rec_b_ops = { |
|
.open = oxygen_rec_b_open, |
|
.close = oxygen_close, |
|
.hw_params = oxygen_rec_b_hw_params, |
|
.hw_free = oxygen_hw_free, |
|
.prepare = oxygen_prepare, |
|
.trigger = oxygen_trigger, |
|
.pointer = oxygen_pointer, |
|
}; |
|
|
|
static const struct snd_pcm_ops oxygen_rec_c_ops = { |
|
.open = oxygen_rec_c_open, |
|
.close = oxygen_close, |
|
.hw_params = oxygen_rec_c_hw_params, |
|
.hw_free = oxygen_hw_free, |
|
.prepare = oxygen_prepare, |
|
.trigger = oxygen_trigger, |
|
.pointer = oxygen_pointer, |
|
}; |
|
|
|
static const struct snd_pcm_ops oxygen_spdif_ops = { |
|
.open = oxygen_spdif_open, |
|
.close = oxygen_close, |
|
.hw_params = oxygen_spdif_hw_params, |
|
.hw_free = oxygen_spdif_hw_free, |
|
.prepare = oxygen_prepare, |
|
.trigger = oxygen_trigger, |
|
.pointer = oxygen_pointer, |
|
}; |
|
|
|
static const struct snd_pcm_ops oxygen_multich_ops = { |
|
.open = oxygen_multich_open, |
|
.close = oxygen_close, |
|
.hw_params = oxygen_multich_hw_params, |
|
.hw_free = oxygen_hw_free, |
|
.prepare = oxygen_prepare, |
|
.trigger = oxygen_trigger, |
|
.pointer = oxygen_pointer, |
|
}; |
|
|
|
static const struct snd_pcm_ops oxygen_ac97_ops = { |
|
.open = oxygen_ac97_open, |
|
.close = oxygen_close, |
|
.hw_params = oxygen_hw_params, |
|
.hw_free = oxygen_hw_free, |
|
.prepare = oxygen_prepare, |
|
.trigger = oxygen_trigger, |
|
.pointer = oxygen_pointer, |
|
}; |
|
|
|
int oxygen_pcm_init(struct oxygen *chip) |
|
{ |
|
struct snd_pcm *pcm; |
|
int outs, ins; |
|
int err; |
|
|
|
outs = !!(chip->model.device_config & PLAYBACK_0_TO_I2S); |
|
ins = !!(chip->model.device_config & (CAPTURE_0_FROM_I2S_1 | |
|
CAPTURE_0_FROM_I2S_2)); |
|
if (outs | ins) { |
|
err = snd_pcm_new(chip->card, "Multichannel", |
|
0, outs, ins, &pcm); |
|
if (err < 0) |
|
return err; |
|
if (outs) |
|
snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, |
|
&oxygen_multich_ops); |
|
if (chip->model.device_config & CAPTURE_0_FROM_I2S_1) |
|
snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, |
|
&oxygen_rec_a_ops); |
|
else if (chip->model.device_config & CAPTURE_0_FROM_I2S_2) |
|
snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, |
|
&oxygen_rec_b_ops); |
|
pcm->private_data = chip; |
|
strcpy(pcm->name, "Multichannel"); |
|
if (outs) |
|
snd_pcm_set_managed_buffer(pcm->streams[SNDRV_PCM_STREAM_PLAYBACK].substream, |
|
SNDRV_DMA_TYPE_DEV, |
|
&chip->pci->dev, |
|
DEFAULT_BUFFER_BYTES_MULTICH, |
|
BUFFER_BYTES_MAX_MULTICH); |
|
if (ins) |
|
snd_pcm_set_managed_buffer(pcm->streams[SNDRV_PCM_STREAM_CAPTURE].substream, |
|
SNDRV_DMA_TYPE_DEV, |
|
&chip->pci->dev, |
|
DEFAULT_BUFFER_BYTES, |
|
BUFFER_BYTES_MAX); |
|
} |
|
|
|
outs = !!(chip->model.device_config & PLAYBACK_1_TO_SPDIF); |
|
ins = !!(chip->model.device_config & CAPTURE_1_FROM_SPDIF); |
|
if (outs | ins) { |
|
err = snd_pcm_new(chip->card, "Digital", 1, outs, ins, &pcm); |
|
if (err < 0) |
|
return err; |
|
if (outs) |
|
snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, |
|
&oxygen_spdif_ops); |
|
if (ins) |
|
snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, |
|
&oxygen_rec_c_ops); |
|
pcm->private_data = chip; |
|
strcpy(pcm->name, "Digital"); |
|
snd_pcm_set_managed_buffer_all(pcm, SNDRV_DMA_TYPE_DEV, |
|
&chip->pci->dev, |
|
DEFAULT_BUFFER_BYTES, |
|
BUFFER_BYTES_MAX); |
|
} |
|
|
|
if (chip->has_ac97_1) { |
|
outs = !!(chip->model.device_config & PLAYBACK_2_TO_AC97_1); |
|
ins = !!(chip->model.device_config & CAPTURE_2_FROM_AC97_1); |
|
} else { |
|
outs = 0; |
|
ins = !!(chip->model.device_config & CAPTURE_2_FROM_I2S_2); |
|
} |
|
if (outs | ins) { |
|
err = snd_pcm_new(chip->card, outs ? "AC97" : "Analog2", |
|
2, outs, ins, &pcm); |
|
if (err < 0) |
|
return err; |
|
if (outs) { |
|
snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, |
|
&oxygen_ac97_ops); |
|
oxygen_write8_masked(chip, OXYGEN_REC_ROUTING, |
|
OXYGEN_REC_B_ROUTE_AC97_1, |
|
OXYGEN_REC_B_ROUTE_MASK); |
|
} |
|
if (ins) |
|
snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, |
|
&oxygen_rec_b_ops); |
|
pcm->private_data = chip; |
|
strcpy(pcm->name, outs ? "Front Panel" : "Analog 2"); |
|
snd_pcm_set_managed_buffer_all(pcm, SNDRV_DMA_TYPE_DEV, |
|
&chip->pci->dev, |
|
DEFAULT_BUFFER_BYTES, |
|
BUFFER_BYTES_MAX); |
|
} |
|
|
|
ins = !!(chip->model.device_config & CAPTURE_3_FROM_I2S_3); |
|
if (ins) { |
|
err = snd_pcm_new(chip->card, "Analog3", 3, 0, ins, &pcm); |
|
if (err < 0) |
|
return err; |
|
snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, |
|
&oxygen_rec_c_ops); |
|
oxygen_write8_masked(chip, OXYGEN_REC_ROUTING, |
|
OXYGEN_REC_C_ROUTE_I2S_ADC_3, |
|
OXYGEN_REC_C_ROUTE_MASK); |
|
pcm->private_data = chip; |
|
strcpy(pcm->name, "Analog 3"); |
|
snd_pcm_set_managed_buffer_all(pcm, SNDRV_DMA_TYPE_DEV, |
|
&chip->pci->dev, |
|
DEFAULT_BUFFER_BYTES, |
|
BUFFER_BYTES_MAX); |
|
} |
|
return 0; |
|
}
|
|
|