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149 lines
3.1 KiB
149 lines
3.1 KiB
// SPDX-License-Identifier: GPL-2.0 |
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#if defined(__i386__) || defined(__x86_64__) |
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#include <unistd.h> |
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#include <errno.h> |
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#include <stdio.h> |
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#include <stdint.h> |
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#include <pci/pci.h> |
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#include "helpers/helpers.h" |
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#define MSR_AMD_PSTATE_STATUS 0xc0010063 |
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#define MSR_AMD_PSTATE 0xc0010064 |
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#define MSR_AMD_PSTATE_LIMIT 0xc0010061 |
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union core_pstate { |
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/* pre fam 17h: */ |
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struct { |
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unsigned fid:6; |
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unsigned did:3; |
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unsigned vid:7; |
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unsigned res1:6; |
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unsigned nbdid:1; |
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unsigned res2:2; |
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unsigned nbvid:7; |
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unsigned iddval:8; |
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unsigned idddiv:2; |
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unsigned res3:21; |
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unsigned en:1; |
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} pstate; |
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/* since fam 17h: */ |
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struct { |
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unsigned fid:8; |
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unsigned did:6; |
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unsigned vid:8; |
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unsigned iddval:8; |
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unsigned idddiv:2; |
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unsigned res1:31; |
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unsigned en:1; |
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} pstatedef; |
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unsigned long long val; |
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}; |
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static int get_did(union core_pstate pstate) |
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{ |
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int t; |
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if (cpupower_cpu_info.caps & CPUPOWER_CAP_AMD_PSTATEDEF) |
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t = pstate.pstatedef.did; |
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else if (cpupower_cpu_info.family == 0x12) |
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t = pstate.val & 0xf; |
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else |
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t = pstate.pstate.did; |
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return t; |
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} |
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static int get_cof(union core_pstate pstate) |
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{ |
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int t; |
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int fid, did, cof; |
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did = get_did(pstate); |
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if (cpupower_cpu_info.caps & CPUPOWER_CAP_AMD_PSTATEDEF) { |
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fid = pstate.pstatedef.fid; |
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cof = 200 * fid / did; |
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} else { |
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t = 0x10; |
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fid = pstate.pstate.fid; |
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if (cpupower_cpu_info.family == 0x11) |
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t = 0x8; |
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cof = (100 * (fid + t)) >> did; |
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} |
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return cof; |
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} |
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/* Needs: |
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* cpu -> the cpu that gets evaluated |
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* boost_states -> how much boost states the machines support |
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* |
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* Fills up: |
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* pstates -> a pointer to an array of size MAX_HW_PSTATES |
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* must be initialized with zeros. |
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* All available HW pstates (including boost states) |
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* no -> amount of pstates above array got filled up with |
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* |
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* returns zero on success, -1 on failure |
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*/ |
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int decode_pstates(unsigned int cpu, int boost_states, |
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unsigned long *pstates, int *no) |
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{ |
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int i, psmax; |
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union core_pstate pstate; |
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unsigned long long val; |
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/* Only read out frequencies from HW if HW Pstate is supported, |
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* otherwise frequencies are exported via ACPI tables. |
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*/ |
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if (!(cpupower_cpu_info.caps & CPUPOWER_CAP_AMD_HW_PSTATE)) |
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return -1; |
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if (read_msr(cpu, MSR_AMD_PSTATE_LIMIT, &val)) |
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return -1; |
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psmax = (val >> 4) & 0x7; |
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psmax += boost_states; |
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for (i = 0; i <= psmax; i++) { |
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if (i >= MAX_HW_PSTATES) { |
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fprintf(stderr, "HW pstates [%d] exceeding max [%d]\n", |
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psmax, MAX_HW_PSTATES); |
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return -1; |
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} |
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if (read_msr(cpu, MSR_AMD_PSTATE + i, &pstate.val)) |
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return -1; |
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/* The enabled bit (bit 63) is common for all families */ |
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if (!pstate.pstatedef.en) |
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continue; |
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pstates[i] = get_cof(pstate); |
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} |
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*no = i; |
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return 0; |
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} |
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int amd_pci_get_num_boost_states(int *active, int *states) |
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{ |
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struct pci_access *pci_acc; |
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struct pci_dev *device; |
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uint8_t val = 0; |
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*active = *states = 0; |
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device = pci_slot_func_init(&pci_acc, 0x18, 4); |
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if (device == NULL) |
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return -ENODEV; |
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val = pci_read_byte(device, 0x15c); |
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if (val & 3) |
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*active = 1; |
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else |
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*active = 0; |
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*states = (val >> 2) & 7; |
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pci_cleanup(pci_acc); |
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return 0; |
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} |
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#endif /* defined(__i386__) || defined(__x86_64__) */
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