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214 lines
4.5 KiB
214 lines
4.5 KiB
/* SPDX-License-Identifier: GPL-2.0-only */ |
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/* |
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* Copyright (C) 2014 NVIDIA Corporation |
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*/ |
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#ifndef __SOC_TEGRA_MC_H__ |
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#define __SOC_TEGRA_MC_H__ |
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#include <linux/bits.h> |
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#include <linux/err.h> |
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#include <linux/interconnect-provider.h> |
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#include <linux/reset-controller.h> |
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#include <linux/types.h> |
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struct clk; |
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struct device; |
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struct page; |
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struct tegra_smmu_enable { |
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unsigned int reg; |
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unsigned int bit; |
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}; |
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struct tegra_mc_timing { |
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unsigned long rate; |
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u32 *emem_data; |
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}; |
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/* latency allowance */ |
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struct tegra_mc_la { |
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unsigned int reg; |
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unsigned int shift; |
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unsigned int mask; |
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unsigned int def; |
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}; |
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struct tegra_mc_client { |
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unsigned int id; |
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const char *name; |
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unsigned int swgroup; |
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unsigned int fifo_size; |
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struct tegra_smmu_enable smmu; |
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struct tegra_mc_la la; |
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}; |
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struct tegra_smmu_swgroup { |
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const char *name; |
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unsigned int swgroup; |
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unsigned int reg; |
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}; |
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struct tegra_smmu_group_soc { |
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const char *name; |
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const unsigned int *swgroups; |
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unsigned int num_swgroups; |
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}; |
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struct tegra_smmu_soc { |
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const struct tegra_mc_client *clients; |
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unsigned int num_clients; |
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const struct tegra_smmu_swgroup *swgroups; |
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unsigned int num_swgroups; |
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const struct tegra_smmu_group_soc *groups; |
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unsigned int num_groups; |
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bool supports_round_robin_arbitration; |
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bool supports_request_limit; |
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unsigned int num_tlb_lines; |
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unsigned int num_asids; |
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}; |
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struct tegra_mc; |
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struct tegra_smmu; |
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struct gart_device; |
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#ifdef CONFIG_TEGRA_IOMMU_SMMU |
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struct tegra_smmu *tegra_smmu_probe(struct device *dev, |
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const struct tegra_smmu_soc *soc, |
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struct tegra_mc *mc); |
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void tegra_smmu_remove(struct tegra_smmu *smmu); |
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#else |
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static inline struct tegra_smmu * |
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tegra_smmu_probe(struct device *dev, const struct tegra_smmu_soc *soc, |
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struct tegra_mc *mc) |
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{ |
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return NULL; |
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} |
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static inline void tegra_smmu_remove(struct tegra_smmu *smmu) |
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{ |
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} |
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#endif |
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#ifdef CONFIG_TEGRA_IOMMU_GART |
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struct gart_device *tegra_gart_probe(struct device *dev, struct tegra_mc *mc); |
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int tegra_gart_suspend(struct gart_device *gart); |
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int tegra_gart_resume(struct gart_device *gart); |
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#else |
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static inline struct gart_device * |
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tegra_gart_probe(struct device *dev, struct tegra_mc *mc) |
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{ |
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return ERR_PTR(-ENODEV); |
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} |
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static inline int tegra_gart_suspend(struct gart_device *gart) |
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{ |
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return -ENODEV; |
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} |
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static inline int tegra_gart_resume(struct gart_device *gart) |
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{ |
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return -ENODEV; |
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} |
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#endif |
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struct tegra_mc_reset { |
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const char *name; |
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unsigned long id; |
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unsigned int control; |
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unsigned int status; |
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unsigned int reset; |
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unsigned int bit; |
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}; |
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struct tegra_mc_reset_ops { |
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int (*hotreset_assert)(struct tegra_mc *mc, |
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const struct tegra_mc_reset *rst); |
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int (*hotreset_deassert)(struct tegra_mc *mc, |
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const struct tegra_mc_reset *rst); |
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int (*block_dma)(struct tegra_mc *mc, |
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const struct tegra_mc_reset *rst); |
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bool (*dma_idling)(struct tegra_mc *mc, |
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const struct tegra_mc_reset *rst); |
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int (*unblock_dma)(struct tegra_mc *mc, |
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const struct tegra_mc_reset *rst); |
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int (*reset_status)(struct tegra_mc *mc, |
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const struct tegra_mc_reset *rst); |
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}; |
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#define TEGRA_MC_ICC_TAG_DEFAULT 0 |
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#define TEGRA_MC_ICC_TAG_ISO BIT(0) |
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struct tegra_mc_icc_ops { |
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int (*set)(struct icc_node *src, struct icc_node *dst); |
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int (*aggregate)(struct icc_node *node, u32 tag, u32 avg_bw, |
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u32 peak_bw, u32 *agg_avg, u32 *agg_peak); |
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struct icc_node_data *(*xlate_extended)(struct of_phandle_args *spec, |
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void *data); |
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}; |
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struct tegra_mc_soc { |
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const struct tegra_mc_client *clients; |
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unsigned int num_clients; |
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const unsigned long *emem_regs; |
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unsigned int num_emem_regs; |
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unsigned int num_address_bits; |
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unsigned int atom_size; |
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u8 client_id_mask; |
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const struct tegra_smmu_soc *smmu; |
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u32 intmask; |
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const struct tegra_mc_reset_ops *reset_ops; |
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const struct tegra_mc_reset *resets; |
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unsigned int num_resets; |
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const struct tegra_mc_icc_ops *icc_ops; |
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}; |
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struct tegra_mc { |
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struct device *dev; |
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struct tegra_smmu *smmu; |
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struct gart_device *gart; |
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void __iomem *regs; |
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struct clk *clk; |
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int irq; |
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const struct tegra_mc_soc *soc; |
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unsigned long tick; |
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struct tegra_mc_timing *timings; |
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unsigned int num_timings; |
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struct reset_controller_dev reset; |
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struct icc_provider provider; |
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spinlock_t lock; |
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}; |
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int tegra_mc_write_emem_configuration(struct tegra_mc *mc, unsigned long rate); |
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unsigned int tegra_mc_get_emem_device_count(struct tegra_mc *mc); |
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#ifdef CONFIG_TEGRA_MC |
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struct tegra_mc *devm_tegra_memory_controller_get(struct device *dev); |
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#else |
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static inline struct tegra_mc * |
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devm_tegra_memory_controller_get(struct device *dev) |
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{ |
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return ERR_PTR(-ENODEV); |
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} |
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#endif |
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#endif /* __SOC_TEGRA_MC_H__ */
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