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596 lines
18 KiB
596 lines
18 KiB
/* SPDX-License-Identifier: GPL-2.0 */ |
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/* |
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* ISP116x register declarations and HCD data structures |
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* |
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* Copyright (C) 2005 Olav Kongas <[email protected]> |
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* Portions: |
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* Copyright (C) 2004 Lothar Wassmann |
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* Copyright (C) 2004 Psion Teklogix |
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* Copyright (C) 2004 David Brownell |
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*/ |
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/* us of 1ms frame */ |
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#define MAX_LOAD_LIMIT 850 |
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/* Full speed: max # of bytes to transfer for a single urb |
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at a time must be < 1024 && must be multiple of 64. |
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832 allows transferring 4kiB within 5 frames. */ |
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#define MAX_TRANSFER_SIZE_FULLSPEED 832 |
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/* Low speed: there is no reason to schedule in very big |
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chunks; often the requested long transfers are for |
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string descriptors containing short strings. */ |
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#define MAX_TRANSFER_SIZE_LOWSPEED 64 |
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/* Bytetime (us), a rough indication of how much time it |
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would take to transfer a byte of useful data over USB */ |
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#define BYTE_TIME_FULLSPEED 1 |
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#define BYTE_TIME_LOWSPEED 20 |
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/* Buffer sizes */ |
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#define ISP116x_BUF_SIZE 4096 |
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#define ISP116x_ITL_BUFSIZE 0 |
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#define ISP116x_ATL_BUFSIZE ((ISP116x_BUF_SIZE) - 2*(ISP116x_ITL_BUFSIZE)) |
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#define ISP116x_WRITE_OFFSET 0x80 |
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/*------------ ISP116x registers/bits ------------*/ |
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#define HCREVISION 0x00 |
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#define HCCONTROL 0x01 |
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#define HCCONTROL_HCFS (3 << 6) /* host controller |
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functional state */ |
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#define HCCONTROL_USB_RESET (0 << 6) |
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#define HCCONTROL_USB_RESUME (1 << 6) |
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#define HCCONTROL_USB_OPER (2 << 6) |
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#define HCCONTROL_USB_SUSPEND (3 << 6) |
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#define HCCONTROL_RWC (1 << 9) /* remote wakeup connected */ |
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#define HCCONTROL_RWE (1 << 10) /* remote wakeup enable */ |
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#define HCCMDSTAT 0x02 |
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#define HCCMDSTAT_HCR (1 << 0) /* host controller reset */ |
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#define HCCMDSTAT_SOC (3 << 16) /* scheduling overrun count */ |
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#define HCINTSTAT 0x03 |
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#define HCINT_SO (1 << 0) /* scheduling overrun */ |
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#define HCINT_WDH (1 << 1) /* writeback of done_head */ |
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#define HCINT_SF (1 << 2) /* start frame */ |
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#define HCINT_RD (1 << 3) /* resume detect */ |
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#define HCINT_UE (1 << 4) /* unrecoverable error */ |
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#define HCINT_FNO (1 << 5) /* frame number overflow */ |
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#define HCINT_RHSC (1 << 6) /* root hub status change */ |
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#define HCINT_OC (1 << 30) /* ownership change */ |
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#define HCINT_MIE (1 << 31) /* master interrupt enable */ |
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#define HCINTENB 0x04 |
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#define HCINTDIS 0x05 |
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#define HCFMINTVL 0x0d |
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#define HCFMREM 0x0e |
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#define HCFMNUM 0x0f |
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#define HCLSTHRESH 0x11 |
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#define HCRHDESCA 0x12 |
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#define RH_A_NDP (0x3 << 0) /* # downstream ports */ |
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#define RH_A_PSM (1 << 8) /* power switching mode */ |
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#define RH_A_NPS (1 << 9) /* no power switching */ |
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#define RH_A_DT (1 << 10) /* device type (mbz) */ |
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#define RH_A_OCPM (1 << 11) /* overcurrent protection |
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mode */ |
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#define RH_A_NOCP (1 << 12) /* no overcurrent protection */ |
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#define RH_A_POTPGT (0xff << 24) /* power on -> power good |
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time */ |
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#define HCRHDESCB 0x13 |
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#define RH_B_DR (0xffff << 0) /* device removable flags */ |
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#define RH_B_PPCM (0xffff << 16) /* port power control mask */ |
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#define HCRHSTATUS 0x14 |
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#define RH_HS_LPS (1 << 0) /* local power status */ |
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#define RH_HS_OCI (1 << 1) /* over current indicator */ |
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#define RH_HS_DRWE (1 << 15) /* device remote wakeup |
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enable */ |
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#define RH_HS_LPSC (1 << 16) /* local power status change */ |
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#define RH_HS_OCIC (1 << 17) /* over current indicator |
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change */ |
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#define RH_HS_CRWE (1 << 31) /* clear remote wakeup |
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enable */ |
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#define HCRHPORT1 0x15 |
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#define RH_PS_CCS (1 << 0) /* current connect status */ |
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#define RH_PS_PES (1 << 1) /* port enable status */ |
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#define RH_PS_PSS (1 << 2) /* port suspend status */ |
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#define RH_PS_POCI (1 << 3) /* port over current |
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indicator */ |
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#define RH_PS_PRS (1 << 4) /* port reset status */ |
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#define RH_PS_PPS (1 << 8) /* port power status */ |
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#define RH_PS_LSDA (1 << 9) /* low speed device attached */ |
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#define RH_PS_CSC (1 << 16) /* connect status change */ |
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#define RH_PS_PESC (1 << 17) /* port enable status change */ |
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#define RH_PS_PSSC (1 << 18) /* port suspend status |
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change */ |
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#define RH_PS_OCIC (1 << 19) /* over current indicator |
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change */ |
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#define RH_PS_PRSC (1 << 20) /* port reset status change */ |
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#define HCRHPORT_CLRMASK (0x1f << 16) |
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#define HCRHPORT2 0x16 |
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#define HCHWCFG 0x20 |
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#define HCHWCFG_15KRSEL (1 << 12) |
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#define HCHWCFG_CLKNOTSTOP (1 << 11) |
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#define HCHWCFG_ANALOG_OC (1 << 10) |
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#define HCHWCFG_DACK_MODE (1 << 8) |
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#define HCHWCFG_EOT_POL (1 << 7) |
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#define HCHWCFG_DACK_POL (1 << 6) |
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#define HCHWCFG_DREQ_POL (1 << 5) |
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#define HCHWCFG_DBWIDTH_MASK (0x03 << 3) |
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#define HCHWCFG_DBWIDTH(n) (((n) << 3) & HCHWCFG_DBWIDTH_MASK) |
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#define HCHWCFG_INT_POL (1 << 2) |
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#define HCHWCFG_INT_TRIGGER (1 << 1) |
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#define HCHWCFG_INT_ENABLE (1 << 0) |
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#define HCDMACFG 0x21 |
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#define HCDMACFG_BURST_LEN_MASK (0x03 << 5) |
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#define HCDMACFG_BURST_LEN(n) (((n) << 5) & HCDMACFG_BURST_LEN_MASK) |
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#define HCDMACFG_BURST_LEN_1 HCDMACFG_BURST_LEN(0) |
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#define HCDMACFG_BURST_LEN_4 HCDMACFG_BURST_LEN(1) |
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#define HCDMACFG_BURST_LEN_8 HCDMACFG_BURST_LEN(2) |
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#define HCDMACFG_DMA_ENABLE (1 << 4) |
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#define HCDMACFG_BUF_TYPE_MASK (0x07 << 1) |
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#define HCDMACFG_CTR_SEL (1 << 2) |
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#define HCDMACFG_ITLATL_SEL (1 << 1) |
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#define HCDMACFG_DMA_RW_SELECT (1 << 0) |
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#define HCXFERCTR 0x22 |
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#define HCuPINT 0x24 |
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#define HCuPINT_SOF (1 << 0) |
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#define HCuPINT_ATL (1 << 1) |
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#define HCuPINT_AIIEOT (1 << 2) |
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#define HCuPINT_OPR (1 << 4) |
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#define HCuPINT_SUSP (1 << 5) |
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#define HCuPINT_CLKRDY (1 << 6) |
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#define HCuPINTENB 0x25 |
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#define HCCHIPID 0x27 |
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#define HCCHIPID_MASK 0xff00 |
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#define HCCHIPID_MAGIC 0x6100 |
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#define HCSCRATCH 0x28 |
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#define HCSWRES 0x29 |
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#define HCSWRES_MAGIC 0x00f6 |
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#define HCITLBUFLEN 0x2a |
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#define HCATLBUFLEN 0x2b |
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#define HCBUFSTAT 0x2c |
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#define HCBUFSTAT_ITL0_FULL (1 << 0) |
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#define HCBUFSTAT_ITL1_FULL (1 << 1) |
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#define HCBUFSTAT_ATL_FULL (1 << 2) |
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#define HCBUFSTAT_ITL0_DONE (1 << 3) |
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#define HCBUFSTAT_ITL1_DONE (1 << 4) |
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#define HCBUFSTAT_ATL_DONE (1 << 5) |
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#define HCRDITL0LEN 0x2d |
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#define HCRDITL1LEN 0x2e |
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#define HCITLPORT 0x40 |
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#define HCATLPORT 0x41 |
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/* Philips transfer descriptor */ |
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struct ptd { |
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u16 count; |
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#define PTD_COUNT_MSK (0x3ff << 0) |
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#define PTD_TOGGLE_MSK (1 << 10) |
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#define PTD_ACTIVE_MSK (1 << 11) |
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#define PTD_CC_MSK (0xf << 12) |
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u16 mps; |
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#define PTD_MPS_MSK (0x3ff << 0) |
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#define PTD_SPD_MSK (1 << 10) |
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#define PTD_LAST_MSK (1 << 11) |
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#define PTD_EP_MSK (0xf << 12) |
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u16 len; |
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#define PTD_LEN_MSK (0x3ff << 0) |
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#define PTD_DIR_MSK (3 << 10) |
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#define PTD_DIR_SETUP (0) |
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#define PTD_DIR_OUT (1) |
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#define PTD_DIR_IN (2) |
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#define PTD_B5_5_MSK (1 << 13) |
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u16 faddr; |
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#define PTD_FA_MSK (0x7f << 0) |
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#define PTD_FMT_MSK (1 << 7) |
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} __attribute__ ((packed, aligned(2))); |
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/* PTD accessor macros. */ |
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#define PTD_GET_COUNT(p) (((p)->count & PTD_COUNT_MSK) >> 0) |
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#define PTD_COUNT(v) (((v) << 0) & PTD_COUNT_MSK) |
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#define PTD_GET_TOGGLE(p) (((p)->count & PTD_TOGGLE_MSK) >> 10) |
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#define PTD_TOGGLE(v) (((v) << 10) & PTD_TOGGLE_MSK) |
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#define PTD_GET_ACTIVE(p) (((p)->count & PTD_ACTIVE_MSK) >> 11) |
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#define PTD_ACTIVE(v) (((v) << 11) & PTD_ACTIVE_MSK) |
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#define PTD_GET_CC(p) (((p)->count & PTD_CC_MSK) >> 12) |
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#define PTD_CC(v) (((v) << 12) & PTD_CC_MSK) |
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#define PTD_GET_MPS(p) (((p)->mps & PTD_MPS_MSK) >> 0) |
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#define PTD_MPS(v) (((v) << 0) & PTD_MPS_MSK) |
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#define PTD_GET_SPD(p) (((p)->mps & PTD_SPD_MSK) >> 10) |
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#define PTD_SPD(v) (((v) << 10) & PTD_SPD_MSK) |
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#define PTD_GET_LAST(p) (((p)->mps & PTD_LAST_MSK) >> 11) |
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#define PTD_LAST(v) (((v) << 11) & PTD_LAST_MSK) |
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#define PTD_GET_EP(p) (((p)->mps & PTD_EP_MSK) >> 12) |
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#define PTD_EP(v) (((v) << 12) & PTD_EP_MSK) |
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#define PTD_GET_LEN(p) (((p)->len & PTD_LEN_MSK) >> 0) |
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#define PTD_LEN(v) (((v) << 0) & PTD_LEN_MSK) |
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#define PTD_GET_DIR(p) (((p)->len & PTD_DIR_MSK) >> 10) |
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#define PTD_DIR(v) (((v) << 10) & PTD_DIR_MSK) |
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#define PTD_GET_B5_5(p) (((p)->len & PTD_B5_5_MSK) >> 13) |
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#define PTD_B5_5(v) (((v) << 13) & PTD_B5_5_MSK) |
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#define PTD_GET_FA(p) (((p)->faddr & PTD_FA_MSK) >> 0) |
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#define PTD_FA(v) (((v) << 0) & PTD_FA_MSK) |
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#define PTD_GET_FMT(p) (((p)->faddr & PTD_FMT_MSK) >> 7) |
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#define PTD_FMT(v) (((v) << 7) & PTD_FMT_MSK) |
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/* Hardware transfer status codes -- CC from ptd->count */ |
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#define TD_CC_NOERROR 0x00 |
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#define TD_CC_CRC 0x01 |
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#define TD_CC_BITSTUFFING 0x02 |
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#define TD_CC_DATATOGGLEM 0x03 |
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#define TD_CC_STALL 0x04 |
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#define TD_DEVNOTRESP 0x05 |
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#define TD_PIDCHECKFAIL 0x06 |
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#define TD_UNEXPECTEDPID 0x07 |
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#define TD_DATAOVERRUN 0x08 |
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#define TD_DATAUNDERRUN 0x09 |
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/* 0x0A, 0x0B reserved for hardware */ |
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#define TD_BUFFEROVERRUN 0x0C |
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#define TD_BUFFERUNDERRUN 0x0D |
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/* 0x0E, 0x0F reserved for HCD */ |
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#define TD_NOTACCESSED 0x0F |
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/* map PTD status codes (CC) to errno values */ |
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static const int cc_to_error[16] = { |
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/* No Error */ 0, |
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/* CRC Error */ -EILSEQ, |
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/* Bit Stuff */ -EPROTO, |
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/* Data Togg */ -EILSEQ, |
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/* Stall */ -EPIPE, |
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/* DevNotResp */ -ETIME, |
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/* PIDCheck */ -EPROTO, |
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/* UnExpPID */ -EPROTO, |
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/* DataOver */ -EOVERFLOW, |
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/* DataUnder */ -EREMOTEIO, |
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/* (for hw) */ -EIO, |
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/* (for hw) */ -EIO, |
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/* BufferOver */ -ECOMM, |
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/* BuffUnder */ -ENOSR, |
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/* (for HCD) */ -EALREADY, |
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/* (for HCD) */ -EALREADY |
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}; |
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/*--------------------------------------------------------------*/ |
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#define LOG2_PERIODIC_SIZE 5 /* arbitrary; this matches OHCI */ |
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#define PERIODIC_SIZE (1 << LOG2_PERIODIC_SIZE) |
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struct isp116x { |
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spinlock_t lock; |
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void __iomem *addr_reg; |
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void __iomem *data_reg; |
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struct isp116x_platform_data *board; |
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struct dentry *dentry; |
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unsigned long stat1, stat2, stat4, stat8, stat16; |
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/* HC registers */ |
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u32 intenb; /* "OHCI" interrupts */ |
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u16 irqenb; /* uP interrupts */ |
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/* Root hub registers */ |
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u32 rhdesca; |
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u32 rhdescb; |
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u32 rhstatus; |
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/* async schedule: control, bulk */ |
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struct list_head async; |
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/* periodic schedule: int */ |
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u16 load[PERIODIC_SIZE]; |
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struct isp116x_ep *periodic[PERIODIC_SIZE]; |
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unsigned periodic_count; |
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u16 fmindex; |
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/* Schedule for the current frame */ |
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struct isp116x_ep *atl_active; |
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int atl_buflen; |
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int atl_bufshrt; |
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int atl_last_dir; |
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atomic_t atl_finishing; |
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}; |
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static inline struct isp116x *hcd_to_isp116x(struct usb_hcd *hcd) |
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{ |
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return (struct isp116x *)(hcd->hcd_priv); |
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} |
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static inline struct usb_hcd *isp116x_to_hcd(struct isp116x *isp116x) |
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{ |
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return container_of((void *)isp116x, struct usb_hcd, hcd_priv); |
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} |
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struct isp116x_ep { |
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struct usb_host_endpoint *hep; |
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struct usb_device *udev; |
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struct ptd ptd; |
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u8 maxpacket; |
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u8 epnum; |
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u8 nextpid; |
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u16 error_count; |
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u16 length; /* of current packet */ |
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unsigned char *data; /* to databuf */ |
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/* queue of active EP's (the ones scheduled for the |
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current frame) */ |
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struct isp116x_ep *active; |
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/* periodic schedule */ |
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u16 period; |
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u16 branch; |
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u16 load; |
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struct isp116x_ep *next; |
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/* async schedule */ |
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struct list_head schedule; |
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}; |
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/*-------------------------------------------------------------------------*/ |
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#define DBG(stuff...) pr_debug("116x: " stuff) |
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#ifdef VERBOSE |
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# define VDBG DBG |
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#else |
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# define VDBG(stuff...) do{}while(0) |
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#endif |
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#define ERR(stuff...) printk(KERN_ERR "116x: " stuff) |
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#define WARNING(stuff...) printk(KERN_WARNING "116x: " stuff) |
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#define INFO(stuff...) printk(KERN_INFO "116x: " stuff) |
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/* ------------------------------------------------- */ |
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#if defined(USE_PLATFORM_DELAY) |
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#if defined(USE_NDELAY) |
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#error USE_PLATFORM_DELAY and USE_NDELAY simultaneously defined. |
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#endif |
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#define isp116x_delay(h,d) (h)->board->delay( \ |
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isp116x_to_hcd(h)->self.controller,d) |
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#define isp116x_check_platform_delay(h) ((h)->board->delay == NULL) |
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#elif defined(USE_NDELAY) |
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#define isp116x_delay(h,d) ndelay(d) |
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#define isp116x_check_platform_delay(h) 0 |
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#else |
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#define isp116x_delay(h,d) do{}while(0) |
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#define isp116x_check_platform_delay(h) 0 |
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#endif |
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static inline void isp116x_write_addr(struct isp116x *isp116x, unsigned reg) |
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{ |
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writew(reg & 0xff, isp116x->addr_reg); |
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isp116x_delay(isp116x, 300); |
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} |
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static inline void isp116x_write_data16(struct isp116x *isp116x, u16 val) |
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{ |
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writew(val, isp116x->data_reg); |
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isp116x_delay(isp116x, 150); |
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} |
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static inline void isp116x_raw_write_data16(struct isp116x *isp116x, u16 val) |
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{ |
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__raw_writew(val, isp116x->data_reg); |
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isp116x_delay(isp116x, 150); |
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} |
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static inline u16 isp116x_read_data16(struct isp116x *isp116x) |
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{ |
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u16 val; |
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val = readw(isp116x->data_reg); |
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isp116x_delay(isp116x, 150); |
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return val; |
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} |
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static inline u16 isp116x_raw_read_data16(struct isp116x *isp116x) |
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{ |
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u16 val; |
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val = __raw_readw(isp116x->data_reg); |
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isp116x_delay(isp116x, 150); |
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return val; |
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} |
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static inline void isp116x_write_data32(struct isp116x *isp116x, u32 val) |
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{ |
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writew(val & 0xffff, isp116x->data_reg); |
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isp116x_delay(isp116x, 150); |
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writew(val >> 16, isp116x->data_reg); |
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isp116x_delay(isp116x, 150); |
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} |
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static inline u32 isp116x_read_data32(struct isp116x *isp116x) |
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{ |
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u32 val; |
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val = (u32) readw(isp116x->data_reg); |
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isp116x_delay(isp116x, 150); |
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val |= ((u32) readw(isp116x->data_reg)) << 16; |
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isp116x_delay(isp116x, 150); |
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return val; |
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} |
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/* Let's keep register access functions out of line. Hint: |
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we wait at least 150 ns at every access. |
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*/ |
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static u16 isp116x_read_reg16(struct isp116x *isp116x, unsigned reg) |
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{ |
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isp116x_write_addr(isp116x, reg); |
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return isp116x_read_data16(isp116x); |
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} |
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static u32 isp116x_read_reg32(struct isp116x *isp116x, unsigned reg) |
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{ |
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isp116x_write_addr(isp116x, reg); |
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return isp116x_read_data32(isp116x); |
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} |
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static void isp116x_write_reg16(struct isp116x *isp116x, unsigned reg, |
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unsigned val) |
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{ |
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isp116x_write_addr(isp116x, reg | ISP116x_WRITE_OFFSET); |
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isp116x_write_data16(isp116x, (u16) (val & 0xffff)); |
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} |
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static void isp116x_write_reg32(struct isp116x *isp116x, unsigned reg, |
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unsigned val) |
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{ |
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isp116x_write_addr(isp116x, reg | ISP116x_WRITE_OFFSET); |
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isp116x_write_data32(isp116x, (u32) val); |
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} |
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#define isp116x_show_reg_log(d,r,s) { \ |
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if ((r) < 0x20) { \ |
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DBG("%-12s[%02x]: %08x\n", #r, \ |
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r, isp116x_read_reg32(d, r)); \ |
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} else { \ |
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DBG("%-12s[%02x]: %04x\n", #r, \ |
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r, isp116x_read_reg16(d, r)); \ |
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} \ |
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} |
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#define isp116x_show_reg_seq(d,r,s) { \ |
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if ((r) < 0x20) { \ |
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seq_printf(s, "%-12s[%02x]: %08x\n", #r, \ |
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r, isp116x_read_reg32(d, r)); \ |
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} else { \ |
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seq_printf(s, "%-12s[%02x]: %04x\n", #r, \ |
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r, isp116x_read_reg16(d, r)); \ |
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} \ |
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} |
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#define isp116x_show_regs(d,type,s) { \ |
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isp116x_show_reg_##type(d, HCREVISION, s); \ |
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isp116x_show_reg_##type(d, HCCONTROL, s); \ |
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isp116x_show_reg_##type(d, HCCMDSTAT, s); \ |
|
isp116x_show_reg_##type(d, HCINTSTAT, s); \ |
|
isp116x_show_reg_##type(d, HCINTENB, s); \ |
|
isp116x_show_reg_##type(d, HCFMINTVL, s); \ |
|
isp116x_show_reg_##type(d, HCFMREM, s); \ |
|
isp116x_show_reg_##type(d, HCFMNUM, s); \ |
|
isp116x_show_reg_##type(d, HCLSTHRESH, s); \ |
|
isp116x_show_reg_##type(d, HCRHDESCA, s); \ |
|
isp116x_show_reg_##type(d, HCRHDESCB, s); \ |
|
isp116x_show_reg_##type(d, HCRHSTATUS, s); \ |
|
isp116x_show_reg_##type(d, HCRHPORT1, s); \ |
|
isp116x_show_reg_##type(d, HCRHPORT2, s); \ |
|
isp116x_show_reg_##type(d, HCHWCFG, s); \ |
|
isp116x_show_reg_##type(d, HCDMACFG, s); \ |
|
isp116x_show_reg_##type(d, HCXFERCTR, s); \ |
|
isp116x_show_reg_##type(d, HCuPINT, s); \ |
|
isp116x_show_reg_##type(d, HCuPINTENB, s); \ |
|
isp116x_show_reg_##type(d, HCCHIPID, s); \ |
|
isp116x_show_reg_##type(d, HCSCRATCH, s); \ |
|
isp116x_show_reg_##type(d, HCITLBUFLEN, s); \ |
|
isp116x_show_reg_##type(d, HCATLBUFLEN, s); \ |
|
isp116x_show_reg_##type(d, HCBUFSTAT, s); \ |
|
isp116x_show_reg_##type(d, HCRDITL0LEN, s); \ |
|
isp116x_show_reg_##type(d, HCRDITL1LEN, s); \ |
|
} |
|
|
|
/* |
|
Dump registers for debugfs. |
|
*/ |
|
static inline void isp116x_show_regs_seq(struct isp116x *isp116x, |
|
struct seq_file *s) |
|
{ |
|
isp116x_show_regs(isp116x, seq, s); |
|
} |
|
|
|
/* |
|
Dump registers to syslog. |
|
*/ |
|
static inline void isp116x_show_regs_log(struct isp116x *isp116x) |
|
{ |
|
isp116x_show_regs(isp116x, log, NULL); |
|
} |
|
|
|
#if defined(URB_TRACE) |
|
|
|
#define PIPETYPE(pipe) ({ char *__s; \ |
|
if (usb_pipecontrol(pipe)) __s = "ctrl"; \ |
|
else if (usb_pipeint(pipe)) __s = "int"; \ |
|
else if (usb_pipebulk(pipe)) __s = "bulk"; \ |
|
else __s = "iso"; \ |
|
__s;}) |
|
#define PIPEDIR(pipe) ({ usb_pipein(pipe) ? "in" : "out"; }) |
|
#define URB_NOTSHORT(urb) ({ (urb)->transfer_flags & URB_SHORT_NOT_OK ? \ |
|
"short_not_ok" : ""; }) |
|
|
|
/* print debug info about the URB */ |
|
static void urb_dbg(struct urb *urb, char *msg) |
|
{ |
|
unsigned int pipe; |
|
|
|
if (!urb) { |
|
DBG("%s: zero urb\n", msg); |
|
return; |
|
} |
|
pipe = urb->pipe; |
|
DBG("%s: FA %d ep%d%s %s: len %d/%d %s\n", msg, |
|
usb_pipedevice(pipe), usb_pipeendpoint(pipe), |
|
PIPEDIR(pipe), PIPETYPE(pipe), |
|
urb->transfer_buffer_length, urb->actual_length, URB_NOTSHORT(urb)); |
|
} |
|
|
|
#else |
|
|
|
#define urb_dbg(urb,msg) do{}while(0) |
|
|
|
#endif /* ! defined(URB_TRACE) */ |
|
|
|
#if defined(PTD_TRACE) |
|
|
|
#define PTD_DIR_STR(ptd) ({char __c; \ |
|
switch(PTD_GET_DIR(ptd)){ \ |
|
case 0: __c = 's'; break; \ |
|
case 1: __c = 'o'; break; \ |
|
default: __c = 'i'; break; \ |
|
}; __c;}) |
|
|
|
/* |
|
Dump PTD info. The code documents the format |
|
perfectly, right :) |
|
*/ |
|
static inline void dump_ptd(struct ptd *ptd) |
|
{ |
|
printk(KERN_WARNING "td: %x %d%c%d %d,%d,%d %x %x%x%x\n", |
|
PTD_GET_CC(ptd), PTD_GET_FA(ptd), |
|
PTD_DIR_STR(ptd), PTD_GET_EP(ptd), |
|
PTD_GET_COUNT(ptd), PTD_GET_LEN(ptd), PTD_GET_MPS(ptd), |
|
PTD_GET_TOGGLE(ptd), PTD_GET_ACTIVE(ptd), |
|
PTD_GET_SPD(ptd), PTD_GET_LAST(ptd)); |
|
} |
|
|
|
static inline void dump_ptd_out_data(struct ptd *ptd, u8 * buf) |
|
{ |
|
int k; |
|
|
|
if (PTD_GET_DIR(ptd) != PTD_DIR_IN && PTD_GET_LEN(ptd)) { |
|
printk(KERN_WARNING "-> "); |
|
for (k = 0; k < PTD_GET_LEN(ptd); ++k) |
|
printk("%02x ", ((u8 *) buf)[k]); |
|
printk("\n"); |
|
} |
|
} |
|
|
|
static inline void dump_ptd_in_data(struct ptd *ptd, u8 * buf) |
|
{ |
|
int k; |
|
|
|
if (PTD_GET_DIR(ptd) == PTD_DIR_IN && PTD_GET_COUNT(ptd)) { |
|
printk(KERN_WARNING "<- "); |
|
for (k = 0; k < PTD_GET_COUNT(ptd); ++k) |
|
printk("%02x ", ((u8 *) buf)[k]); |
|
printk("\n"); |
|
} |
|
if (PTD_GET_LAST(ptd)) |
|
printk(KERN_WARNING "-\n"); |
|
} |
|
|
|
#else |
|
|
|
#define dump_ptd(ptd) do{}while(0) |
|
#define dump_ptd_in_data(ptd,buf) do{}while(0) |
|
#define dump_ptd_out_data(ptd,buf) do{}while(0) |
|
|
|
#endif /* ! defined(PTD_TRACE) */
|
|
|