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377 lines
9.3 KiB
377 lines
9.3 KiB
// SPDX-License-Identifier: GPL-2.0 |
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/** |
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* uniphier_thermal.c - Socionext UniPhier thermal driver |
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* Copyright 2014 Panasonic Corporation |
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* Copyright 2016-2017 Socionext Inc. |
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* Author: |
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* Kunihiko Hayashi <[email protected]> |
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*/ |
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#include <linux/bitops.h> |
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#include <linux/interrupt.h> |
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#include <linux/mfd/syscon.h> |
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#include <linux/module.h> |
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#include <linux/of.h> |
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#include <linux/of_device.h> |
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#include <linux/platform_device.h> |
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#include <linux/regmap.h> |
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#include <linux/thermal.h> |
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#include "thermal_core.h" |
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/* |
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* block registers |
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* addresses are the offset from .block_base |
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*/ |
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#define PVTCTLEN 0x0000 |
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#define PVTCTLEN_EN BIT(0) |
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#define PVTCTLMODE 0x0004 |
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#define PVTCTLMODE_MASK 0xf |
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#define PVTCTLMODE_TEMPMON 0x5 |
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#define EMONREPEAT 0x0040 |
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#define EMONREPEAT_ENDLESS BIT(24) |
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#define EMONREPEAT_PERIOD GENMASK(3, 0) |
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#define EMONREPEAT_PERIOD_1000000 0x9 |
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/* |
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* common registers |
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* addresses are the offset from .map_base |
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*/ |
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#define PVTCTLSEL 0x0900 |
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#define PVTCTLSEL_MASK GENMASK(2, 0) |
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#define PVTCTLSEL_MONITOR 0 |
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#define SETALERT0 0x0910 |
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#define SETALERT1 0x0914 |
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#define SETALERT2 0x0918 |
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#define SETALERT_TEMP_OVF (GENMASK(7, 0) << 16) |
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#define SETALERT_TEMP_OVF_VALUE(val) (((val) & GENMASK(7, 0)) << 16) |
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#define SETALERT_EN BIT(0) |
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#define PMALERTINTCTL 0x0920 |
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#define PMALERTINTCTL_CLR(ch) BIT(4 * (ch) + 2) |
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#define PMALERTINTCTL_SET(ch) BIT(4 * (ch) + 1) |
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#define PMALERTINTCTL_EN(ch) BIT(4 * (ch) + 0) |
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#define PMALERTINTCTL_MASK (GENMASK(10, 8) | GENMASK(6, 4) | \ |
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GENMASK(2, 0)) |
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#define TMOD 0x0928 |
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#define TMOD_WIDTH 9 |
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#define TMODCOEF 0x0e5c |
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#define TMODSETUP0_EN BIT(30) |
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#define TMODSETUP0_VAL(val) (((val) & GENMASK(13, 0)) << 16) |
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#define TMODSETUP1_EN BIT(15) |
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#define TMODSETUP1_VAL(val) ((val) & GENMASK(14, 0)) |
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/* SoC critical temperature */ |
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#define CRITICAL_TEMP_LIMIT (120 * 1000) |
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/* Max # of alert channels */ |
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#define ALERT_CH_NUM 3 |
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/* SoC specific thermal sensor data */ |
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struct uniphier_tm_soc_data { |
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u32 map_base; |
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u32 block_base; |
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u32 tmod_setup_addr; |
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}; |
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struct uniphier_tm_dev { |
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struct regmap *regmap; |
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struct device *dev; |
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bool alert_en[ALERT_CH_NUM]; |
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struct thermal_zone_device *tz_dev; |
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const struct uniphier_tm_soc_data *data; |
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}; |
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static int uniphier_tm_initialize_sensor(struct uniphier_tm_dev *tdev) |
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{ |
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struct regmap *map = tdev->regmap; |
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u32 val; |
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u32 tmod_calib[2]; |
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int ret; |
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/* stop PVT */ |
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regmap_write_bits(map, tdev->data->block_base + PVTCTLEN, |
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PVTCTLEN_EN, 0); |
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/* |
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* Since SoC has a calibrated value that was set in advance, |
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* TMODCOEF shows non-zero and PVT refers the value internally. |
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* |
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* If TMODCOEF shows zero, the boards don't have the calibrated |
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* value, and the driver has to set default value from DT. |
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*/ |
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ret = regmap_read(map, tdev->data->map_base + TMODCOEF, &val); |
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if (ret) |
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return ret; |
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if (!val) { |
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/* look for the default values in DT */ |
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ret = of_property_read_u32_array(tdev->dev->of_node, |
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"socionext,tmod-calibration", |
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tmod_calib, |
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ARRAY_SIZE(tmod_calib)); |
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if (ret) |
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return ret; |
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regmap_write(map, tdev->data->tmod_setup_addr, |
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TMODSETUP0_EN | TMODSETUP0_VAL(tmod_calib[0]) | |
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TMODSETUP1_EN | TMODSETUP1_VAL(tmod_calib[1])); |
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} |
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/* select temperature mode */ |
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regmap_write_bits(map, tdev->data->block_base + PVTCTLMODE, |
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PVTCTLMODE_MASK, PVTCTLMODE_TEMPMON); |
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/* set monitoring period */ |
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regmap_write_bits(map, tdev->data->block_base + EMONREPEAT, |
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EMONREPEAT_ENDLESS | EMONREPEAT_PERIOD, |
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EMONREPEAT_ENDLESS | EMONREPEAT_PERIOD_1000000); |
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/* set monitor mode */ |
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regmap_write_bits(map, tdev->data->map_base + PVTCTLSEL, |
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PVTCTLSEL_MASK, PVTCTLSEL_MONITOR); |
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return 0; |
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} |
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static void uniphier_tm_set_alert(struct uniphier_tm_dev *tdev, u32 ch, |
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u32 temp) |
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{ |
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struct regmap *map = tdev->regmap; |
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/* set alert temperature */ |
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regmap_write_bits(map, tdev->data->map_base + SETALERT0 + (ch << 2), |
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SETALERT_EN | SETALERT_TEMP_OVF, |
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SETALERT_EN | |
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SETALERT_TEMP_OVF_VALUE(temp / 1000)); |
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} |
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static void uniphier_tm_enable_sensor(struct uniphier_tm_dev *tdev) |
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{ |
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struct regmap *map = tdev->regmap; |
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int i; |
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u32 bits = 0; |
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for (i = 0; i < ALERT_CH_NUM; i++) |
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if (tdev->alert_en[i]) |
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bits |= PMALERTINTCTL_EN(i); |
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/* enable alert interrupt */ |
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regmap_write_bits(map, tdev->data->map_base + PMALERTINTCTL, |
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PMALERTINTCTL_MASK, bits); |
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/* start PVT */ |
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regmap_write_bits(map, tdev->data->block_base + PVTCTLEN, |
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PVTCTLEN_EN, PVTCTLEN_EN); |
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usleep_range(700, 1500); /* The spec note says at least 700us */ |
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} |
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static void uniphier_tm_disable_sensor(struct uniphier_tm_dev *tdev) |
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{ |
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struct regmap *map = tdev->regmap; |
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/* disable alert interrupt */ |
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regmap_write_bits(map, tdev->data->map_base + PMALERTINTCTL, |
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PMALERTINTCTL_MASK, 0); |
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/* stop PVT */ |
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regmap_write_bits(map, tdev->data->block_base + PVTCTLEN, |
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PVTCTLEN_EN, 0); |
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usleep_range(1000, 2000); /* The spec note says at least 1ms */ |
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} |
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static int uniphier_tm_get_temp(void *data, int *out_temp) |
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{ |
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struct uniphier_tm_dev *tdev = data; |
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struct regmap *map = tdev->regmap; |
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int ret; |
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u32 temp; |
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ret = regmap_read(map, tdev->data->map_base + TMOD, &temp); |
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if (ret) |
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return ret; |
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/* MSB of the TMOD field is a sign bit */ |
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*out_temp = sign_extend32(temp, TMOD_WIDTH - 1) * 1000; |
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return 0; |
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} |
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static const struct thermal_zone_of_device_ops uniphier_of_thermal_ops = { |
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.get_temp = uniphier_tm_get_temp, |
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}; |
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static void uniphier_tm_irq_clear(struct uniphier_tm_dev *tdev) |
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{ |
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u32 mask = 0, bits = 0; |
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int i; |
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for (i = 0; i < ALERT_CH_NUM; i++) { |
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mask |= (PMALERTINTCTL_CLR(i) | PMALERTINTCTL_SET(i)); |
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bits |= PMALERTINTCTL_CLR(i); |
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} |
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/* clear alert interrupt */ |
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regmap_write_bits(tdev->regmap, |
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tdev->data->map_base + PMALERTINTCTL, mask, bits); |
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} |
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static irqreturn_t uniphier_tm_alarm_irq(int irq, void *_tdev) |
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{ |
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struct uniphier_tm_dev *tdev = _tdev; |
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disable_irq_nosync(irq); |
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uniphier_tm_irq_clear(tdev); |
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return IRQ_WAKE_THREAD; |
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} |
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static irqreturn_t uniphier_tm_alarm_irq_thread(int irq, void *_tdev) |
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{ |
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struct uniphier_tm_dev *tdev = _tdev; |
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thermal_zone_device_update(tdev->tz_dev, THERMAL_EVENT_UNSPECIFIED); |
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return IRQ_HANDLED; |
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} |
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static int uniphier_tm_probe(struct platform_device *pdev) |
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{ |
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struct device *dev = &pdev->dev; |
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struct regmap *regmap; |
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struct device_node *parent; |
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struct uniphier_tm_dev *tdev; |
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const struct thermal_trip *trips; |
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int i, ret, irq, ntrips, crit_temp = INT_MAX; |
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tdev = devm_kzalloc(dev, sizeof(*tdev), GFP_KERNEL); |
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if (!tdev) |
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return -ENOMEM; |
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tdev->dev = dev; |
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tdev->data = of_device_get_match_data(dev); |
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if (WARN_ON(!tdev->data)) |
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return -EINVAL; |
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irq = platform_get_irq(pdev, 0); |
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if (irq < 0) |
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return irq; |
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/* get regmap from syscon node */ |
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parent = of_get_parent(dev->of_node); /* parent should be syscon node */ |
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regmap = syscon_node_to_regmap(parent); |
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of_node_put(parent); |
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if (IS_ERR(regmap)) { |
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dev_err(dev, "failed to get regmap (error %ld)\n", |
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PTR_ERR(regmap)); |
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return PTR_ERR(regmap); |
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} |
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tdev->regmap = regmap; |
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ret = uniphier_tm_initialize_sensor(tdev); |
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if (ret) { |
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dev_err(dev, "failed to initialize sensor\n"); |
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return ret; |
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} |
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ret = devm_request_threaded_irq(dev, irq, uniphier_tm_alarm_irq, |
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uniphier_tm_alarm_irq_thread, |
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0, "thermal", tdev); |
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if (ret) |
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return ret; |
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platform_set_drvdata(pdev, tdev); |
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tdev->tz_dev = devm_thermal_zone_of_sensor_register(dev, 0, tdev, |
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&uniphier_of_thermal_ops); |
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if (IS_ERR(tdev->tz_dev)) { |
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dev_err(dev, "failed to register sensor device\n"); |
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return PTR_ERR(tdev->tz_dev); |
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} |
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/* get trip points */ |
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trips = of_thermal_get_trip_points(tdev->tz_dev); |
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ntrips = of_thermal_get_ntrips(tdev->tz_dev); |
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if (ntrips > ALERT_CH_NUM) { |
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dev_err(dev, "thermal zone has too many trips\n"); |
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return -E2BIG; |
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} |
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/* set alert temperatures */ |
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for (i = 0; i < ntrips; i++) { |
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if (trips[i].type == THERMAL_TRIP_CRITICAL && |
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trips[i].temperature < crit_temp) |
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crit_temp = trips[i].temperature; |
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uniphier_tm_set_alert(tdev, i, trips[i].temperature); |
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tdev->alert_en[i] = true; |
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} |
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if (crit_temp > CRITICAL_TEMP_LIMIT) { |
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dev_err(dev, "critical trip is over limit(>%d), or not set\n", |
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CRITICAL_TEMP_LIMIT); |
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return -EINVAL; |
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} |
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uniphier_tm_enable_sensor(tdev); |
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return 0; |
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} |
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static int uniphier_tm_remove(struct platform_device *pdev) |
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{ |
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struct uniphier_tm_dev *tdev = platform_get_drvdata(pdev); |
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/* disable sensor */ |
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uniphier_tm_disable_sensor(tdev); |
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return 0; |
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} |
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static const struct uniphier_tm_soc_data uniphier_pxs2_tm_data = { |
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.map_base = 0xe000, |
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.block_base = 0xe000, |
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.tmod_setup_addr = 0xe904, |
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}; |
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static const struct uniphier_tm_soc_data uniphier_ld20_tm_data = { |
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.map_base = 0xe000, |
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.block_base = 0xe800, |
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.tmod_setup_addr = 0xe938, |
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}; |
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static const struct of_device_id uniphier_tm_dt_ids[] = { |
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{ |
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.compatible = "socionext,uniphier-pxs2-thermal", |
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.data = &uniphier_pxs2_tm_data, |
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}, |
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{ |
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.compatible = "socionext,uniphier-ld20-thermal", |
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.data = &uniphier_ld20_tm_data, |
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}, |
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{ |
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.compatible = "socionext,uniphier-pxs3-thermal", |
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.data = &uniphier_ld20_tm_data, |
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}, |
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{ /* sentinel */ } |
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}; |
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MODULE_DEVICE_TABLE(of, uniphier_tm_dt_ids); |
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static struct platform_driver uniphier_tm_driver = { |
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.probe = uniphier_tm_probe, |
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.remove = uniphier_tm_remove, |
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.driver = { |
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.name = "uniphier-thermal", |
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.of_match_table = uniphier_tm_dt_ids, |
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}, |
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}; |
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module_platform_driver(uniphier_tm_driver); |
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MODULE_AUTHOR("Kunihiko Hayashi <[email protected]>"); |
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MODULE_DESCRIPTION("UniPhier thermal driver"); |
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MODULE_LICENSE("GPL v2");
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