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579 lines
22 KiB
579 lines
22 KiB
/* |
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* Allwinner V3/V3s SoCs pinctrl driver. |
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* |
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* Copyright (C) 2016 Icenowy Zheng <[email protected]> |
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* |
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* Based on pinctrl-sun8i-h3.c, which is: |
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* Copyright (C) 2015 Jens Kuske <[email protected]> |
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* |
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* Based on pinctrl-sun8i-a23.c, which is: |
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* Copyright (C) 2014 Chen-Yu Tsai <[email protected]> |
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* Copyright (C) 2014 Maxime Ripard <[email protected]> |
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* |
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* This file is licensed under the terms of the GNU General Public |
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* License version 2. This program is licensed "as is" without any |
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* warranty of any kind, whether express or implied. |
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*/ |
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#include <linux/module.h> |
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#include <linux/platform_device.h> |
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#include <linux/of.h> |
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#include <linux/of_device.h> |
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#include <linux/pinctrl/pinctrl.h> |
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#include "pinctrl-sunxi.h" |
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static const struct sunxi_desc_pin sun8i_v3s_pins[] = { |
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/* Hole */ |
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SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 0), |
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SUNXI_FUNCTION(0x0, "gpio_in"), |
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SUNXI_FUNCTION(0x1, "gpio_out"), |
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SUNXI_FUNCTION(0x2, "uart2"), /* TX */ |
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SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 0)), /* PB_EINT0 */ |
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SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 1), |
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SUNXI_FUNCTION(0x0, "gpio_in"), |
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SUNXI_FUNCTION(0x1, "gpio_out"), |
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SUNXI_FUNCTION(0x2, "uart2"), /* RX */ |
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SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 1)), /* PB_EINT1 */ |
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SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 2), |
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SUNXI_FUNCTION(0x0, "gpio_in"), |
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SUNXI_FUNCTION(0x1, "gpio_out"), |
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SUNXI_FUNCTION(0x2, "uart2"), /* RTS */ |
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SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 2)), /* PB_EINT2 */ |
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SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 3), |
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SUNXI_FUNCTION(0x0, "gpio_in"), |
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SUNXI_FUNCTION(0x1, "gpio_out"), |
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SUNXI_FUNCTION(0x2, "uart2"), /* D1 */ |
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SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 3)), /* PB_EINT3 */ |
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SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 4), |
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SUNXI_FUNCTION(0x0, "gpio_in"), |
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SUNXI_FUNCTION(0x1, "gpio_out"), |
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SUNXI_FUNCTION(0x2, "pwm0"), |
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SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 4)), /* PB_EINT4 */ |
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SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 5), |
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SUNXI_FUNCTION(0x0, "gpio_in"), |
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SUNXI_FUNCTION(0x1, "gpio_out"), |
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SUNXI_FUNCTION(0x2, "pwm1"), |
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SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 5)), /* PB_EINT5 */ |
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SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 6), |
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SUNXI_FUNCTION(0x0, "gpio_in"), |
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SUNXI_FUNCTION(0x1, "gpio_out"), |
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SUNXI_FUNCTION(0x2, "i2c0"), /* SCK */ |
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SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 6)), /* PB_EINT6 */ |
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SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 7), |
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SUNXI_FUNCTION(0x0, "gpio_in"), |
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SUNXI_FUNCTION(0x1, "gpio_out"), |
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SUNXI_FUNCTION(0x2, "i2c0"), /* SDA */ |
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SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 7)), /* PB_EINT7 */ |
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SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 8), |
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SUNXI_FUNCTION(0x0, "gpio_in"), |
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SUNXI_FUNCTION(0x1, "gpio_out"), |
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SUNXI_FUNCTION(0x2, "i2c1"), /* SDA */ |
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SUNXI_FUNCTION(0x3, "uart0"), /* TX */ |
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SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 8)), /* PB_EINT8 */ |
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SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 9), |
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SUNXI_FUNCTION(0x0, "gpio_in"), |
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SUNXI_FUNCTION(0x1, "gpio_out"), |
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SUNXI_FUNCTION(0x2, "i2c1"), /* SCK */ |
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SUNXI_FUNCTION(0x3, "uart0"), /* RX */ |
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SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 9)), /* PB_EINT9 */ |
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SUNXI_PIN_VARIANT(SUNXI_PINCTRL_PIN(B, 10), |
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PINCTRL_SUN8I_V3, |
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SUNXI_FUNCTION(0x0, "gpio_in"), |
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SUNXI_FUNCTION(0x1, "gpio_out"), |
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SUNXI_FUNCTION(0x2, "jtag"), /* MS */ |
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SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 10)), /* PB_EINT10 */ |
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SUNXI_PIN_VARIANT(SUNXI_PINCTRL_PIN(B, 11), |
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PINCTRL_SUN8I_V3, |
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SUNXI_FUNCTION(0x0, "gpio_in"), |
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SUNXI_FUNCTION(0x1, "gpio_out"), |
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SUNXI_FUNCTION(0x2, "jtag"), /* CK */ |
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SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 11)), /* PB_EINT11 */ |
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SUNXI_PIN_VARIANT(SUNXI_PINCTRL_PIN(B, 12), |
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PINCTRL_SUN8I_V3, |
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SUNXI_FUNCTION(0x0, "gpio_in"), |
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SUNXI_FUNCTION(0x1, "gpio_out"), |
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SUNXI_FUNCTION(0x2, "jtag"), /* DO */ |
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SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 12)), /* PB_EINT12 */ |
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SUNXI_PIN_VARIANT(SUNXI_PINCTRL_PIN(B, 13), |
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PINCTRL_SUN8I_V3, |
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SUNXI_FUNCTION(0x0, "gpio_in"), |
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SUNXI_FUNCTION(0x1, "gpio_out"), |
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SUNXI_FUNCTION(0x2, "jtag"), /* DI */ |
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SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 13)), /* PB_EINT13 */ |
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/* Hole */ |
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SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 0), |
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SUNXI_FUNCTION(0x0, "gpio_in"), |
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SUNXI_FUNCTION(0x1, "gpio_out"), |
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SUNXI_FUNCTION(0x2, "mmc2"), /* CLK */ |
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SUNXI_FUNCTION(0x3, "spi0")), /* MISO */ |
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SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 1), |
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SUNXI_FUNCTION(0x0, "gpio_in"), |
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SUNXI_FUNCTION(0x1, "gpio_out"), |
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SUNXI_FUNCTION(0x2, "mmc2"), /* CMD */ |
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SUNXI_FUNCTION(0x3, "spi0")), /* CLK */ |
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SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 2), |
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SUNXI_FUNCTION(0x0, "gpio_in"), |
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SUNXI_FUNCTION(0x1, "gpio_out"), |
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SUNXI_FUNCTION(0x2, "mmc2"), /* RST */ |
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SUNXI_FUNCTION(0x3, "spi0")), /* CS */ |
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SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 3), |
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SUNXI_FUNCTION(0x0, "gpio_in"), |
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SUNXI_FUNCTION(0x1, "gpio_out"), |
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SUNXI_FUNCTION(0x2, "mmc2"), /* D0 */ |
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SUNXI_FUNCTION(0x3, "spi0")), /* MOSI */ |
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SUNXI_PIN_VARIANT(SUNXI_PINCTRL_PIN(C, 4), |
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PINCTRL_SUN8I_V3, |
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SUNXI_FUNCTION(0x0, "gpio_in"), |
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SUNXI_FUNCTION(0x1, "gpio_out"), |
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SUNXI_FUNCTION(0x2, "mmc2")), /* D1 */ |
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SUNXI_PIN_VARIANT(SUNXI_PINCTRL_PIN(C, 5), |
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PINCTRL_SUN8I_V3, |
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SUNXI_FUNCTION(0x0, "gpio_in"), |
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SUNXI_FUNCTION(0x1, "gpio_out"), |
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SUNXI_FUNCTION(0x2, "mmc2")), /* D2 */ |
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SUNXI_PIN_VARIANT(SUNXI_PINCTRL_PIN(C, 6), |
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PINCTRL_SUN8I_V3, |
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SUNXI_FUNCTION(0x0, "gpio_in"), |
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SUNXI_FUNCTION(0x1, "gpio_out"), |
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SUNXI_FUNCTION(0x2, "mmc2")), /* D3 */ |
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SUNXI_PIN_VARIANT(SUNXI_PINCTRL_PIN(C, 7), |
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PINCTRL_SUN8I_V3, |
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SUNXI_FUNCTION(0x0, "gpio_in"), |
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SUNXI_FUNCTION(0x1, "gpio_out"), |
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SUNXI_FUNCTION(0x2, "mmc2")), /* D4 */ |
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SUNXI_PIN_VARIANT(SUNXI_PINCTRL_PIN(C, 8), |
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PINCTRL_SUN8I_V3, |
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SUNXI_FUNCTION(0x0, "gpio_in"), |
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SUNXI_FUNCTION(0x1, "gpio_out"), |
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SUNXI_FUNCTION(0x2, "mmc2")), /* D5 */ |
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SUNXI_PIN_VARIANT(SUNXI_PINCTRL_PIN(C, 9), |
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PINCTRL_SUN8I_V3, |
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SUNXI_FUNCTION(0x0, "gpio_in"), |
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SUNXI_FUNCTION(0x1, "gpio_out"), |
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SUNXI_FUNCTION(0x2, "mmc2")), /* D6 */ |
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SUNXI_PIN_VARIANT(SUNXI_PINCTRL_PIN(C, 10), |
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PINCTRL_SUN8I_V3, |
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SUNXI_FUNCTION(0x0, "gpio_in"), |
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SUNXI_FUNCTION(0x1, "gpio_out"), |
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SUNXI_FUNCTION(0x2, "mmc2")), /* D7 */ |
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/* Hole */ |
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SUNXI_PIN_VARIANT(SUNXI_PINCTRL_PIN(D, 0), |
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PINCTRL_SUN8I_V3, |
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SUNXI_FUNCTION(0x0, "gpio_in"), |
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SUNXI_FUNCTION(0x1, "gpio_out"), |
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SUNXI_FUNCTION(0x2, "lcd"), /* D2 */ |
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SUNXI_FUNCTION(0x4, "emac")), /* RXD3 */ |
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SUNXI_PIN_VARIANT(SUNXI_PINCTRL_PIN(D, 1), |
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PINCTRL_SUN8I_V3, |
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SUNXI_FUNCTION(0x0, "gpio_in"), |
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SUNXI_FUNCTION(0x1, "gpio_out"), |
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SUNXI_FUNCTION(0x2, "lcd"), /* D3 */ |
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SUNXI_FUNCTION(0x4, "emac")), /* RXD2 */ |
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SUNXI_PIN_VARIANT(SUNXI_PINCTRL_PIN(D, 2), |
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PINCTRL_SUN8I_V3, |
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SUNXI_FUNCTION(0x0, "gpio_in"), |
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SUNXI_FUNCTION(0x1, "gpio_out"), |
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SUNXI_FUNCTION(0x2, "lcd"), /* D4 */ |
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SUNXI_FUNCTION(0x4, "emac")), /* RXD1 */ |
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SUNXI_PIN_VARIANT(SUNXI_PINCTRL_PIN(D, 3), |
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PINCTRL_SUN8I_V3, |
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SUNXI_FUNCTION(0x0, "gpio_in"), |
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SUNXI_FUNCTION(0x1, "gpio_out"), |
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SUNXI_FUNCTION(0x2, "lcd"), /* D5 */ |
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SUNXI_FUNCTION(0x4, "emac")), /* RXD0 */ |
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SUNXI_PIN_VARIANT(SUNXI_PINCTRL_PIN(D, 4), |
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PINCTRL_SUN8I_V3, |
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SUNXI_FUNCTION(0x0, "gpio_in"), |
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SUNXI_FUNCTION(0x1, "gpio_out"), |
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SUNXI_FUNCTION(0x2, "lcd"), /* D6 */ |
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SUNXI_FUNCTION(0x4, "emac")), /* RXCK */ |
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SUNXI_PIN_VARIANT(SUNXI_PINCTRL_PIN(D, 5), |
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PINCTRL_SUN8I_V3, |
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SUNXI_FUNCTION(0x0, "gpio_in"), |
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SUNXI_FUNCTION(0x1, "gpio_out"), |
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SUNXI_FUNCTION(0x2, "lcd"), /* D7 */ |
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SUNXI_FUNCTION(0x4, "emac")), /* RXCTL/RXDV */ |
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SUNXI_PIN_VARIANT(SUNXI_PINCTRL_PIN(D, 6), |
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PINCTRL_SUN8I_V3, |
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SUNXI_FUNCTION(0x0, "gpio_in"), |
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SUNXI_FUNCTION(0x1, "gpio_out"), |
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SUNXI_FUNCTION(0x2, "lcd"), /* D10 */ |
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SUNXI_FUNCTION(0x4, "emac")), /* RXERR */ |
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SUNXI_PIN_VARIANT(SUNXI_PINCTRL_PIN(D, 7), |
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PINCTRL_SUN8I_V3, |
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SUNXI_FUNCTION(0x0, "gpio_in"), |
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SUNXI_FUNCTION(0x1, "gpio_out"), |
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SUNXI_FUNCTION(0x2, "lcd"), /* D11 */ |
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SUNXI_FUNCTION(0x4, "emac")), /* TXD3 */ |
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SUNXI_PIN_VARIANT(SUNXI_PINCTRL_PIN(D, 8), |
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PINCTRL_SUN8I_V3, |
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SUNXI_FUNCTION(0x0, "gpio_in"), |
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SUNXI_FUNCTION(0x1, "gpio_out"), |
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SUNXI_FUNCTION(0x2, "lcd"), /* D12 */ |
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SUNXI_FUNCTION(0x4, "emac")), /* TXD2 */ |
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SUNXI_PIN_VARIANT(SUNXI_PINCTRL_PIN(D, 9), |
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PINCTRL_SUN8I_V3, |
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SUNXI_FUNCTION(0x0, "gpio_in"), |
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SUNXI_FUNCTION(0x1, "gpio_out"), |
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SUNXI_FUNCTION(0x2, "lcd"), /* D13 */ |
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SUNXI_FUNCTION(0x4, "emac")), /* TXD1 */ |
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SUNXI_PIN_VARIANT(SUNXI_PINCTRL_PIN(D, 10), |
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PINCTRL_SUN8I_V3, |
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SUNXI_FUNCTION(0x0, "gpio_in"), |
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SUNXI_FUNCTION(0x1, "gpio_out"), |
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SUNXI_FUNCTION(0x2, "lcd"), /* D14 */ |
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SUNXI_FUNCTION(0x4, "emac")), /* TXD0 */ |
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SUNXI_PIN_VARIANT(SUNXI_PINCTRL_PIN(D, 11), |
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PINCTRL_SUN8I_V3, |
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SUNXI_FUNCTION(0x0, "gpio_in"), |
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SUNXI_FUNCTION(0x1, "gpio_out"), |
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SUNXI_FUNCTION(0x2, "lcd"), /* D15 */ |
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SUNXI_FUNCTION(0x4, "emac")), /* CRS */ |
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SUNXI_PIN_VARIANT(SUNXI_PINCTRL_PIN(D, 12), |
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PINCTRL_SUN8I_V3, |
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SUNXI_FUNCTION(0x0, "gpio_in"), |
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SUNXI_FUNCTION(0x1, "gpio_out"), |
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SUNXI_FUNCTION(0x2, "lcd"), /* D18 */ |
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SUNXI_FUNCTION(0x3, "lvds"), /* VP0 */ |
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SUNXI_FUNCTION(0x4, "emac")), /* TXCK */ |
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SUNXI_PIN_VARIANT(SUNXI_PINCTRL_PIN(D, 13), |
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PINCTRL_SUN8I_V3, |
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SUNXI_FUNCTION(0x0, "gpio_in"), |
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SUNXI_FUNCTION(0x1, "gpio_out"), |
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SUNXI_FUNCTION(0x2, "lcd"), /* D19 */ |
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SUNXI_FUNCTION(0x3, "lvds"), /* VN0 */ |
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SUNXI_FUNCTION(0x4, "emac")), /* TXCTL/TXEN */ |
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SUNXI_PIN_VARIANT(SUNXI_PINCTRL_PIN(D, 14), |
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PINCTRL_SUN8I_V3, |
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SUNXI_FUNCTION(0x0, "gpio_in"), |
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SUNXI_FUNCTION(0x1, "gpio_out"), |
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SUNXI_FUNCTION(0x2, "lcd"), /* D20 */ |
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SUNXI_FUNCTION(0x3, "lvds"), /* VP1 */ |
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SUNXI_FUNCTION(0x4, "emac")), /* TXERR */ |
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SUNXI_PIN_VARIANT(SUNXI_PINCTRL_PIN(D, 15), |
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PINCTRL_SUN8I_V3, |
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SUNXI_FUNCTION(0x0, "gpio_in"), |
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SUNXI_FUNCTION(0x1, "gpio_out"), |
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SUNXI_FUNCTION(0x2, "lcd"), /* D21 */ |
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SUNXI_FUNCTION(0x3, "lvds"), /* VN1 */ |
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SUNXI_FUNCTION(0x4, "emac")), /* CLKIN/COL */ |
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SUNXI_PIN_VARIANT(SUNXI_PINCTRL_PIN(D, 16), |
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PINCTRL_SUN8I_V3, |
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SUNXI_FUNCTION(0x0, "gpio_in"), |
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SUNXI_FUNCTION(0x1, "gpio_out"), |
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SUNXI_FUNCTION(0x2, "lcd"), /* D22 */ |
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SUNXI_FUNCTION(0x3, "lvds"), /* VP2 */ |
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SUNXI_FUNCTION(0x4, "emac")), /* MDC */ |
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SUNXI_PIN_VARIANT(SUNXI_PINCTRL_PIN(D, 17), |
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PINCTRL_SUN8I_V3, |
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SUNXI_FUNCTION(0x0, "gpio_in"), |
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SUNXI_FUNCTION(0x1, "gpio_out"), |
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SUNXI_FUNCTION(0x2, "lcd"), /* D23 */ |
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SUNXI_FUNCTION(0x3, "lvds"), /* VN2 */ |
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SUNXI_FUNCTION(0x4, "emac")), /* MDIO */ |
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SUNXI_PIN_VARIANT(SUNXI_PINCTRL_PIN(D, 18), |
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PINCTRL_SUN8I_V3, |
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SUNXI_FUNCTION(0x0, "gpio_in"), |
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SUNXI_FUNCTION(0x1, "gpio_out"), |
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SUNXI_FUNCTION(0x2, "lcd"), /* CLK */ |
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SUNXI_FUNCTION(0x3, "lvds")), /* VPC */ |
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SUNXI_PIN_VARIANT(SUNXI_PINCTRL_PIN(D, 19), |
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PINCTRL_SUN8I_V3, |
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SUNXI_FUNCTION(0x0, "gpio_in"), |
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SUNXI_FUNCTION(0x1, "gpio_out"), |
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SUNXI_FUNCTION(0x2, "lcd"), /* DE */ |
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SUNXI_FUNCTION(0x3, "lvds")), /* VNC */ |
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SUNXI_PIN_VARIANT(SUNXI_PINCTRL_PIN(D, 20), |
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PINCTRL_SUN8I_V3, |
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SUNXI_FUNCTION(0x0, "gpio_in"), |
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SUNXI_FUNCTION(0x1, "gpio_out"), |
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SUNXI_FUNCTION(0x2, "lcd"), /* HSYNC */ |
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SUNXI_FUNCTION(0x3, "lvds")), /* VP3 */ |
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SUNXI_PIN_VARIANT(SUNXI_PINCTRL_PIN(D, 21), |
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PINCTRL_SUN8I_V3, |
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SUNXI_FUNCTION(0x0, "gpio_in"), |
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SUNXI_FUNCTION(0x1, "gpio_out"), |
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SUNXI_FUNCTION(0x2, "lcd"), /* VSYNC */ |
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SUNXI_FUNCTION(0x3, "lvds")), /* VN3 */ |
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/* Hole */ |
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SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 0), |
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SUNXI_FUNCTION(0x0, "gpio_in"), |
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SUNXI_FUNCTION(0x1, "gpio_out"), |
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SUNXI_FUNCTION(0x2, "csi"), /* PCLK */ |
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SUNXI_FUNCTION(0x3, "lcd")), /* CLK */ |
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SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 1), |
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SUNXI_FUNCTION(0x0, "gpio_in"), |
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SUNXI_FUNCTION(0x1, "gpio_out"), |
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SUNXI_FUNCTION(0x2, "csi"), /* MCLK */ |
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SUNXI_FUNCTION(0x3, "lcd")), /* DE */ |
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SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 2), |
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SUNXI_FUNCTION(0x0, "gpio_in"), |
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SUNXI_FUNCTION(0x1, "gpio_out"), |
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SUNXI_FUNCTION(0x2, "csi"), /* HSYNC */ |
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SUNXI_FUNCTION(0x3, "lcd")), /* HSYNC */ |
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SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 3), |
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SUNXI_FUNCTION(0x0, "gpio_in"), |
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SUNXI_FUNCTION(0x1, "gpio_out"), |
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SUNXI_FUNCTION(0x2, "csi"), /* VSYNC */ |
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SUNXI_FUNCTION(0x3, "lcd")), /* VSYNC */ |
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SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 4), |
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SUNXI_FUNCTION(0x0, "gpio_in"), |
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SUNXI_FUNCTION(0x1, "gpio_out"), |
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SUNXI_FUNCTION(0x2, "csi"), /* D0 */ |
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SUNXI_FUNCTION(0x3, "lcd")), /* D2 */ |
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SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 5), |
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SUNXI_FUNCTION(0x0, "gpio_in"), |
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SUNXI_FUNCTION(0x1, "gpio_out"), |
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SUNXI_FUNCTION(0x2, "csi"), /* D1 */ |
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SUNXI_FUNCTION(0x3, "lcd")), /* D3 */ |
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SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 6), |
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SUNXI_FUNCTION(0x0, "gpio_in"), |
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SUNXI_FUNCTION(0x1, "gpio_out"), |
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SUNXI_FUNCTION(0x2, "csi"), /* D2 */ |
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SUNXI_FUNCTION(0x3, "lcd")), /* D4 */ |
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SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 7), |
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SUNXI_FUNCTION(0x0, "gpio_in"), |
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SUNXI_FUNCTION(0x1, "gpio_out"), |
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SUNXI_FUNCTION(0x2, "csi"), /* D3 */ |
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SUNXI_FUNCTION(0x3, "lcd")), /* D5 */ |
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SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 8), |
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SUNXI_FUNCTION(0x0, "gpio_in"), |
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SUNXI_FUNCTION(0x1, "gpio_out"), |
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SUNXI_FUNCTION(0x2, "csi"), /* D4 */ |
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SUNXI_FUNCTION(0x3, "lcd")), /* D6 */ |
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SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 9), |
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SUNXI_FUNCTION(0x0, "gpio_in"), |
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SUNXI_FUNCTION(0x1, "gpio_out"), |
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SUNXI_FUNCTION(0x2, "csi"), /* D5 */ |
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SUNXI_FUNCTION(0x3, "lcd")), /* D7 */ |
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SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 10), |
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SUNXI_FUNCTION(0x0, "gpio_in"), |
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SUNXI_FUNCTION(0x1, "gpio_out"), |
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SUNXI_FUNCTION(0x2, "csi"), /* D6 */ |
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SUNXI_FUNCTION(0x3, "lcd")), /* D10 */ |
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SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 11), |
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SUNXI_FUNCTION(0x0, "gpio_in"), |
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SUNXI_FUNCTION(0x1, "gpio_out"), |
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SUNXI_FUNCTION(0x2, "csi"), /* D7 */ |
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SUNXI_FUNCTION(0x3, "lcd")), /* D11 */ |
|
SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 12), |
|
SUNXI_FUNCTION(0x0, "gpio_in"), |
|
SUNXI_FUNCTION(0x1, "gpio_out"), |
|
SUNXI_FUNCTION(0x2, "csi"), /* D8 */ |
|
SUNXI_FUNCTION(0x3, "lcd")), /* D12 */ |
|
SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 13), |
|
SUNXI_FUNCTION(0x0, "gpio_in"), |
|
SUNXI_FUNCTION(0x1, "gpio_out"), |
|
SUNXI_FUNCTION(0x2, "csi"), /* D9 */ |
|
SUNXI_FUNCTION(0x3, "lcd")), /* D13 */ |
|
SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 14), |
|
SUNXI_FUNCTION(0x0, "gpio_in"), |
|
SUNXI_FUNCTION(0x1, "gpio_out"), |
|
SUNXI_FUNCTION(0x2, "csi"), /* D10 */ |
|
SUNXI_FUNCTION(0x3, "lcd")), /* D14 */ |
|
SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 15), |
|
SUNXI_FUNCTION(0x0, "gpio_in"), |
|
SUNXI_FUNCTION(0x1, "gpio_out"), |
|
SUNXI_FUNCTION(0x2, "csi"), /* D11 */ |
|
SUNXI_FUNCTION(0x3, "lcd")), /* D15 */ |
|
SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 16), |
|
SUNXI_FUNCTION(0x0, "gpio_in"), |
|
SUNXI_FUNCTION(0x1, "gpio_out"), |
|
SUNXI_FUNCTION(0x2, "csi"), /* D12 */ |
|
SUNXI_FUNCTION(0x3, "lcd")), /* D18 */ |
|
SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 17), |
|
SUNXI_FUNCTION(0x0, "gpio_in"), |
|
SUNXI_FUNCTION(0x1, "gpio_out"), |
|
SUNXI_FUNCTION(0x2, "csi"), /* D13 */ |
|
SUNXI_FUNCTION(0x3, "lcd")), /* D19 */ |
|
SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 18), |
|
SUNXI_FUNCTION(0x0, "gpio_in"), |
|
SUNXI_FUNCTION(0x1, "gpio_out"), |
|
SUNXI_FUNCTION(0x2, "csi"), /* D14 */ |
|
SUNXI_FUNCTION(0x3, "lcd")), /* D20 */ |
|
SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 19), |
|
SUNXI_FUNCTION(0x0, "gpio_in"), |
|
SUNXI_FUNCTION(0x1, "gpio_out"), |
|
SUNXI_FUNCTION(0x2, "csi"), /* D15 */ |
|
SUNXI_FUNCTION(0x3, "lcd")), /* D21 */ |
|
SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 20), |
|
SUNXI_FUNCTION(0x0, "gpio_in"), |
|
SUNXI_FUNCTION(0x1, "gpio_out"), |
|
SUNXI_FUNCTION(0x2, "csi"), /* FIELD */ |
|
SUNXI_FUNCTION(0x3, "csi_mipi")), /* MCLK */ |
|
SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 21), |
|
SUNXI_FUNCTION(0x0, "gpio_in"), |
|
SUNXI_FUNCTION(0x1, "gpio_out"), |
|
SUNXI_FUNCTION(0x2, "csi"), /* SCK */ |
|
SUNXI_FUNCTION(0x3, "i2c1"), /* SCK */ |
|
SUNXI_FUNCTION(0x4, "uart1")), /* TX */ |
|
SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 22), |
|
SUNXI_FUNCTION(0x0, "gpio_in"), |
|
SUNXI_FUNCTION(0x1, "gpio_out"), |
|
SUNXI_FUNCTION(0x2, "csi"), /* SDA */ |
|
SUNXI_FUNCTION(0x3, "i2c1"), /* SDA */ |
|
SUNXI_FUNCTION(0x4, "uart1")), /* RX */ |
|
SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 23), |
|
SUNXI_FUNCTION(0x0, "gpio_in"), |
|
SUNXI_FUNCTION(0x1, "gpio_out"), |
|
SUNXI_FUNCTION(0x3, "lcd"), /* D22 */ |
|
SUNXI_FUNCTION(0x4, "uart1")), /* RTS */ |
|
SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 24), |
|
SUNXI_FUNCTION(0x0, "gpio_in"), |
|
SUNXI_FUNCTION(0x1, "gpio_out"), |
|
SUNXI_FUNCTION(0x3, "lcd"), /* D23 */ |
|
SUNXI_FUNCTION(0x4, "uart1")), /* CTS */ |
|
/* Hole */ |
|
SUNXI_PIN(SUNXI_PINCTRL_PIN(F, 0), |
|
SUNXI_FUNCTION(0x0, "gpio_in"), |
|
SUNXI_FUNCTION(0x1, "gpio_out"), |
|
SUNXI_FUNCTION(0x2, "mmc0"), /* D1 */ |
|
SUNXI_FUNCTION(0x3, "jtag")), /* MS */ |
|
SUNXI_PIN(SUNXI_PINCTRL_PIN(F, 1), |
|
SUNXI_FUNCTION(0x0, "gpio_in"), |
|
SUNXI_FUNCTION(0x1, "gpio_out"), |
|
SUNXI_FUNCTION(0x2, "mmc0"), /* D0 */ |
|
SUNXI_FUNCTION(0x3, "jtag")), /* DI */ |
|
SUNXI_PIN(SUNXI_PINCTRL_PIN(F, 2), |
|
SUNXI_FUNCTION(0x0, "gpio_in"), |
|
SUNXI_FUNCTION(0x1, "gpio_out"), |
|
SUNXI_FUNCTION(0x2, "mmc0"), /* CLK */ |
|
SUNXI_FUNCTION(0x3, "uart0")), /* TX */ |
|
SUNXI_PIN(SUNXI_PINCTRL_PIN(F, 3), |
|
SUNXI_FUNCTION(0x0, "gpio_in"), |
|
SUNXI_FUNCTION(0x1, "gpio_out"), |
|
SUNXI_FUNCTION(0x2, "mmc0"), /* CMD */ |
|
SUNXI_FUNCTION(0x3, "jtag")), /* DO */ |
|
SUNXI_PIN(SUNXI_PINCTRL_PIN(F, 4), |
|
SUNXI_FUNCTION(0x0, "gpio_in"), |
|
SUNXI_FUNCTION(0x1, "gpio_out"), |
|
SUNXI_FUNCTION(0x2, "mmc0"), /* D3 */ |
|
SUNXI_FUNCTION(0x3, "uart0")), /* RX */ |
|
SUNXI_PIN(SUNXI_PINCTRL_PIN(F, 5), |
|
SUNXI_FUNCTION(0x0, "gpio_in"), |
|
SUNXI_FUNCTION(0x1, "gpio_out"), |
|
SUNXI_FUNCTION(0x2, "mmc0"), /* D2 */ |
|
SUNXI_FUNCTION(0x3, "jtag")), /* CK */ |
|
SUNXI_PIN(SUNXI_PINCTRL_PIN(F, 6), |
|
SUNXI_FUNCTION(0x0, "gpio_in"), |
|
SUNXI_FUNCTION(0x1, "gpio_out")), |
|
/* Hole */ |
|
SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 0), |
|
SUNXI_FUNCTION(0x0, "gpio_in"), |
|
SUNXI_FUNCTION(0x1, "gpio_out"), |
|
SUNXI_FUNCTION(0x2, "mmc1"), /* CLK */ |
|
SUNXI_FUNCTION_IRQ_BANK(0x6, 1, 0)), /* PG_EINT0 */ |
|
SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 1), |
|
SUNXI_FUNCTION(0x0, "gpio_in"), |
|
SUNXI_FUNCTION(0x1, "gpio_out"), |
|
SUNXI_FUNCTION(0x2, "mmc1"), /* CMD */ |
|
SUNXI_FUNCTION_IRQ_BANK(0x6, 1, 1)), /* PG_EINT1 */ |
|
SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 2), |
|
SUNXI_FUNCTION(0x0, "gpio_in"), |
|
SUNXI_FUNCTION(0x1, "gpio_out"), |
|
SUNXI_FUNCTION(0x2, "mmc1"), /* D0 */ |
|
SUNXI_FUNCTION_IRQ_BANK(0x6, 1, 2)), /* PG_EINT2 */ |
|
SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 3), |
|
SUNXI_FUNCTION(0x0, "gpio_in"), |
|
SUNXI_FUNCTION(0x1, "gpio_out"), |
|
SUNXI_FUNCTION(0x2, "mmc1"), /* D1 */ |
|
SUNXI_FUNCTION_IRQ_BANK(0x6, 1, 3)), /* PG_EINT3 */ |
|
SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 4), |
|
SUNXI_FUNCTION(0x0, "gpio_in"), |
|
SUNXI_FUNCTION(0x1, "gpio_out"), |
|
SUNXI_FUNCTION(0x2, "mmc1"), /* D2 */ |
|
SUNXI_FUNCTION_IRQ_BANK(0x6, 1, 4)), /* PG_EINT4 */ |
|
SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 5), |
|
SUNXI_FUNCTION(0x0, "gpio_in"), |
|
SUNXI_FUNCTION(0x1, "gpio_out"), |
|
SUNXI_FUNCTION(0x2, "mmc1"), /* D3 */ |
|
SUNXI_FUNCTION_IRQ_BANK(0x6, 1, 5)), /* PG_EINT5 */ |
|
SUNXI_PIN_VARIANT(SUNXI_PINCTRL_PIN(G, 6), |
|
PINCTRL_SUN8I_V3, |
|
SUNXI_FUNCTION(0x0, "gpio_in"), |
|
SUNXI_FUNCTION(0x1, "gpio_out"), |
|
SUNXI_FUNCTION(0x2, "uart1"), /* TX */ |
|
SUNXI_FUNCTION_IRQ_BANK(0x6, 1, 6)), /* PG_EINT6 */ |
|
SUNXI_PIN_VARIANT(SUNXI_PINCTRL_PIN(G, 7), |
|
PINCTRL_SUN8I_V3, |
|
SUNXI_FUNCTION(0x0, "gpio_in"), |
|
SUNXI_FUNCTION(0x1, "gpio_out"), |
|
SUNXI_FUNCTION(0x2, "uart1"), /* RX */ |
|
SUNXI_FUNCTION_IRQ_BANK(0x6, 1, 7)), /* PG_EINT7 */ |
|
SUNXI_PIN_VARIANT(SUNXI_PINCTRL_PIN(G, 8), |
|
PINCTRL_SUN8I_V3, |
|
SUNXI_FUNCTION(0x0, "gpio_in"), |
|
SUNXI_FUNCTION(0x1, "gpio_out"), |
|
SUNXI_FUNCTION(0x2, "uart1"), /* RTS */ |
|
SUNXI_FUNCTION_IRQ_BANK(0x6, 1, 8)), /* PG_EINT8 */ |
|
SUNXI_PIN_VARIANT(SUNXI_PINCTRL_PIN(G, 9), |
|
PINCTRL_SUN8I_V3, |
|
SUNXI_FUNCTION(0x0, "gpio_in"), |
|
SUNXI_FUNCTION(0x1, "gpio_out"), |
|
SUNXI_FUNCTION(0x2, "uart1"), /* CTS */ |
|
SUNXI_FUNCTION_IRQ_BANK(0x6, 1, 9)), /* PG_EINT9 */ |
|
SUNXI_PIN_VARIANT(SUNXI_PINCTRL_PIN(G, 10), |
|
PINCTRL_SUN8I_V3, |
|
SUNXI_FUNCTION(0x0, "gpio_in"), |
|
SUNXI_FUNCTION(0x1, "gpio_out"), |
|
SUNXI_FUNCTION(0x2, "i2s"), /* SYNC */ |
|
SUNXI_FUNCTION_IRQ_BANK(0x6, 1, 10)), /* PG_EINT10 */ |
|
SUNXI_PIN_VARIANT(SUNXI_PINCTRL_PIN(G, 11), |
|
PINCTRL_SUN8I_V3, |
|
SUNXI_FUNCTION(0x0, "gpio_in"), |
|
SUNXI_FUNCTION(0x1, "gpio_out"), |
|
SUNXI_FUNCTION(0x2, "i2s"), /* BCLK */ |
|
SUNXI_FUNCTION_IRQ_BANK(0x6, 1, 11)), /* PG_EINT11 */ |
|
SUNXI_PIN_VARIANT(SUNXI_PINCTRL_PIN(G, 12), |
|
PINCTRL_SUN8I_V3, |
|
SUNXI_FUNCTION(0x0, "gpio_in"), |
|
SUNXI_FUNCTION(0x1, "gpio_out"), |
|
SUNXI_FUNCTION(0x2, "i2s"), /* DOUT */ |
|
SUNXI_FUNCTION_IRQ_BANK(0x6, 1, 12)), /* PG_EINT12 */ |
|
SUNXI_PIN_VARIANT(SUNXI_PINCTRL_PIN(G, 13), |
|
PINCTRL_SUN8I_V3, |
|
SUNXI_FUNCTION(0x0, "gpio_in"), |
|
SUNXI_FUNCTION(0x1, "gpio_out"), |
|
SUNXI_FUNCTION(0x2, "i2s"), /* DIN */ |
|
SUNXI_FUNCTION_IRQ_BANK(0x6, 1, 13)), /* PG_EINT13 */ |
|
}; |
|
|
|
static const unsigned int sun8i_v3s_pinctrl_irq_bank_map[] = { 1, 2 }; |
|
|
|
static const struct sunxi_pinctrl_desc sun8i_v3s_pinctrl_data = { |
|
.pins = sun8i_v3s_pins, |
|
.npins = ARRAY_SIZE(sun8i_v3s_pins), |
|
.irq_banks = 2, |
|
.irq_bank_map = sun8i_v3s_pinctrl_irq_bank_map, |
|
.irq_read_needs_mux = true |
|
}; |
|
|
|
static int sun8i_v3s_pinctrl_probe(struct platform_device *pdev) |
|
{ |
|
unsigned long variant = (unsigned long)of_device_get_match_data(&pdev->dev); |
|
|
|
return sunxi_pinctrl_init_with_variant(pdev, &sun8i_v3s_pinctrl_data, |
|
variant); |
|
} |
|
|
|
static const struct of_device_id sun8i_v3s_pinctrl_match[] = { |
|
{ |
|
.compatible = "allwinner,sun8i-v3-pinctrl", |
|
.data = (void *)PINCTRL_SUN8I_V3 |
|
}, |
|
{ |
|
.compatible = "allwinner,sun8i-v3s-pinctrl", |
|
.data = (void *)PINCTRL_SUN8I_V3S |
|
}, |
|
{ }, |
|
}; |
|
|
|
static struct platform_driver sun8i_v3s_pinctrl_driver = { |
|
.probe = sun8i_v3s_pinctrl_probe, |
|
.driver = { |
|
.name = "sun8i-v3s-pinctrl", |
|
.of_match_table = sun8i_v3s_pinctrl_match, |
|
}, |
|
}; |
|
builtin_platform_driver(sun8i_v3s_pinctrl_driver);
|
|
|