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308 lines
8.4 KiB
308 lines
8.4 KiB
// SPDX-License-Identifier: GPL-2.0 |
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/* |
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* Author: |
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* Chuanhong Guo <[email protected]> |
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*/ |
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#include <linux/device.h> |
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#include <linux/kernel.h> |
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#include <linux/mtd/spinand.h> |
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#define SPINAND_MFR_GIGADEVICE 0xC8 |
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#define GD5FXGQ4XA_STATUS_ECC_1_7_BITFLIPS (1 << 4) |
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#define GD5FXGQ4XA_STATUS_ECC_8_BITFLIPS (3 << 4) |
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#define GD5FXGQ4UEXXG_REG_STATUS2 0xf0 |
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#define GD5FXGQ4UXFXXG_STATUS_ECC_MASK (7 << 4) |
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#define GD5FXGQ4UXFXXG_STATUS_ECC_NO_BITFLIPS (0 << 4) |
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#define GD5FXGQ4UXFXXG_STATUS_ECC_1_3_BITFLIPS (1 << 4) |
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#define GD5FXGQ4UXFXXG_STATUS_ECC_UNCOR_ERROR (7 << 4) |
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static SPINAND_OP_VARIANTS(read_cache_variants, |
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SPINAND_PAGE_READ_FROM_CACHE_QUADIO_OP(0, 1, NULL, 0), |
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SPINAND_PAGE_READ_FROM_CACHE_X4_OP(0, 1, NULL, 0), |
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SPINAND_PAGE_READ_FROM_CACHE_DUALIO_OP(0, 1, NULL, 0), |
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SPINAND_PAGE_READ_FROM_CACHE_X2_OP(0, 1, NULL, 0), |
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SPINAND_PAGE_READ_FROM_CACHE_OP(true, 0, 1, NULL, 0), |
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SPINAND_PAGE_READ_FROM_CACHE_OP(false, 0, 1, NULL, 0)); |
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static SPINAND_OP_VARIANTS(read_cache_variants_f, |
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SPINAND_PAGE_READ_FROM_CACHE_QUADIO_OP(0, 1, NULL, 0), |
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SPINAND_PAGE_READ_FROM_CACHE_X4_OP_3A(0, 1, NULL, 0), |
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SPINAND_PAGE_READ_FROM_CACHE_DUALIO_OP(0, 1, NULL, 0), |
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SPINAND_PAGE_READ_FROM_CACHE_X2_OP_3A(0, 1, NULL, 0), |
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SPINAND_PAGE_READ_FROM_CACHE_OP_3A(true, 0, 1, NULL, 0), |
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SPINAND_PAGE_READ_FROM_CACHE_OP_3A(false, 0, 0, NULL, 0)); |
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static SPINAND_OP_VARIANTS(write_cache_variants, |
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SPINAND_PROG_LOAD_X4(true, 0, NULL, 0), |
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SPINAND_PROG_LOAD(true, 0, NULL, 0)); |
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static SPINAND_OP_VARIANTS(update_cache_variants, |
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SPINAND_PROG_LOAD_X4(false, 0, NULL, 0), |
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SPINAND_PROG_LOAD(false, 0, NULL, 0)); |
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static int gd5fxgq4xa_ooblayout_ecc(struct mtd_info *mtd, int section, |
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struct mtd_oob_region *region) |
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{ |
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if (section > 3) |
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return -ERANGE; |
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region->offset = (16 * section) + 8; |
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region->length = 8; |
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return 0; |
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} |
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static int gd5fxgq4xa_ooblayout_free(struct mtd_info *mtd, int section, |
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struct mtd_oob_region *region) |
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{ |
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if (section > 3) |
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return -ERANGE; |
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if (section) { |
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region->offset = 16 * section; |
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region->length = 8; |
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} else { |
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/* section 0 has one byte reserved for bad block mark */ |
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region->offset = 1; |
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region->length = 7; |
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} |
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return 0; |
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} |
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static const struct mtd_ooblayout_ops gd5fxgq4xa_ooblayout = { |
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.ecc = gd5fxgq4xa_ooblayout_ecc, |
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.free = gd5fxgq4xa_ooblayout_free, |
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}; |
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static int gd5fxgq4xa_ecc_get_status(struct spinand_device *spinand, |
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u8 status) |
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{ |
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switch (status & STATUS_ECC_MASK) { |
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case STATUS_ECC_NO_BITFLIPS: |
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return 0; |
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case GD5FXGQ4XA_STATUS_ECC_1_7_BITFLIPS: |
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/* 1-7 bits are flipped. return the maximum. */ |
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return 7; |
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case GD5FXGQ4XA_STATUS_ECC_8_BITFLIPS: |
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return 8; |
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case STATUS_ECC_UNCOR_ERROR: |
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return -EBADMSG; |
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default: |
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break; |
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} |
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return -EINVAL; |
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} |
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static int gd5fxgq4_variant2_ooblayout_ecc(struct mtd_info *mtd, int section, |
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struct mtd_oob_region *region) |
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{ |
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if (section) |
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return -ERANGE; |
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region->offset = 64; |
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region->length = 64; |
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return 0; |
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} |
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static int gd5fxgq4_variant2_ooblayout_free(struct mtd_info *mtd, int section, |
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struct mtd_oob_region *region) |
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{ |
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if (section) |
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return -ERANGE; |
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/* Reserve 1 bytes for the BBM. */ |
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region->offset = 1; |
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region->length = 63; |
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return 0; |
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} |
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static const struct mtd_ooblayout_ops gd5fxgq4_variant2_ooblayout = { |
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.ecc = gd5fxgq4_variant2_ooblayout_ecc, |
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.free = gd5fxgq4_variant2_ooblayout_free, |
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}; |
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static int gd5fxgq4xc_ooblayout_256_ecc(struct mtd_info *mtd, int section, |
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struct mtd_oob_region *oobregion) |
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{ |
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if (section) |
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return -ERANGE; |
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oobregion->offset = 128; |
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oobregion->length = 128; |
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return 0; |
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} |
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static int gd5fxgq4xc_ooblayout_256_free(struct mtd_info *mtd, int section, |
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struct mtd_oob_region *oobregion) |
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{ |
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if (section) |
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return -ERANGE; |
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oobregion->offset = 1; |
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oobregion->length = 127; |
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return 0; |
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} |
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static const struct mtd_ooblayout_ops gd5fxgq4xc_oob_256_ops = { |
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.ecc = gd5fxgq4xc_ooblayout_256_ecc, |
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.free = gd5fxgq4xc_ooblayout_256_free, |
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}; |
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static int gd5fxgq4uexxg_ecc_get_status(struct spinand_device *spinand, |
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u8 status) |
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{ |
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u8 status2; |
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struct spi_mem_op op = SPINAND_GET_FEATURE_OP(GD5FXGQ4UEXXG_REG_STATUS2, |
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&status2); |
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int ret; |
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switch (status & STATUS_ECC_MASK) { |
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case STATUS_ECC_NO_BITFLIPS: |
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return 0; |
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case GD5FXGQ4XA_STATUS_ECC_1_7_BITFLIPS: |
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/* |
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* Read status2 register to determine a more fine grained |
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* bit error status |
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*/ |
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ret = spi_mem_exec_op(spinand->spimem, &op); |
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if (ret) |
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return ret; |
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/* |
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* 4 ... 7 bits are flipped (1..4 can't be detected, so |
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* report the maximum of 4 in this case |
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*/ |
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/* bits sorted this way (3...0): ECCS1,ECCS0,ECCSE1,ECCSE0 */ |
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return ((status & STATUS_ECC_MASK) >> 2) | |
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((status2 & STATUS_ECC_MASK) >> 4); |
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case GD5FXGQ4XA_STATUS_ECC_8_BITFLIPS: |
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return 8; |
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case STATUS_ECC_UNCOR_ERROR: |
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return -EBADMSG; |
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default: |
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break; |
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} |
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return -EINVAL; |
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} |
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static int gd5fxgq4ufxxg_ecc_get_status(struct spinand_device *spinand, |
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u8 status) |
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{ |
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switch (status & GD5FXGQ4UXFXXG_STATUS_ECC_MASK) { |
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case GD5FXGQ4UXFXXG_STATUS_ECC_NO_BITFLIPS: |
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return 0; |
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case GD5FXGQ4UXFXXG_STATUS_ECC_1_3_BITFLIPS: |
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return 3; |
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case GD5FXGQ4UXFXXG_STATUS_ECC_UNCOR_ERROR: |
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return -EBADMSG; |
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default: /* (2 << 4) through (6 << 4) are 4-8 corrected errors */ |
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return ((status & GD5FXGQ4UXFXXG_STATUS_ECC_MASK) >> 4) + 2; |
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} |
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return -EINVAL; |
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} |
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static const struct spinand_info gigadevice_spinand_table[] = { |
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SPINAND_INFO("GD5F1GQ4xA", |
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SPINAND_ID(SPINAND_READID_METHOD_OPCODE_ADDR, 0xf1), |
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NAND_MEMORG(1, 2048, 64, 64, 1024, 20, 1, 1, 1), |
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NAND_ECCREQ(8, 512), |
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SPINAND_INFO_OP_VARIANTS(&read_cache_variants, |
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&write_cache_variants, |
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&update_cache_variants), |
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SPINAND_HAS_QE_BIT, |
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SPINAND_ECCINFO(&gd5fxgq4xa_ooblayout, |
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gd5fxgq4xa_ecc_get_status)), |
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SPINAND_INFO("GD5F2GQ4xA", |
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SPINAND_ID(SPINAND_READID_METHOD_OPCODE_ADDR, 0xf2), |
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NAND_MEMORG(1, 2048, 64, 64, 2048, 40, 1, 1, 1), |
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NAND_ECCREQ(8, 512), |
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SPINAND_INFO_OP_VARIANTS(&read_cache_variants, |
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&write_cache_variants, |
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&update_cache_variants), |
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SPINAND_HAS_QE_BIT, |
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SPINAND_ECCINFO(&gd5fxgq4xa_ooblayout, |
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gd5fxgq4xa_ecc_get_status)), |
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SPINAND_INFO("GD5F4GQ4xA", |
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SPINAND_ID(SPINAND_READID_METHOD_OPCODE_ADDR, 0xf4), |
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NAND_MEMORG(1, 2048, 64, 64, 4096, 80, 1, 1, 1), |
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NAND_ECCREQ(8, 512), |
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SPINAND_INFO_OP_VARIANTS(&read_cache_variants, |
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&write_cache_variants, |
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&update_cache_variants), |
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SPINAND_HAS_QE_BIT, |
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SPINAND_ECCINFO(&gd5fxgq4xa_ooblayout, |
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gd5fxgq4xa_ecc_get_status)), |
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SPINAND_INFO("GD5F4GQ4RC", |
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SPINAND_ID(SPINAND_READID_METHOD_OPCODE, 0xa4, 0x68), |
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NAND_MEMORG(1, 4096, 256, 64, 2048, 40, 1, 1, 1), |
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NAND_ECCREQ(8, 512), |
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SPINAND_INFO_OP_VARIANTS(&read_cache_variants_f, |
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&write_cache_variants, |
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&update_cache_variants), |
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SPINAND_HAS_QE_BIT, |
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SPINAND_ECCINFO(&gd5fxgq4xc_oob_256_ops, |
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gd5fxgq4ufxxg_ecc_get_status)), |
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SPINAND_INFO("GD5F4GQ4UC", |
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SPINAND_ID(SPINAND_READID_METHOD_OPCODE, 0xb4, 0x68), |
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NAND_MEMORG(1, 4096, 256, 64, 2048, 40, 1, 1, 1), |
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NAND_ECCREQ(8, 512), |
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SPINAND_INFO_OP_VARIANTS(&read_cache_variants_f, |
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&write_cache_variants, |
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&update_cache_variants), |
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SPINAND_HAS_QE_BIT, |
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SPINAND_ECCINFO(&gd5fxgq4xc_oob_256_ops, |
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gd5fxgq4ufxxg_ecc_get_status)), |
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SPINAND_INFO("GD5F1GQ4UExxG", |
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SPINAND_ID(SPINAND_READID_METHOD_OPCODE_ADDR, 0xd1), |
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NAND_MEMORG(1, 2048, 128, 64, 1024, 20, 1, 1, 1), |
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NAND_ECCREQ(8, 512), |
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SPINAND_INFO_OP_VARIANTS(&read_cache_variants, |
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&write_cache_variants, |
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&update_cache_variants), |
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SPINAND_HAS_QE_BIT, |
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SPINAND_ECCINFO(&gd5fxgq4_variant2_ooblayout, |
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gd5fxgq4uexxg_ecc_get_status)), |
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SPINAND_INFO("GD5F1GQ4UFxxG", |
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SPINAND_ID(SPINAND_READID_METHOD_OPCODE, 0xb1, 0x48), |
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NAND_MEMORG(1, 2048, 128, 64, 1024, 20, 1, 1, 1), |
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NAND_ECCREQ(8, 512), |
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SPINAND_INFO_OP_VARIANTS(&read_cache_variants_f, |
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&write_cache_variants, |
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&update_cache_variants), |
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SPINAND_HAS_QE_BIT, |
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SPINAND_ECCINFO(&gd5fxgq4_variant2_ooblayout, |
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gd5fxgq4ufxxg_ecc_get_status)), |
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}; |
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static const struct spinand_manufacturer_ops gigadevice_spinand_manuf_ops = { |
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}; |
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const struct spinand_manufacturer gigadevice_spinand_manufacturer = { |
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.id = SPINAND_MFR_GIGADEVICE, |
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.name = "GigaDevice", |
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.chips = gigadevice_spinand_table, |
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.nchips = ARRAY_SIZE(gigadevice_spinand_table), |
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.ops = &gigadevice_spinand_manuf_ops, |
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};
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