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148 lines
3.8 KiB
148 lines
3.8 KiB
// SPDX-License-Identifier: GPL-2.0-only |
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/* |
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* Tegra host1x Interrupt Management |
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* |
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* Copyright (C) 2010 Google, Inc. |
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* Copyright (c) 2010-2013, NVIDIA Corporation. |
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*/ |
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#include <linux/interrupt.h> |
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#include <linux/irq.h> |
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#include <linux/io.h> |
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#include "../intr.h" |
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#include "../dev.h" |
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/* |
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* Sync point threshold interrupt service function |
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* Handles sync point threshold triggers, in interrupt context |
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*/ |
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static void host1x_intr_syncpt_handle(struct host1x_syncpt *syncpt) |
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{ |
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unsigned int id = syncpt->id; |
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struct host1x *host = syncpt->host; |
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host1x_sync_writel(host, BIT(id % 32), |
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HOST1X_SYNC_SYNCPT_THRESH_INT_DISABLE(id / 32)); |
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host1x_sync_writel(host, BIT(id % 32), |
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HOST1X_SYNC_SYNCPT_THRESH_CPU0_INT_STATUS(id / 32)); |
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schedule_work(&syncpt->intr.work); |
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} |
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static irqreturn_t syncpt_thresh_isr(int irq, void *dev_id) |
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{ |
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struct host1x *host = dev_id; |
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unsigned long reg; |
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unsigned int i, id; |
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for (i = 0; i < DIV_ROUND_UP(host->info->nb_pts, 32); i++) { |
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reg = host1x_sync_readl(host, |
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HOST1X_SYNC_SYNCPT_THRESH_CPU0_INT_STATUS(i)); |
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for_each_set_bit(id, ®, 32) { |
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struct host1x_syncpt *syncpt = |
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host->syncpt + (i * 32 + id); |
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host1x_intr_syncpt_handle(syncpt); |
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} |
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} |
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return IRQ_HANDLED; |
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} |
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static void _host1x_intr_disable_all_syncpt_intrs(struct host1x *host) |
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{ |
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unsigned int i; |
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for (i = 0; i < DIV_ROUND_UP(host->info->nb_pts, 32); ++i) { |
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host1x_sync_writel(host, 0xffffffffu, |
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HOST1X_SYNC_SYNCPT_THRESH_INT_DISABLE(i)); |
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host1x_sync_writel(host, 0xffffffffu, |
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HOST1X_SYNC_SYNCPT_THRESH_CPU0_INT_STATUS(i)); |
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} |
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} |
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static void intr_hw_init(struct host1x *host, u32 cpm) |
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{ |
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#if HOST1X_HW < 6 |
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/* disable the ip_busy_timeout. this prevents write drops */ |
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host1x_sync_writel(host, 0, HOST1X_SYNC_IP_BUSY_TIMEOUT); |
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/* |
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* increase the auto-ack timout to the maximum value. 2d will hang |
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* otherwise on Tegra2. |
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*/ |
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host1x_sync_writel(host, 0xff, HOST1X_SYNC_CTXSW_TIMEOUT_CFG); |
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/* update host clocks per usec */ |
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host1x_sync_writel(host, cpm, HOST1X_SYNC_USEC_CLK); |
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#endif |
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} |
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static int |
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_host1x_intr_init_host_sync(struct host1x *host, u32 cpm, |
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void (*syncpt_thresh_work)(struct work_struct *)) |
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{ |
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unsigned int i; |
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int err; |
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host1x_hw_intr_disable_all_syncpt_intrs(host); |
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for (i = 0; i < host->info->nb_pts; i++) |
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INIT_WORK(&host->syncpt[i].intr.work, syncpt_thresh_work); |
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err = devm_request_irq(host->dev, host->intr_syncpt_irq, |
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syncpt_thresh_isr, IRQF_SHARED, |
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"host1x_syncpt", host); |
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if (err < 0) { |
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WARN_ON(1); |
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return err; |
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} |
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intr_hw_init(host, cpm); |
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return 0; |
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} |
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static void _host1x_intr_set_syncpt_threshold(struct host1x *host, |
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unsigned int id, |
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u32 thresh) |
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{ |
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host1x_sync_writel(host, thresh, HOST1X_SYNC_SYNCPT_INT_THRESH(id)); |
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} |
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static void _host1x_intr_enable_syncpt_intr(struct host1x *host, |
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unsigned int id) |
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{ |
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host1x_sync_writel(host, BIT(id % 32), |
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HOST1X_SYNC_SYNCPT_THRESH_INT_ENABLE_CPU0(id / 32)); |
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} |
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static void _host1x_intr_disable_syncpt_intr(struct host1x *host, |
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unsigned int id) |
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{ |
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host1x_sync_writel(host, BIT(id % 32), |
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HOST1X_SYNC_SYNCPT_THRESH_INT_DISABLE(id / 32)); |
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host1x_sync_writel(host, BIT(id % 32), |
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HOST1X_SYNC_SYNCPT_THRESH_CPU0_INT_STATUS(id / 32)); |
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} |
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static int _host1x_free_syncpt_irq(struct host1x *host) |
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{ |
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unsigned int i; |
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devm_free_irq(host->dev, host->intr_syncpt_irq, host); |
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for (i = 0; i < host->info->nb_pts; i++) |
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cancel_work_sync(&host->syncpt[i].intr.work); |
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return 0; |
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} |
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static const struct host1x_intr_ops host1x_intr_ops = { |
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.init_host_sync = _host1x_intr_init_host_sync, |
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.set_syncpt_threshold = _host1x_intr_set_syncpt_threshold, |
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.enable_syncpt_intr = _host1x_intr_enable_syncpt_intr, |
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.disable_syncpt_intr = _host1x_intr_disable_syncpt_intr, |
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.disable_all_syncpt_intrs = _host1x_intr_disable_all_syncpt_intrs, |
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.free_syncpt_irq = _host1x_free_syncpt_irq, |
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};
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