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1165 lines
28 KiB
1165 lines
28 KiB
/* |
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* edac_mc kernel module |
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* (C) 2005, 2006 Linux Networx (http://lnxi.com) |
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* This file may be distributed under the terms of the |
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* GNU General Public License. |
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* |
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* Written by Thayne Harbaugh |
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* Based on work by Dan Hollis <goemon at anime dot net> and others. |
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* http://www.anime.net/~goemon/linux-ecc/ |
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* |
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* Modified by Dave Peterson and Doug Thompson |
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* |
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*/ |
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|
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#include <linux/module.h> |
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#include <linux/proc_fs.h> |
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#include <linux/kernel.h> |
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#include <linux/types.h> |
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#include <linux/smp.h> |
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#include <linux/init.h> |
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#include <linux/sysctl.h> |
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#include <linux/highmem.h> |
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#include <linux/timer.h> |
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#include <linux/slab.h> |
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#include <linux/jiffies.h> |
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#include <linux/spinlock.h> |
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#include <linux/list.h> |
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#include <linux/ctype.h> |
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#include <linux/edac.h> |
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#include <linux/bitops.h> |
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#include <linux/uaccess.h> |
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#include <asm/page.h> |
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#include "edac_mc.h" |
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#include "edac_module.h" |
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#include <ras/ras_event.h> |
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|
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#ifdef CONFIG_EDAC_ATOMIC_SCRUB |
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#include <asm/edac.h> |
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#else |
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#define edac_atomic_scrub(va, size) do { } while (0) |
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#endif |
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|
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int edac_op_state = EDAC_OPSTATE_INVAL; |
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EXPORT_SYMBOL_GPL(edac_op_state); |
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|
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/* lock to memory controller's control array */ |
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static DEFINE_MUTEX(mem_ctls_mutex); |
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static LIST_HEAD(mc_devices); |
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|
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/* |
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* Used to lock EDAC MC to just one module, avoiding two drivers e. g. |
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* apei/ghes and i7core_edac to be used at the same time. |
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*/ |
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static const char *edac_mc_owner; |
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|
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static struct mem_ctl_info *error_desc_to_mci(struct edac_raw_error_desc *e) |
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{ |
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return container_of(e, struct mem_ctl_info, error_desc); |
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} |
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|
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unsigned int edac_dimm_info_location(struct dimm_info *dimm, char *buf, |
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unsigned int len) |
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{ |
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struct mem_ctl_info *mci = dimm->mci; |
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int i, n, count = 0; |
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char *p = buf; |
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|
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for (i = 0; i < mci->n_layers; i++) { |
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n = snprintf(p, len, "%s %d ", |
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edac_layer_name[mci->layers[i].type], |
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dimm->location[i]); |
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p += n; |
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len -= n; |
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count += n; |
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if (!len) |
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break; |
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} |
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|
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return count; |
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} |
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|
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#ifdef CONFIG_EDAC_DEBUG |
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|
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static void edac_mc_dump_channel(struct rank_info *chan) |
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{ |
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edac_dbg(4, " channel->chan_idx = %d\n", chan->chan_idx); |
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edac_dbg(4, " channel = %p\n", chan); |
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edac_dbg(4, " channel->csrow = %p\n", chan->csrow); |
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edac_dbg(4, " channel->dimm = %p\n", chan->dimm); |
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} |
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|
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static void edac_mc_dump_dimm(struct dimm_info *dimm) |
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{ |
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char location[80]; |
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|
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if (!dimm->nr_pages) |
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return; |
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|
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edac_dimm_info_location(dimm, location, sizeof(location)); |
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|
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edac_dbg(4, "%s%i: %smapped as virtual row %d, chan %d\n", |
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dimm->mci->csbased ? "rank" : "dimm", |
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dimm->idx, location, dimm->csrow, dimm->cschannel); |
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edac_dbg(4, " dimm = %p\n", dimm); |
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edac_dbg(4, " dimm->label = '%s'\n", dimm->label); |
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edac_dbg(4, " dimm->nr_pages = 0x%x\n", dimm->nr_pages); |
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edac_dbg(4, " dimm->grain = %d\n", dimm->grain); |
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edac_dbg(4, " dimm->nr_pages = 0x%x\n", dimm->nr_pages); |
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} |
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|
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static void edac_mc_dump_csrow(struct csrow_info *csrow) |
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{ |
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edac_dbg(4, "csrow->csrow_idx = %d\n", csrow->csrow_idx); |
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edac_dbg(4, " csrow = %p\n", csrow); |
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edac_dbg(4, " csrow->first_page = 0x%lx\n", csrow->first_page); |
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edac_dbg(4, " csrow->last_page = 0x%lx\n", csrow->last_page); |
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edac_dbg(4, " csrow->page_mask = 0x%lx\n", csrow->page_mask); |
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edac_dbg(4, " csrow->nr_channels = %d\n", csrow->nr_channels); |
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edac_dbg(4, " csrow->channels = %p\n", csrow->channels); |
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edac_dbg(4, " csrow->mci = %p\n", csrow->mci); |
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} |
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|
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static void edac_mc_dump_mci(struct mem_ctl_info *mci) |
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{ |
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edac_dbg(3, "\tmci = %p\n", mci); |
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edac_dbg(3, "\tmci->mtype_cap = %lx\n", mci->mtype_cap); |
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edac_dbg(3, "\tmci->edac_ctl_cap = %lx\n", mci->edac_ctl_cap); |
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edac_dbg(3, "\tmci->edac_cap = %lx\n", mci->edac_cap); |
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edac_dbg(4, "\tmci->edac_check = %p\n", mci->edac_check); |
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edac_dbg(3, "\tmci->nr_csrows = %d, csrows = %p\n", |
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mci->nr_csrows, mci->csrows); |
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edac_dbg(3, "\tmci->nr_dimms = %d, dimms = %p\n", |
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mci->tot_dimms, mci->dimms); |
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edac_dbg(3, "\tdev = %p\n", mci->pdev); |
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edac_dbg(3, "\tmod_name:ctl_name = %s:%s\n", |
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mci->mod_name, mci->ctl_name); |
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edac_dbg(3, "\tpvt_info = %p\n\n", mci->pvt_info); |
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} |
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|
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#endif /* CONFIG_EDAC_DEBUG */ |
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|
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const char * const edac_mem_types[] = { |
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[MEM_EMPTY] = "Empty", |
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[MEM_RESERVED] = "Reserved", |
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[MEM_UNKNOWN] = "Unknown", |
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[MEM_FPM] = "FPM", |
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[MEM_EDO] = "EDO", |
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[MEM_BEDO] = "BEDO", |
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[MEM_SDR] = "Unbuffered-SDR", |
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[MEM_RDR] = "Registered-SDR", |
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[MEM_DDR] = "Unbuffered-DDR", |
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[MEM_RDDR] = "Registered-DDR", |
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[MEM_RMBS] = "RMBS", |
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[MEM_DDR2] = "Unbuffered-DDR2", |
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[MEM_FB_DDR2] = "FullyBuffered-DDR2", |
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[MEM_RDDR2] = "Registered-DDR2", |
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[MEM_XDR] = "XDR", |
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[MEM_DDR3] = "Unbuffered-DDR3", |
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[MEM_RDDR3] = "Registered-DDR3", |
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[MEM_LRDDR3] = "Load-Reduced-DDR3-RAM", |
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[MEM_LPDDR3] = "Low-Power-DDR3-RAM", |
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[MEM_DDR4] = "Unbuffered-DDR4", |
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[MEM_RDDR4] = "Registered-DDR4", |
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[MEM_LPDDR4] = "Low-Power-DDR4-RAM", |
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[MEM_LRDDR4] = "Load-Reduced-DDR4-RAM", |
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[MEM_DDR5] = "Unbuffered-DDR5", |
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[MEM_NVDIMM] = "Non-volatile-RAM", |
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[MEM_WIO2] = "Wide-IO-2", |
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}; |
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EXPORT_SYMBOL_GPL(edac_mem_types); |
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|
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/** |
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* edac_align_ptr - Prepares the pointer offsets for a single-shot allocation |
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* @p: pointer to a pointer with the memory offset to be used. At |
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* return, this will be incremented to point to the next offset |
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* @size: Size of the data structure to be reserved |
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* @n_elems: Number of elements that should be reserved |
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* |
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* If 'size' is a constant, the compiler will optimize this whole function |
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* down to either a no-op or the addition of a constant to the value of '*p'. |
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* |
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* The 'p' pointer is absolutely needed to keep the proper advancing |
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* further in memory to the proper offsets when allocating the struct along |
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* with its embedded structs, as edac_device_alloc_ctl_info() does it |
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* above, for example. |
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* |
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* At return, the pointer 'p' will be incremented to be used on a next call |
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* to this function. |
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*/ |
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void *edac_align_ptr(void **p, unsigned int size, int n_elems) |
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{ |
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unsigned int align, r; |
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void *ptr = *p; |
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|
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*p += size * n_elems; |
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|
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/* |
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* 'p' can possibly be an unaligned item X such that sizeof(X) is |
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* 'size'. Adjust 'p' so that its alignment is at least as |
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* stringent as what the compiler would provide for X and return |
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* the aligned result. |
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* Here we assume that the alignment of a "long long" is the most |
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* stringent alignment that the compiler will ever provide by default. |
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* As far as I know, this is a reasonable assumption. |
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*/ |
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if (size > sizeof(long)) |
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align = sizeof(long long); |
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else if (size > sizeof(int)) |
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align = sizeof(long); |
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else if (size > sizeof(short)) |
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align = sizeof(int); |
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else if (size > sizeof(char)) |
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align = sizeof(short); |
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else |
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return (char *)ptr; |
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r = (unsigned long)p % align; |
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|
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if (r == 0) |
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return (char *)ptr; |
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|
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*p += align - r; |
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|
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return (void *)(((unsigned long)ptr) + align - r); |
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} |
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|
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static void _edac_mc_free(struct mem_ctl_info *mci) |
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{ |
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put_device(&mci->dev); |
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} |
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|
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static void mci_release(struct device *dev) |
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{ |
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struct mem_ctl_info *mci = container_of(dev, struct mem_ctl_info, dev); |
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struct csrow_info *csr; |
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int i, chn, row; |
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|
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if (mci->dimms) { |
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for (i = 0; i < mci->tot_dimms; i++) |
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kfree(mci->dimms[i]); |
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kfree(mci->dimms); |
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} |
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|
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if (mci->csrows) { |
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for (row = 0; row < mci->nr_csrows; row++) { |
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csr = mci->csrows[row]; |
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if (!csr) |
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continue; |
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|
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if (csr->channels) { |
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for (chn = 0; chn < mci->num_cschannel; chn++) |
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kfree(csr->channels[chn]); |
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kfree(csr->channels); |
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} |
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kfree(csr); |
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} |
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kfree(mci->csrows); |
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} |
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kfree(mci); |
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} |
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|
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static int edac_mc_alloc_csrows(struct mem_ctl_info *mci) |
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{ |
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unsigned int tot_channels = mci->num_cschannel; |
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unsigned int tot_csrows = mci->nr_csrows; |
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unsigned int row, chn; |
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|
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/* |
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* Alocate and fill the csrow/channels structs |
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*/ |
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mci->csrows = kcalloc(tot_csrows, sizeof(*mci->csrows), GFP_KERNEL); |
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if (!mci->csrows) |
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return -ENOMEM; |
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|
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for (row = 0; row < tot_csrows; row++) { |
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struct csrow_info *csr; |
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|
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csr = kzalloc(sizeof(**mci->csrows), GFP_KERNEL); |
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if (!csr) |
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return -ENOMEM; |
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mci->csrows[row] = csr; |
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csr->csrow_idx = row; |
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csr->mci = mci; |
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csr->nr_channels = tot_channels; |
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csr->channels = kcalloc(tot_channels, sizeof(*csr->channels), |
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GFP_KERNEL); |
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if (!csr->channels) |
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return -ENOMEM; |
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|
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for (chn = 0; chn < tot_channels; chn++) { |
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struct rank_info *chan; |
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|
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chan = kzalloc(sizeof(**csr->channels), GFP_KERNEL); |
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if (!chan) |
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return -ENOMEM; |
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|
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csr->channels[chn] = chan; |
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chan->chan_idx = chn; |
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chan->csrow = csr; |
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} |
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} |
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|
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return 0; |
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} |
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|
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static int edac_mc_alloc_dimms(struct mem_ctl_info *mci) |
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{ |
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unsigned int pos[EDAC_MAX_LAYERS]; |
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unsigned int row, chn, idx; |
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int layer; |
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void *p; |
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|
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/* |
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* Allocate and fill the dimm structs |
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*/ |
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mci->dimms = kcalloc(mci->tot_dimms, sizeof(*mci->dimms), GFP_KERNEL); |
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if (!mci->dimms) |
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return -ENOMEM; |
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|
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memset(&pos, 0, sizeof(pos)); |
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row = 0; |
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chn = 0; |
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for (idx = 0; idx < mci->tot_dimms; idx++) { |
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struct dimm_info *dimm; |
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struct rank_info *chan; |
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int n, len; |
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|
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chan = mci->csrows[row]->channels[chn]; |
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|
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dimm = kzalloc(sizeof(**mci->dimms), GFP_KERNEL); |
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if (!dimm) |
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return -ENOMEM; |
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mci->dimms[idx] = dimm; |
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dimm->mci = mci; |
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dimm->idx = idx; |
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|
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/* |
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* Copy DIMM location and initialize it. |
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*/ |
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len = sizeof(dimm->label); |
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p = dimm->label; |
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n = snprintf(p, len, "mc#%u", mci->mc_idx); |
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p += n; |
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len -= n; |
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for (layer = 0; layer < mci->n_layers; layer++) { |
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n = snprintf(p, len, "%s#%u", |
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edac_layer_name[mci->layers[layer].type], |
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pos[layer]); |
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p += n; |
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len -= n; |
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dimm->location[layer] = pos[layer]; |
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|
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if (len <= 0) |
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break; |
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} |
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|
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/* Link it to the csrows old API data */ |
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chan->dimm = dimm; |
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dimm->csrow = row; |
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dimm->cschannel = chn; |
|
|
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/* Increment csrow location */ |
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if (mci->layers[0].is_virt_csrow) { |
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chn++; |
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if (chn == mci->num_cschannel) { |
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chn = 0; |
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row++; |
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} |
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} else { |
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row++; |
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if (row == mci->nr_csrows) { |
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row = 0; |
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chn++; |
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} |
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} |
|
|
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/* Increment dimm location */ |
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for (layer = mci->n_layers - 1; layer >= 0; layer--) { |
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pos[layer]++; |
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if (pos[layer] < mci->layers[layer].size) |
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break; |
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pos[layer] = 0; |
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} |
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} |
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|
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return 0; |
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} |
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|
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struct mem_ctl_info *edac_mc_alloc(unsigned int mc_num, |
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unsigned int n_layers, |
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struct edac_mc_layer *layers, |
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unsigned int sz_pvt) |
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{ |
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struct mem_ctl_info *mci; |
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struct edac_mc_layer *layer; |
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unsigned int idx, size, tot_dimms = 1; |
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unsigned int tot_csrows = 1, tot_channels = 1; |
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void *pvt, *ptr = NULL; |
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bool per_rank = false; |
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|
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if (WARN_ON(n_layers > EDAC_MAX_LAYERS || n_layers == 0)) |
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return NULL; |
|
|
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/* |
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* Calculate the total amount of dimms and csrows/cschannels while |
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* in the old API emulation mode |
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*/ |
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for (idx = 0; idx < n_layers; idx++) { |
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tot_dimms *= layers[idx].size; |
|
|
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if (layers[idx].is_virt_csrow) |
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tot_csrows *= layers[idx].size; |
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else |
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tot_channels *= layers[idx].size; |
|
|
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if (layers[idx].type == EDAC_MC_LAYER_CHIP_SELECT) |
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per_rank = true; |
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} |
|
|
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/* Figure out the offsets of the various items from the start of an mc |
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* structure. We want the alignment of each item to be at least as |
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* stringent as what the compiler would provide if we could simply |
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* hardcode everything into a single struct. |
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*/ |
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mci = edac_align_ptr(&ptr, sizeof(*mci), 1); |
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layer = edac_align_ptr(&ptr, sizeof(*layer), n_layers); |
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pvt = edac_align_ptr(&ptr, sz_pvt, 1); |
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size = ((unsigned long)pvt) + sz_pvt; |
|
|
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edac_dbg(1, "allocating %u bytes for mci data (%d %s, %d csrows/channels)\n", |
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size, |
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tot_dimms, |
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per_rank ? "ranks" : "dimms", |
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tot_csrows * tot_channels); |
|
|
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mci = kzalloc(size, GFP_KERNEL); |
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if (mci == NULL) |
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return NULL; |
|
|
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mci->dev.release = mci_release; |
|
device_initialize(&mci->dev); |
|
|
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/* Adjust pointers so they point within the memory we just allocated |
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* rather than an imaginary chunk of memory located at address 0. |
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*/ |
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layer = (struct edac_mc_layer *)(((char *)mci) + ((unsigned long)layer)); |
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pvt = sz_pvt ? (((char *)mci) + ((unsigned long)pvt)) : NULL; |
|
|
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/* setup index and various internal pointers */ |
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mci->mc_idx = mc_num; |
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mci->tot_dimms = tot_dimms; |
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mci->pvt_info = pvt; |
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mci->n_layers = n_layers; |
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mci->layers = layer; |
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memcpy(mci->layers, layers, sizeof(*layer) * n_layers); |
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mci->nr_csrows = tot_csrows; |
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mci->num_cschannel = tot_channels; |
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mci->csbased = per_rank; |
|
|
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if (edac_mc_alloc_csrows(mci)) |
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goto error; |
|
|
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if (edac_mc_alloc_dimms(mci)) |
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goto error; |
|
|
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mci->op_state = OP_ALLOC; |
|
|
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return mci; |
|
|
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error: |
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_edac_mc_free(mci); |
|
|
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return NULL; |
|
} |
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EXPORT_SYMBOL_GPL(edac_mc_alloc); |
|
|
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void edac_mc_free(struct mem_ctl_info *mci) |
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{ |
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edac_dbg(1, "\n"); |
|
|
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_edac_mc_free(mci); |
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} |
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EXPORT_SYMBOL_GPL(edac_mc_free); |
|
|
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bool edac_has_mcs(void) |
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{ |
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bool ret; |
|
|
|
mutex_lock(&mem_ctls_mutex); |
|
|
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ret = list_empty(&mc_devices); |
|
|
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mutex_unlock(&mem_ctls_mutex); |
|
|
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return !ret; |
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} |
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EXPORT_SYMBOL_GPL(edac_has_mcs); |
|
|
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/* Caller must hold mem_ctls_mutex */ |
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static struct mem_ctl_info *__find_mci_by_dev(struct device *dev) |
|
{ |
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struct mem_ctl_info *mci; |
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struct list_head *item; |
|
|
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edac_dbg(3, "\n"); |
|
|
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list_for_each(item, &mc_devices) { |
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mci = list_entry(item, struct mem_ctl_info, link); |
|
|
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if (mci->pdev == dev) |
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return mci; |
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} |
|
|
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return NULL; |
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} |
|
|
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/** |
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* find_mci_by_dev |
|
* |
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* scan list of controllers looking for the one that manages |
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* the 'dev' device |
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* @dev: pointer to a struct device related with the MCI |
|
*/ |
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struct mem_ctl_info *find_mci_by_dev(struct device *dev) |
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{ |
|
struct mem_ctl_info *ret; |
|
|
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mutex_lock(&mem_ctls_mutex); |
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ret = __find_mci_by_dev(dev); |
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mutex_unlock(&mem_ctls_mutex); |
|
|
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return ret; |
|
} |
|
EXPORT_SYMBOL_GPL(find_mci_by_dev); |
|
|
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/* |
|
* edac_mc_workq_function |
|
* performs the operation scheduled by a workq request |
|
*/ |
|
static void edac_mc_workq_function(struct work_struct *work_req) |
|
{ |
|
struct delayed_work *d_work = to_delayed_work(work_req); |
|
struct mem_ctl_info *mci = to_edac_mem_ctl_work(d_work); |
|
|
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mutex_lock(&mem_ctls_mutex); |
|
|
|
if (mci->op_state != OP_RUNNING_POLL) { |
|
mutex_unlock(&mem_ctls_mutex); |
|
return; |
|
} |
|
|
|
if (edac_op_state == EDAC_OPSTATE_POLL) |
|
mci->edac_check(mci); |
|
|
|
mutex_unlock(&mem_ctls_mutex); |
|
|
|
/* Queue ourselves again. */ |
|
edac_queue_work(&mci->work, msecs_to_jiffies(edac_mc_get_poll_msec())); |
|
} |
|
|
|
/* |
|
* edac_mc_reset_delay_period(unsigned long value) |
|
* |
|
* user space has updated our poll period value, need to |
|
* reset our workq delays |
|
*/ |
|
void edac_mc_reset_delay_period(unsigned long value) |
|
{ |
|
struct mem_ctl_info *mci; |
|
struct list_head *item; |
|
|
|
mutex_lock(&mem_ctls_mutex); |
|
|
|
list_for_each(item, &mc_devices) { |
|
mci = list_entry(item, struct mem_ctl_info, link); |
|
|
|
if (mci->op_state == OP_RUNNING_POLL) |
|
edac_mod_work(&mci->work, value); |
|
} |
|
mutex_unlock(&mem_ctls_mutex); |
|
} |
|
|
|
|
|
|
|
/* Return 0 on success, 1 on failure. |
|
* Before calling this function, caller must |
|
* assign a unique value to mci->mc_idx. |
|
* |
|
* locking model: |
|
* |
|
* called with the mem_ctls_mutex lock held |
|
*/ |
|
static int add_mc_to_global_list(struct mem_ctl_info *mci) |
|
{ |
|
struct list_head *item, *insert_before; |
|
struct mem_ctl_info *p; |
|
|
|
insert_before = &mc_devices; |
|
|
|
p = __find_mci_by_dev(mci->pdev); |
|
if (unlikely(p != NULL)) |
|
goto fail0; |
|
|
|
list_for_each(item, &mc_devices) { |
|
p = list_entry(item, struct mem_ctl_info, link); |
|
|
|
if (p->mc_idx >= mci->mc_idx) { |
|
if (unlikely(p->mc_idx == mci->mc_idx)) |
|
goto fail1; |
|
|
|
insert_before = item; |
|
break; |
|
} |
|
} |
|
|
|
list_add_tail_rcu(&mci->link, insert_before); |
|
return 0; |
|
|
|
fail0: |
|
edac_printk(KERN_WARNING, EDAC_MC, |
|
"%s (%s) %s %s already assigned %d\n", dev_name(p->pdev), |
|
edac_dev_name(mci), p->mod_name, p->ctl_name, p->mc_idx); |
|
return 1; |
|
|
|
fail1: |
|
edac_printk(KERN_WARNING, EDAC_MC, |
|
"bug in low-level driver: attempt to assign\n" |
|
" duplicate mc_idx %d in %s()\n", p->mc_idx, __func__); |
|
return 1; |
|
} |
|
|
|
static int del_mc_from_global_list(struct mem_ctl_info *mci) |
|
{ |
|
list_del_rcu(&mci->link); |
|
|
|
/* these are for safe removal of devices from global list while |
|
* NMI handlers may be traversing list |
|
*/ |
|
synchronize_rcu(); |
|
INIT_LIST_HEAD(&mci->link); |
|
|
|
return list_empty(&mc_devices); |
|
} |
|
|
|
struct mem_ctl_info *edac_mc_find(int idx) |
|
{ |
|
struct mem_ctl_info *mci; |
|
struct list_head *item; |
|
|
|
mutex_lock(&mem_ctls_mutex); |
|
|
|
list_for_each(item, &mc_devices) { |
|
mci = list_entry(item, struct mem_ctl_info, link); |
|
if (mci->mc_idx == idx) |
|
goto unlock; |
|
} |
|
|
|
mci = NULL; |
|
unlock: |
|
mutex_unlock(&mem_ctls_mutex); |
|
return mci; |
|
} |
|
EXPORT_SYMBOL(edac_mc_find); |
|
|
|
const char *edac_get_owner(void) |
|
{ |
|
return edac_mc_owner; |
|
} |
|
EXPORT_SYMBOL_GPL(edac_get_owner); |
|
|
|
/* FIXME - should a warning be printed if no error detection? correction? */ |
|
int edac_mc_add_mc_with_groups(struct mem_ctl_info *mci, |
|
const struct attribute_group **groups) |
|
{ |
|
int ret = -EINVAL; |
|
edac_dbg(0, "\n"); |
|
|
|
#ifdef CONFIG_EDAC_DEBUG |
|
if (edac_debug_level >= 3) |
|
edac_mc_dump_mci(mci); |
|
|
|
if (edac_debug_level >= 4) { |
|
struct dimm_info *dimm; |
|
int i; |
|
|
|
for (i = 0; i < mci->nr_csrows; i++) { |
|
struct csrow_info *csrow = mci->csrows[i]; |
|
u32 nr_pages = 0; |
|
int j; |
|
|
|
for (j = 0; j < csrow->nr_channels; j++) |
|
nr_pages += csrow->channels[j]->dimm->nr_pages; |
|
if (!nr_pages) |
|
continue; |
|
edac_mc_dump_csrow(csrow); |
|
for (j = 0; j < csrow->nr_channels; j++) |
|
if (csrow->channels[j]->dimm->nr_pages) |
|
edac_mc_dump_channel(csrow->channels[j]); |
|
} |
|
|
|
mci_for_each_dimm(mci, dimm) |
|
edac_mc_dump_dimm(dimm); |
|
} |
|
#endif |
|
mutex_lock(&mem_ctls_mutex); |
|
|
|
if (edac_mc_owner && edac_mc_owner != mci->mod_name) { |
|
ret = -EPERM; |
|
goto fail0; |
|
} |
|
|
|
if (add_mc_to_global_list(mci)) |
|
goto fail0; |
|
|
|
/* set load time so that error rate can be tracked */ |
|
mci->start_time = jiffies; |
|
|
|
mci->bus = edac_get_sysfs_subsys(); |
|
|
|
if (edac_create_sysfs_mci_device(mci, groups)) { |
|
edac_mc_printk(mci, KERN_WARNING, |
|
"failed to create sysfs device\n"); |
|
goto fail1; |
|
} |
|
|
|
if (mci->edac_check) { |
|
mci->op_state = OP_RUNNING_POLL; |
|
|
|
INIT_DELAYED_WORK(&mci->work, edac_mc_workq_function); |
|
edac_queue_work(&mci->work, msecs_to_jiffies(edac_mc_get_poll_msec())); |
|
|
|
} else { |
|
mci->op_state = OP_RUNNING_INTERRUPT; |
|
} |
|
|
|
/* Report action taken */ |
|
edac_mc_printk(mci, KERN_INFO, |
|
"Giving out device to module %s controller %s: DEV %s (%s)\n", |
|
mci->mod_name, mci->ctl_name, mci->dev_name, |
|
edac_op_state_to_string(mci->op_state)); |
|
|
|
edac_mc_owner = mci->mod_name; |
|
|
|
mutex_unlock(&mem_ctls_mutex); |
|
return 0; |
|
|
|
fail1: |
|
del_mc_from_global_list(mci); |
|
|
|
fail0: |
|
mutex_unlock(&mem_ctls_mutex); |
|
return ret; |
|
} |
|
EXPORT_SYMBOL_GPL(edac_mc_add_mc_with_groups); |
|
|
|
struct mem_ctl_info *edac_mc_del_mc(struct device *dev) |
|
{ |
|
struct mem_ctl_info *mci; |
|
|
|
edac_dbg(0, "\n"); |
|
|
|
mutex_lock(&mem_ctls_mutex); |
|
|
|
/* find the requested mci struct in the global list */ |
|
mci = __find_mci_by_dev(dev); |
|
if (mci == NULL) { |
|
mutex_unlock(&mem_ctls_mutex); |
|
return NULL; |
|
} |
|
|
|
/* mark MCI offline: */ |
|
mci->op_state = OP_OFFLINE; |
|
|
|
if (del_mc_from_global_list(mci)) |
|
edac_mc_owner = NULL; |
|
|
|
mutex_unlock(&mem_ctls_mutex); |
|
|
|
if (mci->edac_check) |
|
edac_stop_work(&mci->work); |
|
|
|
/* remove from sysfs */ |
|
edac_remove_sysfs_mci_device(mci); |
|
|
|
edac_printk(KERN_INFO, EDAC_MC, |
|
"Removed device %d for %s %s: DEV %s\n", mci->mc_idx, |
|
mci->mod_name, mci->ctl_name, edac_dev_name(mci)); |
|
|
|
return mci; |
|
} |
|
EXPORT_SYMBOL_GPL(edac_mc_del_mc); |
|
|
|
static void edac_mc_scrub_block(unsigned long page, unsigned long offset, |
|
u32 size) |
|
{ |
|
struct page *pg; |
|
void *virt_addr; |
|
unsigned long flags = 0; |
|
|
|
edac_dbg(3, "\n"); |
|
|
|
/* ECC error page was not in our memory. Ignore it. */ |
|
if (!pfn_valid(page)) |
|
return; |
|
|
|
/* Find the actual page structure then map it and fix */ |
|
pg = pfn_to_page(page); |
|
|
|
if (PageHighMem(pg)) |
|
local_irq_save(flags); |
|
|
|
virt_addr = kmap_atomic(pg); |
|
|
|
/* Perform architecture specific atomic scrub operation */ |
|
edac_atomic_scrub(virt_addr + offset, size); |
|
|
|
/* Unmap and complete */ |
|
kunmap_atomic(virt_addr); |
|
|
|
if (PageHighMem(pg)) |
|
local_irq_restore(flags); |
|
} |
|
|
|
/* FIXME - should return -1 */ |
|
int edac_mc_find_csrow_by_page(struct mem_ctl_info *mci, unsigned long page) |
|
{ |
|
struct csrow_info **csrows = mci->csrows; |
|
int row, i, j, n; |
|
|
|
edac_dbg(1, "MC%d: 0x%lx\n", mci->mc_idx, page); |
|
row = -1; |
|
|
|
for (i = 0; i < mci->nr_csrows; i++) { |
|
struct csrow_info *csrow = csrows[i]; |
|
n = 0; |
|
for (j = 0; j < csrow->nr_channels; j++) { |
|
struct dimm_info *dimm = csrow->channels[j]->dimm; |
|
n += dimm->nr_pages; |
|
} |
|
if (n == 0) |
|
continue; |
|
|
|
edac_dbg(3, "MC%d: first(0x%lx) page(0x%lx) last(0x%lx) mask(0x%lx)\n", |
|
mci->mc_idx, |
|
csrow->first_page, page, csrow->last_page, |
|
csrow->page_mask); |
|
|
|
if ((page >= csrow->first_page) && |
|
(page <= csrow->last_page) && |
|
((page & csrow->page_mask) == |
|
(csrow->first_page & csrow->page_mask))) { |
|
row = i; |
|
break; |
|
} |
|
} |
|
|
|
if (row == -1) |
|
edac_mc_printk(mci, KERN_ERR, |
|
"could not look up page error address %lx\n", |
|
(unsigned long)page); |
|
|
|
return row; |
|
} |
|
EXPORT_SYMBOL_GPL(edac_mc_find_csrow_by_page); |
|
|
|
const char *edac_layer_name[] = { |
|
[EDAC_MC_LAYER_BRANCH] = "branch", |
|
[EDAC_MC_LAYER_CHANNEL] = "channel", |
|
[EDAC_MC_LAYER_SLOT] = "slot", |
|
[EDAC_MC_LAYER_CHIP_SELECT] = "csrow", |
|
[EDAC_MC_LAYER_ALL_MEM] = "memory", |
|
}; |
|
EXPORT_SYMBOL_GPL(edac_layer_name); |
|
|
|
static void edac_inc_ce_error(struct edac_raw_error_desc *e) |
|
{ |
|
int pos[EDAC_MAX_LAYERS] = { e->top_layer, e->mid_layer, e->low_layer }; |
|
struct mem_ctl_info *mci = error_desc_to_mci(e); |
|
struct dimm_info *dimm = edac_get_dimm(mci, pos[0], pos[1], pos[2]); |
|
|
|
mci->ce_mc += e->error_count; |
|
|
|
if (dimm) |
|
dimm->ce_count += e->error_count; |
|
else |
|
mci->ce_noinfo_count += e->error_count; |
|
} |
|
|
|
static void edac_inc_ue_error(struct edac_raw_error_desc *e) |
|
{ |
|
int pos[EDAC_MAX_LAYERS] = { e->top_layer, e->mid_layer, e->low_layer }; |
|
struct mem_ctl_info *mci = error_desc_to_mci(e); |
|
struct dimm_info *dimm = edac_get_dimm(mci, pos[0], pos[1], pos[2]); |
|
|
|
mci->ue_mc += e->error_count; |
|
|
|
if (dimm) |
|
dimm->ue_count += e->error_count; |
|
else |
|
mci->ue_noinfo_count += e->error_count; |
|
} |
|
|
|
static void edac_ce_error(struct edac_raw_error_desc *e) |
|
{ |
|
struct mem_ctl_info *mci = error_desc_to_mci(e); |
|
unsigned long remapped_page; |
|
|
|
if (edac_mc_get_log_ce()) { |
|
edac_mc_printk(mci, KERN_WARNING, |
|
"%d CE %s%son %s (%s page:0x%lx offset:0x%lx grain:%ld syndrome:0x%lx%s%s)\n", |
|
e->error_count, e->msg, |
|
*e->msg ? " " : "", |
|
e->label, e->location, e->page_frame_number, e->offset_in_page, |
|
e->grain, e->syndrome, |
|
*e->other_detail ? " - " : "", |
|
e->other_detail); |
|
} |
|
|
|
edac_inc_ce_error(e); |
|
|
|
if (mci->scrub_mode == SCRUB_SW_SRC) { |
|
/* |
|
* Some memory controllers (called MCs below) can remap |
|
* memory so that it is still available at a different |
|
* address when PCI devices map into memory. |
|
* MC's that can't do this, lose the memory where PCI |
|
* devices are mapped. This mapping is MC-dependent |
|
* and so we call back into the MC driver for it to |
|
* map the MC page to a physical (CPU) page which can |
|
* then be mapped to a virtual page - which can then |
|
* be scrubbed. |
|
*/ |
|
remapped_page = mci->ctl_page_to_phys ? |
|
mci->ctl_page_to_phys(mci, e->page_frame_number) : |
|
e->page_frame_number; |
|
|
|
edac_mc_scrub_block(remapped_page, e->offset_in_page, e->grain); |
|
} |
|
} |
|
|
|
static void edac_ue_error(struct edac_raw_error_desc *e) |
|
{ |
|
struct mem_ctl_info *mci = error_desc_to_mci(e); |
|
|
|
if (edac_mc_get_log_ue()) { |
|
edac_mc_printk(mci, KERN_WARNING, |
|
"%d UE %s%son %s (%s page:0x%lx offset:0x%lx grain:%ld%s%s)\n", |
|
e->error_count, e->msg, |
|
*e->msg ? " " : "", |
|
e->label, e->location, e->page_frame_number, e->offset_in_page, |
|
e->grain, |
|
*e->other_detail ? " - " : "", |
|
e->other_detail); |
|
} |
|
|
|
edac_inc_ue_error(e); |
|
|
|
if (edac_mc_get_panic_on_ue()) { |
|
panic("UE %s%son %s (%s page:0x%lx offset:0x%lx grain:%ld%s%s)\n", |
|
e->msg, |
|
*e->msg ? " " : "", |
|
e->label, e->location, e->page_frame_number, e->offset_in_page, |
|
e->grain, |
|
*e->other_detail ? " - " : "", |
|
e->other_detail); |
|
} |
|
} |
|
|
|
static void edac_inc_csrow(struct edac_raw_error_desc *e, int row, int chan) |
|
{ |
|
struct mem_ctl_info *mci = error_desc_to_mci(e); |
|
enum hw_event_mc_err_type type = e->type; |
|
u16 count = e->error_count; |
|
|
|
if (row < 0) |
|
return; |
|
|
|
edac_dbg(4, "csrow/channel to increment: (%d,%d)\n", row, chan); |
|
|
|
if (type == HW_EVENT_ERR_CORRECTED) { |
|
mci->csrows[row]->ce_count += count; |
|
if (chan >= 0) |
|
mci->csrows[row]->channels[chan]->ce_count += count; |
|
} else { |
|
mci->csrows[row]->ue_count += count; |
|
} |
|
} |
|
|
|
void edac_raw_mc_handle_error(struct edac_raw_error_desc *e) |
|
{ |
|
struct mem_ctl_info *mci = error_desc_to_mci(e); |
|
u8 grain_bits; |
|
|
|
/* Sanity-check driver-supplied grain value. */ |
|
if (WARN_ON_ONCE(!e->grain)) |
|
e->grain = 1; |
|
|
|
grain_bits = fls_long(e->grain - 1); |
|
|
|
/* Report the error via the trace interface */ |
|
if (IS_ENABLED(CONFIG_RAS)) |
|
trace_mc_event(e->type, e->msg, e->label, e->error_count, |
|
mci->mc_idx, e->top_layer, e->mid_layer, |
|
e->low_layer, |
|
(e->page_frame_number << PAGE_SHIFT) | e->offset_in_page, |
|
grain_bits, e->syndrome, e->other_detail); |
|
|
|
if (e->type == HW_EVENT_ERR_CORRECTED) |
|
edac_ce_error(e); |
|
else |
|
edac_ue_error(e); |
|
} |
|
EXPORT_SYMBOL_GPL(edac_raw_mc_handle_error); |
|
|
|
void edac_mc_handle_error(const enum hw_event_mc_err_type type, |
|
struct mem_ctl_info *mci, |
|
const u16 error_count, |
|
const unsigned long page_frame_number, |
|
const unsigned long offset_in_page, |
|
const unsigned long syndrome, |
|
const int top_layer, |
|
const int mid_layer, |
|
const int low_layer, |
|
const char *msg, |
|
const char *other_detail) |
|
{ |
|
struct dimm_info *dimm; |
|
char *p; |
|
int row = -1, chan = -1; |
|
int pos[EDAC_MAX_LAYERS] = { top_layer, mid_layer, low_layer }; |
|
int i, n_labels = 0; |
|
struct edac_raw_error_desc *e = &mci->error_desc; |
|
bool any_memory = true; |
|
|
|
edac_dbg(3, "MC%d\n", mci->mc_idx); |
|
|
|
/* Fills the error report buffer */ |
|
memset(e, 0, sizeof (*e)); |
|
e->error_count = error_count; |
|
e->type = type; |
|
e->top_layer = top_layer; |
|
e->mid_layer = mid_layer; |
|
e->low_layer = low_layer; |
|
e->page_frame_number = page_frame_number; |
|
e->offset_in_page = offset_in_page; |
|
e->syndrome = syndrome; |
|
/* need valid strings here for both: */ |
|
e->msg = msg ?: ""; |
|
e->other_detail = other_detail ?: ""; |
|
|
|
/* |
|
* Check if the event report is consistent and if the memory location is |
|
* known. If it is, the DIMM(s) label info will be filled and the DIMM's |
|
* error counters will be incremented. |
|
*/ |
|
for (i = 0; i < mci->n_layers; i++) { |
|
if (pos[i] >= (int)mci->layers[i].size) { |
|
|
|
edac_mc_printk(mci, KERN_ERR, |
|
"INTERNAL ERROR: %s value is out of range (%d >= %d)\n", |
|
edac_layer_name[mci->layers[i].type], |
|
pos[i], mci->layers[i].size); |
|
/* |
|
* Instead of just returning it, let's use what's |
|
* known about the error. The increment routines and |
|
* the DIMM filter logic will do the right thing by |
|
* pointing the likely damaged DIMMs. |
|
*/ |
|
pos[i] = -1; |
|
} |
|
if (pos[i] >= 0) |
|
any_memory = false; |
|
} |
|
|
|
/* |
|
* Get the dimm label/grain that applies to the match criteria. |
|
* As the error algorithm may not be able to point to just one memory |
|
* stick, the logic here will get all possible labels that could |
|
* pottentially be affected by the error. |
|
* On FB-DIMM memory controllers, for uncorrected errors, it is common |
|
* to have only the MC channel and the MC dimm (also called "branch") |
|
* but the channel is not known, as the memory is arranged in pairs, |
|
* where each memory belongs to a separate channel within the same |
|
* branch. |
|
*/ |
|
p = e->label; |
|
*p = '\0'; |
|
|
|
mci_for_each_dimm(mci, dimm) { |
|
if (top_layer >= 0 && top_layer != dimm->location[0]) |
|
continue; |
|
if (mid_layer >= 0 && mid_layer != dimm->location[1]) |
|
continue; |
|
if (low_layer >= 0 && low_layer != dimm->location[2]) |
|
continue; |
|
|
|
/* get the max grain, over the error match range */ |
|
if (dimm->grain > e->grain) |
|
e->grain = dimm->grain; |
|
|
|
/* |
|
* If the error is memory-controller wide, there's no need to |
|
* seek for the affected DIMMs because the whole channel/memory |
|
* controller/... may be affected. Also, don't show errors for |
|
* empty DIMM slots. |
|
*/ |
|
if (!dimm->nr_pages) |
|
continue; |
|
|
|
n_labels++; |
|
if (n_labels > EDAC_MAX_LABELS) { |
|
p = e->label; |
|
*p = '\0'; |
|
} else { |
|
if (p != e->label) { |
|
strcpy(p, OTHER_LABEL); |
|
p += strlen(OTHER_LABEL); |
|
} |
|
strcpy(p, dimm->label); |
|
p += strlen(p); |
|
} |
|
|
|
/* |
|
* get csrow/channel of the DIMM, in order to allow |
|
* incrementing the compat API counters |
|
*/ |
|
edac_dbg(4, "%s csrows map: (%d,%d)\n", |
|
mci->csbased ? "rank" : "dimm", |
|
dimm->csrow, dimm->cschannel); |
|
if (row == -1) |
|
row = dimm->csrow; |
|
else if (row >= 0 && row != dimm->csrow) |
|
row = -2; |
|
|
|
if (chan == -1) |
|
chan = dimm->cschannel; |
|
else if (chan >= 0 && chan != dimm->cschannel) |
|
chan = -2; |
|
} |
|
|
|
if (any_memory) |
|
strcpy(e->label, "any memory"); |
|
else if (!*e->label) |
|
strcpy(e->label, "unknown memory"); |
|
|
|
edac_inc_csrow(e, row, chan); |
|
|
|
/* Fill the RAM location data */ |
|
p = e->location; |
|
|
|
for (i = 0; i < mci->n_layers; i++) { |
|
if (pos[i] < 0) |
|
continue; |
|
|
|
p += sprintf(p, "%s:%d ", |
|
edac_layer_name[mci->layers[i].type], |
|
pos[i]); |
|
} |
|
if (p > e->location) |
|
*(p - 1) = '\0'; |
|
|
|
edac_raw_mc_handle_error(e); |
|
} |
|
EXPORT_SYMBOL_GPL(edac_mc_handle_error);
|
|
|