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75 lines
1.7 KiB
75 lines
1.7 KiB
// SPDX-License-Identifier: GPL-2.0 |
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/* |
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* arch/sh/kernel/cpu/sh3/clock-sh7710.c |
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* |
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* SH7710 support for the clock framework |
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* |
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* Copyright (C) 2005 Paul Mundt |
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* |
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* FRQCR parsing hacked out of arch/sh/kernel/time.c |
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* |
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* Copyright (C) 1999 Tetsuya Okada & Niibe Yutaka |
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* Copyright (C) 2000 Philipp Rumpf <[email protected]> |
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* Copyright (C) 2002, 2003, 2004 Paul Mundt |
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* Copyright (C) 2002 M. R. Brown <[email protected]> |
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*/ |
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#include <linux/init.h> |
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#include <linux/kernel.h> |
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#include <asm/clock.h> |
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#include <asm/freq.h> |
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#include <asm/io.h> |
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static int md_table[] = { 1, 2, 3, 4, 6, 8, 12 }; |
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static void master_clk_init(struct clk *clk) |
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{ |
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clk->rate *= md_table[__raw_readw(FRQCR) & 0x0007]; |
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} |
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static struct sh_clk_ops sh7710_master_clk_ops = { |
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.init = master_clk_init, |
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}; |
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static unsigned long module_clk_recalc(struct clk *clk) |
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{ |
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int idx = (__raw_readw(FRQCR) & 0x0007); |
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return clk->parent->rate / md_table[idx]; |
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} |
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static struct sh_clk_ops sh7710_module_clk_ops = { |
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.recalc = module_clk_recalc, |
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}; |
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static unsigned long bus_clk_recalc(struct clk *clk) |
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{ |
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int idx = (__raw_readw(FRQCR) & 0x0700) >> 8; |
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return clk->parent->rate / md_table[idx]; |
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} |
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static struct sh_clk_ops sh7710_bus_clk_ops = { |
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.recalc = bus_clk_recalc, |
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}; |
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static unsigned long cpu_clk_recalc(struct clk *clk) |
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{ |
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int idx = (__raw_readw(FRQCR) & 0x0070) >> 4; |
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return clk->parent->rate / md_table[idx]; |
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} |
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static struct sh_clk_ops sh7710_cpu_clk_ops = { |
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.recalc = cpu_clk_recalc, |
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}; |
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static struct sh_clk_ops *sh7710_clk_ops[] = { |
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&sh7710_master_clk_ops, |
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&sh7710_module_clk_ops, |
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&sh7710_bus_clk_ops, |
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&sh7710_cpu_clk_ops, |
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}; |
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void __init arch_init_clk_ops(struct sh_clk_ops **ops, int idx) |
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{ |
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if (idx < ARRAY_SIZE(sh7710_clk_ops)) |
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*ops = sh7710_clk_ops[idx]; |
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} |
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