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51 lines
1.4 KiB
51 lines
1.4 KiB
// SPDX-License-Identifier: GPL-2.0 |
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/* |
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* arch/sh/kernel/cpu/sh2a/opcode_helper.c |
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* |
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* Helper for the SH-2A 32-bit opcodes. |
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* |
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* Copyright (C) 2007 Paul Mundt |
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*/ |
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#include <linux/kernel.h> |
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/* |
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* Instructions on SH are generally fixed at 16-bits, however, SH-2A |
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* introduces some 32-bit instructions. Since there are no real |
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* constraints on their use (and they can be mixed and matched), we need |
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* to check the instruction encoding to work out if it's a true 32-bit |
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* instruction or not. |
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* |
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* Presently, 32-bit opcodes have only slight variations in what the |
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* actual encoding looks like in the first-half of the instruction, which |
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* makes it fairly straightforward to differentiate from the 16-bit ones. |
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* |
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* First 16-bits of encoding Used by |
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* |
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* 0011nnnnmmmm0001 mov.b, mov.w, mov.l, fmov.d, |
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* fmov.s, movu.b, movu.w |
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* |
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* 0011nnnn0iii1001 bclr.b, bld.b, bset.b, bst.b, band.b, |
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* bandnot.b, bldnot.b, bor.b, bornot.b, |
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* bxor.b |
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* |
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* 0000nnnniiii0000 movi20 |
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* 0000nnnniiii0001 movi20s |
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*/ |
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unsigned int instruction_size(unsigned int insn) |
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{ |
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/* Look for the common cases */ |
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switch ((insn & 0xf00f)) { |
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case 0x0000: /* movi20 */ |
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case 0x0001: /* movi20s */ |
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case 0x3001: /* 32-bit mov/fmov/movu variants */ |
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return 4; |
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} |
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/* And the special cases.. */ |
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switch ((insn & 0xf08f)) { |
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case 0x3009: /* 32-bit b*.b bit operations */ |
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return 4; |
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} |
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return 2; |
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}
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