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116 lines
3.5 KiB
116 lines
3.5 KiB
// SPDX-License-Identifier: GPL-2.0 |
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/* |
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* ip22-berr.c: Bus error handling. |
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* |
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* Copyright (C) 2002, 2003 Ladislav Michl ([email protected]) |
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*/ |
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#include <linux/init.h> |
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#include <linux/kernel.h> |
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#include <linux/sched/signal.h> |
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#include <asm/addrspace.h> |
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#include <asm/traps.h> |
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#include <asm/branch.h> |
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#include <asm/irq_regs.h> |
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#include <asm/sgi/mc.h> |
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#include <asm/sgi/hpc3.h> |
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#include <asm/sgi/ioc.h> |
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#include <asm/sgi/ip22.h> |
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static unsigned int cpu_err_stat; /* Status reg for CPU */ |
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static unsigned int gio_err_stat; /* Status reg for GIO */ |
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static unsigned int cpu_err_addr; /* Error address reg for CPU */ |
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static unsigned int gio_err_addr; /* Error address reg for GIO */ |
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static unsigned int extio_stat; |
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static unsigned int hpc3_berr_stat; /* Bus error interrupt status */ |
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static void save_and_clear_buserr(void) |
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{ |
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/* save status registers */ |
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cpu_err_addr = sgimc->cerr; |
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cpu_err_stat = sgimc->cstat; |
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gio_err_addr = sgimc->gerr; |
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gio_err_stat = sgimc->gstat; |
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extio_stat = ip22_is_fullhouse() ? sgioc->extio : (sgint->errstat << 4); |
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hpc3_berr_stat = hpc3c0->bestat; |
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sgimc->cstat = sgimc->gstat = 0; |
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} |
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#define GIO_ERRMASK 0xff00 |
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#define CPU_ERRMASK 0x3f00 |
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static void print_buserr(void) |
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{ |
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if (extio_stat & EXTIO_MC_BUSERR) |
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printk(KERN_ERR "MC Bus Error\n"); |
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if (extio_stat & EXTIO_HPC3_BUSERR) |
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printk(KERN_ERR "HPC3 Bus Error 0x%x:<id=0x%x,%s,lane=0x%x>\n", |
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hpc3_berr_stat, |
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(hpc3_berr_stat & HPC3_BESTAT_PIDMASK) >> |
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HPC3_BESTAT_PIDSHIFT, |
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(hpc3_berr_stat & HPC3_BESTAT_CTYPE) ? "PIO" : "DMA", |
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hpc3_berr_stat & HPC3_BESTAT_BLMASK); |
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if (extio_stat & EXTIO_EISA_BUSERR) |
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printk(KERN_ERR "EISA Bus Error\n"); |
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if (cpu_err_stat & CPU_ERRMASK) |
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printk(KERN_ERR "CPU error 0x%x<%s%s%s%s%s%s> @ 0x%08x\n", |
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cpu_err_stat, |
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cpu_err_stat & SGIMC_CSTAT_RD ? "RD " : "", |
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cpu_err_stat & SGIMC_CSTAT_PAR ? "PAR " : "", |
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cpu_err_stat & SGIMC_CSTAT_ADDR ? "ADDR " : "", |
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cpu_err_stat & SGIMC_CSTAT_SYSAD_PAR ? "SYSAD " : "", |
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cpu_err_stat & SGIMC_CSTAT_SYSCMD_PAR ? "SYSCMD " : "", |
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cpu_err_stat & SGIMC_CSTAT_BAD_DATA ? "BAD_DATA " : "", |
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cpu_err_addr); |
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if (gio_err_stat & GIO_ERRMASK) |
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printk(KERN_ERR "GIO error 0x%x:<%s%s%s%s%s%s%s%s> @ 0x%08x\n", |
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gio_err_stat, |
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gio_err_stat & SGIMC_GSTAT_RD ? "RD " : "", |
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gio_err_stat & SGIMC_GSTAT_WR ? "WR " : "", |
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gio_err_stat & SGIMC_GSTAT_TIME ? "TIME " : "", |
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gio_err_stat & SGIMC_GSTAT_PROM ? "PROM " : "", |
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gio_err_stat & SGIMC_GSTAT_ADDR ? "ADDR " : "", |
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gio_err_stat & SGIMC_GSTAT_BC ? "BC " : "", |
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gio_err_stat & SGIMC_GSTAT_PIO_RD ? "PIO_RD " : "", |
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gio_err_stat & SGIMC_GSTAT_PIO_WR ? "PIO_WR " : "", |
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gio_err_addr); |
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} |
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/* |
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* MC sends an interrupt whenever bus or parity errors occur. In addition, |
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* if the error happened during a CPU read, it also asserts the bus error |
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* pin on the R4K. Code in bus error handler save the MC bus error registers |
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* and then clear the interrupt when this happens. |
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*/ |
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void ip22_be_interrupt(int irq) |
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{ |
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const int field = 2 * sizeof(unsigned long); |
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struct pt_regs *regs = get_irq_regs(); |
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save_and_clear_buserr(); |
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print_buserr(); |
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printk(KERN_ALERT "%s bus error, epc == %0*lx, ra == %0*lx\n", |
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(regs->cp0_cause & 4) ? "Data" : "Instruction", |
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field, regs->cp0_epc, field, regs->regs[31]); |
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/* Assume it would be too dangerous to continue ... */ |
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die_if_kernel("Oops", regs); |
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force_sig(SIGBUS); |
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} |
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static int ip22_be_handler(struct pt_regs *regs, int is_fixup) |
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{ |
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save_and_clear_buserr(); |
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if (is_fixup) |
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return MIPS_BE_FIXUP; |
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print_buserr(); |
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return MIPS_BE_FATAL; |
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} |
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void __init ip22_be_init(void) |
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{ |
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board_be_handler = ip22_be_handler; |
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}
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