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73 lines
2.2 KiB
73 lines
2.2 KiB
/* |
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* This file is subject to the terms and conditions of the GNU General Public |
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* License. See the file "COPYING" in the main directory of this archive |
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* for more details. |
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* |
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* Copyright (C) 2002, 2004, 2007 by Ralf Baechle |
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* Copyright (C) 2007 Maciej W. Rozycki |
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*/ |
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#ifndef _ASM_WAR_H |
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#define _ASM_WAR_H |
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/* |
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* Work around certain R4000 CPU errata (as implemented by GCC): |
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* |
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* - A double-word or a variable shift may give an incorrect result |
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* if executed immediately after starting an integer division: |
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* "MIPS R4000PC/SC Errata, Processor Revision 2.2 and 3.0", |
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* erratum #28 |
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* "MIPS R4000MC Errata, Processor Revision 2.2 and 3.0", erratum |
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* #19 |
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* |
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* - A double-word or a variable shift may give an incorrect result |
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* if executed while an integer multiplication is in progress: |
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* "MIPS R4000PC/SC Errata, Processor Revision 2.2 and 3.0", |
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* errata #16 & #28 |
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* |
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* - An integer division may give an incorrect result if started in |
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* a delay slot of a taken branch or a jump: |
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* "MIPS R4000PC/SC Errata, Processor Revision 2.2 and 3.0", |
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* erratum #52 |
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*/ |
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#ifdef CONFIG_CPU_R4000_WORKAROUNDS |
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#define R4000_WAR 1 |
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#else |
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#define R4000_WAR 0 |
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#endif |
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/* |
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* Work around certain R4400 CPU errata (as implemented by GCC): |
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* |
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* - A double-word or a variable shift may give an incorrect result |
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* if executed immediately after starting an integer division: |
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* "MIPS R4400MC Errata, Processor Revision 1.0", erratum #10 |
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* "MIPS R4400MC Errata, Processor Revision 2.0 & 3.0", erratum #4 |
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*/ |
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#ifdef CONFIG_CPU_R4400_WORKAROUNDS |
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#define R4400_WAR 1 |
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#else |
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#define R4400_WAR 0 |
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#endif |
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/* |
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* Work around the "daddi" and "daddiu" CPU errata: |
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* |
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* - The `daddi' instruction fails to trap on overflow. |
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* "MIPS R4000PC/SC Errata, Processor Revision 2.2 and 3.0", |
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* erratum #23 |
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* |
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* - The `daddiu' instruction can produce an incorrect result. |
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* "MIPS R4000PC/SC Errata, Processor Revision 2.2 and 3.0", |
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* erratum #41 |
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* "MIPS R4000MC Errata, Processor Revision 2.2 and 3.0", erratum |
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* #15 |
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* "MIPS R4400PC/SC Errata, Processor Revision 1.0", erratum #7 |
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* "MIPS R4400MC Errata, Processor Revision 1.0", erratum #5 |
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*/ |
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#ifdef CONFIG_CPU_DADDI_WORKAROUNDS |
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#define DADDI_WAR 1 |
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#else |
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#define DADDI_WAR 0 |
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#endif |
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#endif /* _ASM_WAR_H */
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