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103 lines
3.0 KiB
103 lines
3.0 KiB
/* |
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* This file is subject to the terms and conditions of the GNU General Public |
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* License. See the file "COPYING" in the main directory of this archive |
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* for more details. |
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* |
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* Copyright (C) 1998, 1999, 2003 by Ralf Baechle |
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* Copyright (C) 2014 by Maciej W. Rozycki |
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*/ |
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#ifndef _ASM_TIMEX_H |
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#define _ASM_TIMEX_H |
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#ifdef __KERNEL__ |
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#include <linux/compiler.h> |
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#include <asm/cpu.h> |
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#include <asm/cpu-features.h> |
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#include <asm/mipsregs.h> |
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#include <asm/cpu-type.h> |
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/* |
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* This is the clock rate of the i8253 PIT. A MIPS system may not have |
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* a PIT by the symbol is used all over the kernel including some APIs. |
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* So keeping it defined to the number for the PIT is the only sane thing |
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* for now. |
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*/ |
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#define CLOCK_TICK_RATE 1193182 |
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/* |
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* Standard way to access the cycle counter. |
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* Currently only used on SMP for scheduling. |
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* |
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* Only the low 32 bits are available as a continuously counting entity. |
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* But this only means we'll force a reschedule every 8 seconds or so, |
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* which isn't an evil thing. |
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* |
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* We know that all SMP capable CPUs have cycle counters. |
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*/ |
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typedef unsigned int cycles_t; |
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/* |
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* On R4000/R4400 before version 5.0 an erratum exists such that if the |
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* cycle counter is read in the exact moment that it is matching the |
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* compare register, no interrupt will be generated. |
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* |
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* There is a suggested workaround and also the erratum can't strike if |
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* the compare interrupt isn't being used as the clock source device. |
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* However for now the implementaton of this function doesn't get these |
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* fine details right. |
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*/ |
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static inline int can_use_mips_counter(unsigned int prid) |
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{ |
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int comp = (prid & PRID_COMP_MASK) != PRID_COMP_LEGACY; |
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if (__builtin_constant_p(cpu_has_counter) && !cpu_has_counter) |
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return 0; |
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else if (__builtin_constant_p(cpu_has_mips_r) && cpu_has_mips_r) |
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return 1; |
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else if (likely(!__builtin_constant_p(cpu_has_mips_r) && comp)) |
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return 1; |
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/* Make sure we don't peek at cpu_data[0].options in the fast path! */ |
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if (!__builtin_constant_p(cpu_has_counter)) |
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asm volatile("" : "=m" (cpu_data[0].options)); |
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if (likely(cpu_has_counter && |
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prid >= (PRID_IMP_R4000 | PRID_REV_ENCODE_44(5, 0)))) |
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return 1; |
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else |
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return 0; |
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} |
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static inline cycles_t get_cycles(void) |
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{ |
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if (can_use_mips_counter(read_c0_prid())) |
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return read_c0_count(); |
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else |
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return 0; /* no usable counter */ |
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} |
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/* |
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* Like get_cycles - but where c0_count is not available we desperately |
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* use c0_random in an attempt to get at least a little bit of entropy. |
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* |
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* R6000 and R6000A neither have a count register nor a random register. |
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* That leaves no entropy source in the CPU itself. |
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*/ |
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static inline unsigned long random_get_entropy(void) |
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{ |
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unsigned int prid = read_c0_prid(); |
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unsigned int imp = prid & PRID_IMP_MASK; |
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if (can_use_mips_counter(prid)) |
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return read_c0_count(); |
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else if (likely(imp != PRID_IMP_R6000 && imp != PRID_IMP_R6000A)) |
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return read_c0_random(); |
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else |
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return 0; /* no usable register */ |
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} |
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#define random_get_entropy random_get_entropy |
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#endif /* __KERNEL__ */ |
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#endif /* _ASM_TIMEX_H */
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