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84 lines
3.1 KiB
84 lines
3.1 KiB
/* |
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* Copyright 2003-2011 NetLogic Microsystems, Inc. (NetLogic). All rights |
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* reserved. |
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* |
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* This software is available to you under a choice of one of two |
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* licenses. You may choose to be licensed under the terms of the GNU |
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* General Public License (GPL) Version 2, available from the file |
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* COPYING in the main directory of this source tree, or the NetLogic |
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* license below: |
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* |
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* Redistribution and use in source and binary forms, with or without |
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* modification, are permitted provided that the following conditions |
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* are met: |
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* |
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* 1. Redistributions of source code must retain the above copyright |
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* notice, this list of conditions and the following disclaimer. |
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* 2. Redistributions in binary form must reproduce the above copyright |
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* notice, this list of conditions and the following disclaimer in |
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* the documentation and/or other materials provided with the |
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* distribution. |
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* |
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* THIS SOFTWARE IS PROVIDED BY NETLOGIC ``AS IS'' AND ANY EXPRESS OR |
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* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED |
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* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE |
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* ARE DISCLAIMED. IN NO EVENT SHALL NETLOGIC OR CONTRIBUTORS BE LIABLE |
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR |
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF |
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR |
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* BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, |
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* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE |
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* OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN |
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* IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
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*/ |
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#ifndef ASM_RMI_MSIDEF_H |
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#define ASM_RMI_MSIDEF_H |
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/* |
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* Constants for Intel APIC based MSI messages. |
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* Adapted for the RMI XLR using identical defines |
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*/ |
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/* |
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* Shifts for MSI data |
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*/ |
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#define MSI_DATA_VECTOR_SHIFT 0 |
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#define MSI_DATA_VECTOR_MASK 0x000000ff |
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#define MSI_DATA_VECTOR(v) (((v) << MSI_DATA_VECTOR_SHIFT) & \ |
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MSI_DATA_VECTOR_MASK) |
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#define MSI_DATA_DELIVERY_MODE_SHIFT 8 |
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#define MSI_DATA_DELIVERY_FIXED (0 << MSI_DATA_DELIVERY_MODE_SHIFT) |
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#define MSI_DATA_DELIVERY_LOWPRI (1 << MSI_DATA_DELIVERY_MODE_SHIFT) |
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#define MSI_DATA_LEVEL_SHIFT 14 |
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#define MSI_DATA_LEVEL_DEASSERT (0 << MSI_DATA_LEVEL_SHIFT) |
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#define MSI_DATA_LEVEL_ASSERT (1 << MSI_DATA_LEVEL_SHIFT) |
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#define MSI_DATA_TRIGGER_SHIFT 15 |
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#define MSI_DATA_TRIGGER_EDGE (0 << MSI_DATA_TRIGGER_SHIFT) |
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#define MSI_DATA_TRIGGER_LEVEL (1 << MSI_DATA_TRIGGER_SHIFT) |
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/* |
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* Shift/mask fields for msi address |
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*/ |
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#define MSI_ADDR_BASE_HI 0 |
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#define MSI_ADDR_BASE_LO 0xfee00000 |
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#define MSI_ADDR_DEST_MODE_SHIFT 2 |
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#define MSI_ADDR_DEST_MODE_PHYSICAL (0 << MSI_ADDR_DEST_MODE_SHIFT) |
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#define MSI_ADDR_DEST_MODE_LOGICAL (1 << MSI_ADDR_DEST_MODE_SHIFT) |
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#define MSI_ADDR_REDIRECTION_SHIFT 3 |
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#define MSI_ADDR_REDIRECTION_CPU (0 << MSI_ADDR_REDIRECTION_SHIFT) |
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#define MSI_ADDR_REDIRECTION_LOWPRI (1 << MSI_ADDR_REDIRECTION_SHIFT) |
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#define MSI_ADDR_DEST_ID_SHIFT 12 |
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#define MSI_ADDR_DEST_ID_MASK 0x00ffff0 |
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#define MSI_ADDR_DEST_ID(dest) (((dest) << MSI_ADDR_DEST_ID_SHIFT) & \ |
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MSI_ADDR_DEST_ID_MASK) |
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#endif /* ASM_RMI_MSIDEF_H */
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