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74 lines
2.6 KiB
74 lines
2.6 KiB
/* |
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* Copyright 2003-2011 NetLogic Microsystems, Inc. (NetLogic). All rights |
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* reserved. |
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* |
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* This software is available to you under a choice of one of two |
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* licenses. You may choose to be licensed under the terms of the GNU |
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* General Public License (GPL) Version 2, available from the file |
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* COPYING in the main directory of this source tree, or the NetLogic |
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* license below: |
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* |
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* Redistribution and use in source and binary forms, with or without |
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* modification, are permitted provided that the following conditions |
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* are met: |
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* |
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* 1. Redistributions of source code must retain the above copyright |
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* notice, this list of conditions and the following disclaimer. |
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* 2. Redistributions in binary form must reproduce the above copyright |
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* notice, this list of conditions and the following disclaimer in |
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* the documentation and/or other materials provided with the |
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* distribution. |
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* |
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* THIS SOFTWARE IS PROVIDED BY NETLOGIC ``AS IS'' AND ANY EXPRESS OR |
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* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED |
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* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE |
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* ARE DISCLAIMED. IN NO EVENT SHALL NETLOGIC OR CONTRIBUTORS BE LIABLE |
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR |
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF |
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR |
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* BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, |
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* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE |
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* OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN |
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* IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
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*/ |
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#ifndef _ASM_NLM_GPIO_H |
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#define _ASM_NLM_GPIO_H |
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#define GPIO_INT_EN_REG 0 |
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#define GPIO_INPUT_INVERSION_REG 1 |
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#define GPIO_IO_DIR_REG 2 |
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#define GPIO_IO_DATA_WR_REG 3 |
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#define GPIO_IO_DATA_RD_REG 4 |
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#define GPIO_SWRESET_REG 8 |
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#define GPIO_DRAM1_CNTRL_REG 9 |
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#define GPIO_DRAM1_RATIO_REG 10 |
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#define GPIO_DRAM1_RESET_REG 11 |
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#define GPIO_DRAM1_STATUS_REG 12 |
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#define GPIO_DRAM2_CNTRL_REG 13 |
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#define GPIO_DRAM2_RATIO_REG 14 |
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#define GPIO_DRAM2_RESET_REG 15 |
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#define GPIO_DRAM2_STATUS_REG 16 |
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#define GPIO_PWRON_RESET_CFG_REG 21 |
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#define GPIO_BIST_ALL_GO_STATUS_REG 24 |
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#define GPIO_BIST_CPU_GO_STATUS_REG 25 |
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#define GPIO_BIST_DEV_GO_STATUS_REG 26 |
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#define GPIO_FUSE_BANK_REG 35 |
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#define GPIO_CPU_RESET_REG 40 |
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#define GPIO_RNG_REG 43 |
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#define PWRON_RESET_PCMCIA_BOOT 17 |
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#define GPIO_LED_BITMAP 0x1700000 |
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#define GPIO_LED_0_SHIFT 20 |
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#define GPIO_LED_1_SHIFT 24 |
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#define GPIO_LED_OUTPUT_CODE_RESET 0x01 |
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#define GPIO_LED_OUTPUT_CODE_HARD_RESET 0x02 |
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#define GPIO_LED_OUTPUT_CODE_SOFT_RESET 0x03 |
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#define GPIO_LED_OUTPUT_CODE_MAIN 0x04 |
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#endif
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