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34 lines
805 B
34 lines
805 B
/* SPDX-License-Identifier: GPL-2.0-only */ |
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/* |
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* |
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* Copyright (C) 2015 John Crispin <[email protected]> |
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*/ |
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#ifndef _MT7621_REGS_H_ |
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#define _MT7621_REGS_H_ |
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#define MT7621_PALMBUS_BASE 0x1C000000 |
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#define MT7621_PALMBUS_SIZE 0x03FFFFFF |
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#define MT7621_SYSC_BASE 0x1E000000 |
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#define SYSC_REG_CHIP_NAME0 0x00 |
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#define SYSC_REG_CHIP_NAME1 0x04 |
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#define SYSC_REG_CHIP_REV 0x0c |
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#define SYSC_REG_SYSTEM_CONFIG0 0x10 |
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#define SYSC_REG_SYSTEM_CONFIG1 0x14 |
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#define CHIP_REV_PKG_MASK 0x1 |
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#define CHIP_REV_PKG_SHIFT 16 |
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#define CHIP_REV_VER_MASK 0xf |
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#define CHIP_REV_VER_SHIFT 8 |
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#define CHIP_REV_ECO_MASK 0xf |
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#define MT7621_DRAM_BASE 0x0 |
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#define MT7621_DDR2_SIZE_MIN 32 |
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#define MT7621_DDR2_SIZE_MAX 256 |
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#define MT7621_CHIP_NAME0 0x3637544D |
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#define MT7621_CHIP_NAME1 0x20203132 |
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#endif
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