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463 lines
11 KiB
463 lines
11 KiB
/* |
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* This file is subject to the terms and conditions of the GNU General Public |
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* License. See the file "COPYING" in the main directory of this archive |
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* for more details. |
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* |
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* Copyright (c) 1994 - 1997, 99, 2000, 06, 07 Ralf Baechle ([email protected]) |
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* Copyright (c) 1999, 2000 Silicon Graphics, Inc. |
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*/ |
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#ifndef _ASM_BITOPS_H |
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#define _ASM_BITOPS_H |
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#ifndef _LINUX_BITOPS_H |
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#error only <linux/bitops.h> can be included directly |
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#endif |
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#include <linux/bits.h> |
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#include <linux/compiler.h> |
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#include <linux/types.h> |
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#include <asm/barrier.h> |
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#include <asm/byteorder.h> /* sigh ... */ |
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#include <asm/compiler.h> |
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#include <asm/cpu-features.h> |
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#include <asm/isa-rev.h> |
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#include <asm/llsc.h> |
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#include <asm/sgidefs.h> |
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#include <asm/war.h> |
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#define __bit_op(mem, insn, inputs...) do { \ |
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unsigned long __temp; \ |
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\ |
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asm volatile( \ |
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" .set push \n" \ |
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" .set " MIPS_ISA_LEVEL " \n" \ |
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" " __SYNC(full, loongson3_war) " \n" \ |
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"1: " __LL "%0, %1 \n" \ |
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" " insn " \n" \ |
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" " __SC "%0, %1 \n" \ |
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" " __SC_BEQZ "%0, 1b \n" \ |
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" .set pop \n" \ |
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: "=&r"(__temp), "+" GCC_OFF_SMALL_ASM()(mem) \ |
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: inputs \ |
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: __LLSC_CLOBBER); \ |
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} while (0) |
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#define __test_bit_op(mem, ll_dst, insn, inputs...) ({ \ |
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unsigned long __orig, __temp; \ |
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\ |
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asm volatile( \ |
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" .set push \n" \ |
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" .set " MIPS_ISA_LEVEL " \n" \ |
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" " __SYNC(full, loongson3_war) " \n" \ |
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"1: " __LL ll_dst ", %2 \n" \ |
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" " insn " \n" \ |
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" " __SC "%1, %2 \n" \ |
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" " __SC_BEQZ "%1, 1b \n" \ |
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" .set pop \n" \ |
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: "=&r"(__orig), "=&r"(__temp), \ |
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"+" GCC_OFF_SMALL_ASM()(mem) \ |
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: inputs \ |
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: __LLSC_CLOBBER); \ |
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\ |
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__orig; \ |
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}) |
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/* |
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* These are the "slower" versions of the functions and are in bitops.c. |
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* These functions call raw_local_irq_{save,restore}(). |
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*/ |
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void __mips_set_bit(unsigned long nr, volatile unsigned long *addr); |
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void __mips_clear_bit(unsigned long nr, volatile unsigned long *addr); |
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void __mips_change_bit(unsigned long nr, volatile unsigned long *addr); |
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int __mips_test_and_set_bit_lock(unsigned long nr, |
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volatile unsigned long *addr); |
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int __mips_test_and_clear_bit(unsigned long nr, |
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volatile unsigned long *addr); |
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int __mips_test_and_change_bit(unsigned long nr, |
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volatile unsigned long *addr); |
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/* |
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* set_bit - Atomically set a bit in memory |
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* @nr: the bit to set |
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* @addr: the address to start counting from |
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* |
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* This function is atomic and may not be reordered. See __set_bit() |
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* if you do not require the atomic guarantees. |
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* Note that @nr may be almost arbitrarily large; this function is not |
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* restricted to acting on a single-word quantity. |
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*/ |
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static inline void set_bit(unsigned long nr, volatile unsigned long *addr) |
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{ |
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volatile unsigned long *m = &addr[BIT_WORD(nr)]; |
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int bit = nr % BITS_PER_LONG; |
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if (!kernel_uses_llsc) { |
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__mips_set_bit(nr, addr); |
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return; |
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} |
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if ((MIPS_ISA_REV >= 2) && __builtin_constant_p(bit) && (bit >= 16)) { |
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__bit_op(*m, __INS "%0, %3, %2, 1", "i"(bit), "r"(~0)); |
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return; |
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} |
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__bit_op(*m, "or\t%0, %2", "ir"(BIT(bit))); |
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} |
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/* |
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* clear_bit - Clears a bit in memory |
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* @nr: Bit to clear |
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* @addr: Address to start counting from |
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* |
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* clear_bit() is atomic and may not be reordered. However, it does |
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* not contain a memory barrier, so if it is used for locking purposes, |
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* you should call smp_mb__before_atomic() and/or smp_mb__after_atomic() |
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* in order to ensure changes are visible on other processors. |
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*/ |
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static inline void clear_bit(unsigned long nr, volatile unsigned long *addr) |
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{ |
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volatile unsigned long *m = &addr[BIT_WORD(nr)]; |
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int bit = nr % BITS_PER_LONG; |
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if (!kernel_uses_llsc) { |
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__mips_clear_bit(nr, addr); |
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return; |
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} |
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if ((MIPS_ISA_REV >= 2) && __builtin_constant_p(bit)) { |
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__bit_op(*m, __INS "%0, $0, %2, 1", "i"(bit)); |
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return; |
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} |
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__bit_op(*m, "and\t%0, %2", "ir"(~BIT(bit))); |
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} |
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/* |
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* clear_bit_unlock - Clears a bit in memory |
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* @nr: Bit to clear |
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* @addr: Address to start counting from |
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* |
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* clear_bit() is atomic and implies release semantics before the memory |
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* operation. It can be used for an unlock. |
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*/ |
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static inline void clear_bit_unlock(unsigned long nr, volatile unsigned long *addr) |
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{ |
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smp_mb__before_atomic(); |
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clear_bit(nr, addr); |
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} |
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/* |
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* change_bit - Toggle a bit in memory |
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* @nr: Bit to change |
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* @addr: Address to start counting from |
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* |
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* change_bit() is atomic and may not be reordered. |
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* Note that @nr may be almost arbitrarily large; this function is not |
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* restricted to acting on a single-word quantity. |
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*/ |
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static inline void change_bit(unsigned long nr, volatile unsigned long *addr) |
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{ |
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volatile unsigned long *m = &addr[BIT_WORD(nr)]; |
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int bit = nr % BITS_PER_LONG; |
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if (!kernel_uses_llsc) { |
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__mips_change_bit(nr, addr); |
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return; |
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} |
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__bit_op(*m, "xor\t%0, %2", "ir"(BIT(bit))); |
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} |
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/* |
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* test_and_set_bit_lock - Set a bit and return its old value |
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* @nr: Bit to set |
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* @addr: Address to count from |
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* |
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* This operation is atomic and implies acquire ordering semantics |
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* after the memory operation. |
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*/ |
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static inline int test_and_set_bit_lock(unsigned long nr, |
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volatile unsigned long *addr) |
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{ |
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volatile unsigned long *m = &addr[BIT_WORD(nr)]; |
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int bit = nr % BITS_PER_LONG; |
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unsigned long res, orig; |
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if (!kernel_uses_llsc) { |
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res = __mips_test_and_set_bit_lock(nr, addr); |
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} else { |
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orig = __test_bit_op(*m, "%0", |
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"or\t%1, %0, %3", |
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"ir"(BIT(bit))); |
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res = (orig & BIT(bit)) != 0; |
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} |
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smp_llsc_mb(); |
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return res; |
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} |
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/* |
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* test_and_set_bit - Set a bit and return its old value |
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* @nr: Bit to set |
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* @addr: Address to count from |
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* |
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* This operation is atomic and cannot be reordered. |
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* It also implies a memory barrier. |
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*/ |
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static inline int test_and_set_bit(unsigned long nr, |
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volatile unsigned long *addr) |
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{ |
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smp_mb__before_atomic(); |
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return test_and_set_bit_lock(nr, addr); |
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} |
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/* |
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* test_and_clear_bit - Clear a bit and return its old value |
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* @nr: Bit to clear |
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* @addr: Address to count from |
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* |
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* This operation is atomic and cannot be reordered. |
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* It also implies a memory barrier. |
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*/ |
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static inline int test_and_clear_bit(unsigned long nr, |
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volatile unsigned long *addr) |
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{ |
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volatile unsigned long *m = &addr[BIT_WORD(nr)]; |
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int bit = nr % BITS_PER_LONG; |
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unsigned long res, orig; |
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smp_mb__before_atomic(); |
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if (!kernel_uses_llsc) { |
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res = __mips_test_and_clear_bit(nr, addr); |
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} else if ((MIPS_ISA_REV >= 2) && __builtin_constant_p(nr)) { |
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res = __test_bit_op(*m, "%1", |
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__EXT "%0, %1, %3, 1;" |
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__INS "%1, $0, %3, 1", |
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"i"(bit)); |
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} else { |
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orig = __test_bit_op(*m, "%0", |
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"or\t%1, %0, %3;" |
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"xor\t%1, %1, %3", |
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"ir"(BIT(bit))); |
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res = (orig & BIT(bit)) != 0; |
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} |
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smp_llsc_mb(); |
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return res; |
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} |
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/* |
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* test_and_change_bit - Change a bit and return its old value |
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* @nr: Bit to change |
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* @addr: Address to count from |
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* |
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* This operation is atomic and cannot be reordered. |
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* It also implies a memory barrier. |
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*/ |
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static inline int test_and_change_bit(unsigned long nr, |
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volatile unsigned long *addr) |
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{ |
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volatile unsigned long *m = &addr[BIT_WORD(nr)]; |
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int bit = nr % BITS_PER_LONG; |
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unsigned long res, orig; |
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smp_mb__before_atomic(); |
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if (!kernel_uses_llsc) { |
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res = __mips_test_and_change_bit(nr, addr); |
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} else { |
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orig = __test_bit_op(*m, "%0", |
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"xor\t%1, %0, %3", |
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"ir"(BIT(bit))); |
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res = (orig & BIT(bit)) != 0; |
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} |
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smp_llsc_mb(); |
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return res; |
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} |
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#undef __bit_op |
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#undef __test_bit_op |
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#include <asm-generic/bitops/non-atomic.h> |
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/* |
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* __clear_bit_unlock - Clears a bit in memory |
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* @nr: Bit to clear |
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* @addr: Address to start counting from |
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* |
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* __clear_bit() is non-atomic and implies release semantics before the memory |
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* operation. It can be used for an unlock if no other CPUs can concurrently |
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* modify other bits in the word. |
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*/ |
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static inline void __clear_bit_unlock(unsigned long nr, volatile unsigned long *addr) |
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{ |
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smp_mb__before_llsc(); |
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__clear_bit(nr, addr); |
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nudge_writes(); |
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} |
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/* |
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* Return the bit position (0..63) of the most significant 1 bit in a word |
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* Returns -1 if no 1 bit exists |
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*/ |
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static __always_inline unsigned long __fls(unsigned long word) |
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{ |
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int num; |
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if (BITS_PER_LONG == 32 && !__builtin_constant_p(word) && |
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__builtin_constant_p(cpu_has_clo_clz) && cpu_has_clo_clz) { |
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__asm__( |
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" .set push \n" |
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" .set "MIPS_ISA_LEVEL" \n" |
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" clz %0, %1 \n" |
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" .set pop \n" |
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: "=r" (num) |
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: "r" (word)); |
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return 31 - num; |
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} |
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if (BITS_PER_LONG == 64 && !__builtin_constant_p(word) && |
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__builtin_constant_p(cpu_has_mips64) && cpu_has_mips64) { |
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__asm__( |
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" .set push \n" |
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" .set "MIPS_ISA_LEVEL" \n" |
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" dclz %0, %1 \n" |
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" .set pop \n" |
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: "=r" (num) |
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: "r" (word)); |
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return 63 - num; |
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} |
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num = BITS_PER_LONG - 1; |
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#if BITS_PER_LONG == 64 |
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if (!(word & (~0ul << 32))) { |
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num -= 32; |
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word <<= 32; |
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} |
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#endif |
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if (!(word & (~0ul << (BITS_PER_LONG-16)))) { |
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num -= 16; |
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word <<= 16; |
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} |
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if (!(word & (~0ul << (BITS_PER_LONG-8)))) { |
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num -= 8; |
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word <<= 8; |
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} |
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if (!(word & (~0ul << (BITS_PER_LONG-4)))) { |
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num -= 4; |
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word <<= 4; |
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} |
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if (!(word & (~0ul << (BITS_PER_LONG-2)))) { |
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num -= 2; |
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word <<= 2; |
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} |
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if (!(word & (~0ul << (BITS_PER_LONG-1)))) |
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num -= 1; |
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return num; |
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} |
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/* |
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* __ffs - find first bit in word. |
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* @word: The word to search |
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* |
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* Returns 0..SZLONG-1 |
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* Undefined if no bit exists, so code should check against 0 first. |
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*/ |
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static __always_inline unsigned long __ffs(unsigned long word) |
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{ |
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return __fls(word & -word); |
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} |
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/* |
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* fls - find last bit set. |
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* @word: The word to search |
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* |
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* This is defined the same way as ffs. |
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* Note fls(0) = 0, fls(1) = 1, fls(0x80000000) = 32. |
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*/ |
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static inline int fls(unsigned int x) |
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{ |
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int r; |
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if (!__builtin_constant_p(x) && |
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__builtin_constant_p(cpu_has_clo_clz) && cpu_has_clo_clz) { |
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__asm__( |
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" .set push \n" |
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" .set "MIPS_ISA_LEVEL" \n" |
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" clz %0, %1 \n" |
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" .set pop \n" |
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: "=r" (x) |
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: "r" (x)); |
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return 32 - x; |
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} |
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r = 32; |
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if (!x) |
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return 0; |
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if (!(x & 0xffff0000u)) { |
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x <<= 16; |
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r -= 16; |
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} |
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if (!(x & 0xff000000u)) { |
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x <<= 8; |
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r -= 8; |
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} |
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if (!(x & 0xf0000000u)) { |
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x <<= 4; |
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r -= 4; |
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} |
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if (!(x & 0xc0000000u)) { |
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x <<= 2; |
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r -= 2; |
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} |
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if (!(x & 0x80000000u)) { |
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x <<= 1; |
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r -= 1; |
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} |
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return r; |
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} |
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#include <asm-generic/bitops/fls64.h> |
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/* |
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* ffs - find first bit set. |
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* @word: The word to search |
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* |
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* This is defined the same way as |
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* the libc and compiler builtin ffs routines, therefore |
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* differs in spirit from the below ffz (man ffs). |
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*/ |
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static inline int ffs(int word) |
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{ |
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if (!word) |
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return 0; |
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return fls(word & -word); |
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} |
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#include <asm-generic/bitops/ffz.h> |
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#include <asm-generic/bitops/find.h> |
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#ifdef __KERNEL__ |
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#include <asm-generic/bitops/sched.h> |
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#include <asm/arch_hweight.h> |
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#include <asm-generic/bitops/const_hweight.h> |
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#include <asm-generic/bitops/le.h> |
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#include <asm-generic/bitops/ext2-atomic.h> |
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#endif /* __KERNEL__ */ |
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#endif /* _ASM_BITOPS_H */
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