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844 lines
20 KiB
844 lines
20 KiB
// SPDX-License-Identifier: GPL-2.0-only |
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/* |
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* SMP boot-related support |
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* |
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* Copyright (C) 1998-2003, 2005 Hewlett-Packard Co |
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* David Mosberger-Tang <[email protected]> |
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* Copyright (C) 2001, 2004-2005 Intel Corp |
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* Rohit Seth <[email protected]> |
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* Suresh Siddha <[email protected]> |
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* Gordon Jin <[email protected]> |
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* Ashok Raj <[email protected]> |
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* |
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* 01/05/16 Rohit Seth <[email protected]> Moved SMP booting functions from smp.c to here. |
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* 01/04/27 David Mosberger <[email protected]> Added ITC synching code. |
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* 02/07/31 David Mosberger <[email protected]> Switch over to hotplug-CPU boot-sequence. |
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* smp_boot_cpus()/smp_commence() is replaced by |
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* smp_prepare_cpus()/__cpu_up()/smp_cpus_done(). |
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* 04/06/21 Ashok Raj <[email protected]> Added CPU Hotplug Support |
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* 04/12/26 Jin Gordon <[email protected]> |
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* 04/12/26 Rohit Seth <[email protected]> |
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* Add multi-threading and multi-core detection |
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* 05/01/30 Suresh Siddha <[email protected]> |
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* Setup cpu_sibling_map and cpu_core_map |
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*/ |
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|
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#include <linux/module.h> |
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#include <linux/acpi.h> |
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#include <linux/memblock.h> |
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#include <linux/cpu.h> |
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#include <linux/delay.h> |
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#include <linux/init.h> |
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#include <linux/interrupt.h> |
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#include <linux/irq.h> |
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#include <linux/kernel.h> |
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#include <linux/kernel_stat.h> |
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#include <linux/mm.h> |
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#include <linux/notifier.h> |
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#include <linux/smp.h> |
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#include <linux/spinlock.h> |
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#include <linux/efi.h> |
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#include <linux/percpu.h> |
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#include <linux/bitops.h> |
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#include <linux/atomic.h> |
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#include <asm/cache.h> |
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#include <asm/current.h> |
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#include <asm/delay.h> |
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#include <asm/efi.h> |
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#include <asm/io.h> |
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#include <asm/irq.h> |
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#include <asm/mca.h> |
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#include <asm/page.h> |
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#include <asm/processor.h> |
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#include <asm/ptrace.h> |
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#include <asm/sal.h> |
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#include <asm/tlbflush.h> |
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#include <asm/unistd.h> |
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|
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#define SMP_DEBUG 0 |
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|
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#if SMP_DEBUG |
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#define Dprintk(x...) printk(x) |
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#else |
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#define Dprintk(x...) |
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#endif |
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#ifdef CONFIG_HOTPLUG_CPU |
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#ifdef CONFIG_PERMIT_BSP_REMOVE |
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#define bsp_remove_ok 1 |
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#else |
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#define bsp_remove_ok 0 |
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#endif |
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/* |
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* Global array allocated for NR_CPUS at boot time |
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*/ |
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struct sal_to_os_boot sal_boot_rendez_state[NR_CPUS]; |
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|
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/* |
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* start_ap in head.S uses this to store current booting cpu |
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* info. |
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*/ |
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struct sal_to_os_boot *sal_state_for_booting_cpu = &sal_boot_rendez_state[0]; |
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#define set_brendez_area(x) (sal_state_for_booting_cpu = &sal_boot_rendez_state[(x)]); |
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#else |
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#define set_brendez_area(x) |
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#endif |
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/* |
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* ITC synchronization related stuff: |
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*/ |
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#define MASTER (0) |
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#define SLAVE (SMP_CACHE_BYTES/8) |
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#define NUM_ROUNDS 64 /* magic value */ |
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#define NUM_ITERS 5 /* likewise */ |
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static DEFINE_SPINLOCK(itc_sync_lock); |
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static volatile unsigned long go[SLAVE + 1]; |
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#define DEBUG_ITC_SYNC 0 |
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extern void start_ap (void); |
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extern unsigned long ia64_iobase; |
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struct task_struct *task_for_booting_cpu; |
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|
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/* |
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* State for each CPU |
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*/ |
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DEFINE_PER_CPU(int, cpu_state); |
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cpumask_t cpu_core_map[NR_CPUS] __cacheline_aligned; |
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EXPORT_SYMBOL(cpu_core_map); |
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DEFINE_PER_CPU_SHARED_ALIGNED(cpumask_t, cpu_sibling_map); |
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EXPORT_PER_CPU_SYMBOL(cpu_sibling_map); |
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int smp_num_siblings = 1; |
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/* which logical CPU number maps to which CPU (physical APIC ID) */ |
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volatile int ia64_cpu_to_sapicid[NR_CPUS]; |
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EXPORT_SYMBOL(ia64_cpu_to_sapicid); |
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static cpumask_t cpu_callin_map; |
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struct smp_boot_data smp_boot_data __initdata; |
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unsigned long ap_wakeup_vector = -1; /* External Int use to wakeup APs */ |
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char __initdata no_int_routing; |
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unsigned char smp_int_redirect; /* are INT and IPI redirectable by the chipset? */ |
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#ifdef CONFIG_FORCE_CPEI_RETARGET |
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#define CPEI_OVERRIDE_DEFAULT (1) |
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#else |
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#define CPEI_OVERRIDE_DEFAULT (0) |
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#endif |
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unsigned int force_cpei_retarget = CPEI_OVERRIDE_DEFAULT; |
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static int __init |
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cmdl_force_cpei(char *str) |
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{ |
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int value=0; |
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get_option (&str, &value); |
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force_cpei_retarget = value; |
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return 1; |
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} |
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__setup("force_cpei=", cmdl_force_cpei); |
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static int __init |
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nointroute (char *str) |
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{ |
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no_int_routing = 1; |
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printk ("no_int_routing on\n"); |
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return 1; |
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} |
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__setup("nointroute", nointroute); |
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static void fix_b0_for_bsp(void) |
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{ |
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#ifdef CONFIG_HOTPLUG_CPU |
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int cpuid; |
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static int fix_bsp_b0 = 1; |
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cpuid = smp_processor_id(); |
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/* |
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* Cache the b0 value on the first AP that comes up |
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*/ |
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if (!(fix_bsp_b0 && cpuid)) |
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return; |
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sal_boot_rendez_state[0].br[0] = sal_boot_rendez_state[cpuid].br[0]; |
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printk ("Fixed BSP b0 value from CPU %d\n", cpuid); |
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fix_bsp_b0 = 0; |
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#endif |
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} |
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void |
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sync_master (void *arg) |
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{ |
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unsigned long flags, i; |
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go[MASTER] = 0; |
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local_irq_save(flags); |
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{ |
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for (i = 0; i < NUM_ROUNDS*NUM_ITERS; ++i) { |
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while (!go[MASTER]) |
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cpu_relax(); |
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go[MASTER] = 0; |
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go[SLAVE] = ia64_get_itc(); |
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} |
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} |
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local_irq_restore(flags); |
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} |
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/* |
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* Return the number of cycles by which our itc differs from the itc on the master |
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* (time-keeper) CPU. A positive number indicates our itc is ahead of the master, |
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* negative that it is behind. |
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*/ |
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static inline long |
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get_delta (long *rt, long *master) |
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{ |
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unsigned long best_t0 = 0, best_t1 = ~0UL, best_tm = 0; |
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unsigned long tcenter, t0, t1, tm; |
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long i; |
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for (i = 0; i < NUM_ITERS; ++i) { |
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t0 = ia64_get_itc(); |
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go[MASTER] = 1; |
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while (!(tm = go[SLAVE])) |
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cpu_relax(); |
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go[SLAVE] = 0; |
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t1 = ia64_get_itc(); |
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if (t1 - t0 < best_t1 - best_t0) |
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best_t0 = t0, best_t1 = t1, best_tm = tm; |
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} |
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*rt = best_t1 - best_t0; |
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*master = best_tm - best_t0; |
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/* average best_t0 and best_t1 without overflow: */ |
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tcenter = (best_t0/2 + best_t1/2); |
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if (best_t0 % 2 + best_t1 % 2 == 2) |
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++tcenter; |
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return tcenter - best_tm; |
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} |
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/* |
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* Synchronize ar.itc of the current (slave) CPU with the ar.itc of the MASTER CPU |
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* (normally the time-keeper CPU). We use a closed loop to eliminate the possibility of |
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* unaccounted-for errors (such as getting a machine check in the middle of a calibration |
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* step). The basic idea is for the slave to ask the master what itc value it has and to |
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* read its own itc before and after the master responds. Each iteration gives us three |
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* timestamps: |
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* |
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* slave master |
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* |
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* t0 ---\ |
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* ---\ |
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* ---> |
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* tm |
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* /--- |
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* /--- |
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* t1 <--- |
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* |
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* |
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* The goal is to adjust the slave's ar.itc such that tm falls exactly half-way between t0 |
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* and t1. If we achieve this, the clocks are synchronized provided the interconnect |
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* between the slave and the master is symmetric. Even if the interconnect were |
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* asymmetric, we would still know that the synchronization error is smaller than the |
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* roundtrip latency (t0 - t1). |
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* |
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* When the interconnect is quiet and symmetric, this lets us synchronize the itc to |
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* within one or two cycles. However, we can only *guarantee* that the synchronization is |
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* accurate to within a round-trip time, which is typically in the range of several |
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* hundred cycles (e.g., ~500 cycles). In practice, this means that the itc's are usually |
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* almost perfectly synchronized, but we shouldn't assume that the accuracy is much better |
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* than half a micro second or so. |
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*/ |
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void |
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ia64_sync_itc (unsigned int master) |
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{ |
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long i, delta, adj, adjust_latency = 0, done = 0; |
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unsigned long flags, rt, master_time_stamp, bound; |
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#if DEBUG_ITC_SYNC |
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struct { |
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long rt; /* roundtrip time */ |
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long master; /* master's timestamp */ |
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long diff; /* difference between midpoint and master's timestamp */ |
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long lat; /* estimate of itc adjustment latency */ |
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} t[NUM_ROUNDS]; |
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#endif |
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/* |
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* Make sure local timer ticks are disabled while we sync. If |
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* they were enabled, we'd have to worry about nasty issues |
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* like setting the ITC ahead of (or a long time before) the |
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* next scheduled tick. |
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*/ |
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BUG_ON((ia64_get_itv() & (1 << 16)) == 0); |
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go[MASTER] = 1; |
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if (smp_call_function_single(master, sync_master, NULL, 0) < 0) { |
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printk(KERN_ERR "sync_itc: failed to get attention of CPU %u!\n", master); |
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return; |
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} |
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while (go[MASTER]) |
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cpu_relax(); /* wait for master to be ready */ |
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spin_lock_irqsave(&itc_sync_lock, flags); |
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{ |
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for (i = 0; i < NUM_ROUNDS; ++i) { |
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delta = get_delta(&rt, &master_time_stamp); |
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if (delta == 0) { |
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done = 1; /* let's lock on to this... */ |
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bound = rt; |
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} |
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if (!done) { |
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if (i > 0) { |
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adjust_latency += -delta; |
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adj = -delta + adjust_latency/4; |
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} else |
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adj = -delta; |
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ia64_set_itc(ia64_get_itc() + adj); |
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} |
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#if DEBUG_ITC_SYNC |
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t[i].rt = rt; |
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t[i].master = master_time_stamp; |
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t[i].diff = delta; |
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t[i].lat = adjust_latency/4; |
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#endif |
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} |
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} |
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spin_unlock_irqrestore(&itc_sync_lock, flags); |
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#if DEBUG_ITC_SYNC |
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for (i = 0; i < NUM_ROUNDS; ++i) |
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printk("rt=%5ld master=%5ld diff=%5ld adjlat=%5ld\n", |
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t[i].rt, t[i].master, t[i].diff, t[i].lat); |
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#endif |
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printk(KERN_INFO "CPU %d: synchronized ITC with CPU %u (last diff %ld cycles, " |
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"maxerr %lu cycles)\n", smp_processor_id(), master, delta, rt); |
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} |
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/* |
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* Ideally sets up per-cpu profiling hooks. Doesn't do much now... |
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*/ |
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static inline void smp_setup_percpu_timer(void) |
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{ |
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} |
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static void |
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smp_callin (void) |
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{ |
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int cpuid, phys_id, itc_master; |
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struct cpuinfo_ia64 *last_cpuinfo, *this_cpuinfo; |
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extern void ia64_init_itm(void); |
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extern volatile int time_keeper_id; |
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cpuid = smp_processor_id(); |
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phys_id = hard_smp_processor_id(); |
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itc_master = time_keeper_id; |
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if (cpu_online(cpuid)) { |
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printk(KERN_ERR "huh, phys CPU#0x%x, CPU#0x%x already present??\n", |
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phys_id, cpuid); |
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BUG(); |
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} |
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fix_b0_for_bsp(); |
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/* |
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* numa_node_id() works after this. |
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*/ |
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set_numa_node(cpu_to_node_map[cpuid]); |
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set_numa_mem(local_memory_node(cpu_to_node_map[cpuid])); |
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spin_lock(&vector_lock); |
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/* Setup the per cpu irq handling data structures */ |
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__setup_vector_irq(cpuid); |
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notify_cpu_starting(cpuid); |
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set_cpu_online(cpuid, true); |
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per_cpu(cpu_state, cpuid) = CPU_ONLINE; |
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spin_unlock(&vector_lock); |
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smp_setup_percpu_timer(); |
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ia64_mca_cmc_vector_setup(); /* Setup vector on AP */ |
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local_irq_enable(); |
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if (!(sal_platform_features & IA64_SAL_PLATFORM_FEATURE_ITC_DRIFT)) { |
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/* |
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* Synchronize the ITC with the BP. Need to do this after irqs are |
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* enabled because ia64_sync_itc() calls smp_call_function_single(), which |
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* calls spin_unlock_bh(), which calls spin_unlock_bh(), which calls |
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* local_bh_enable(), which bugs out if irqs are not enabled... |
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*/ |
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Dprintk("Going to syncup ITC with ITC Master.\n"); |
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ia64_sync_itc(itc_master); |
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} |
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/* |
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* Get our bogomips. |
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*/ |
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ia64_init_itm(); |
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/* |
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* Delay calibration can be skipped if new processor is identical to the |
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* previous processor. |
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*/ |
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last_cpuinfo = cpu_data(cpuid - 1); |
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this_cpuinfo = local_cpu_data; |
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if (last_cpuinfo->itc_freq != this_cpuinfo->itc_freq || |
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last_cpuinfo->proc_freq != this_cpuinfo->proc_freq || |
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last_cpuinfo->features != this_cpuinfo->features || |
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last_cpuinfo->revision != this_cpuinfo->revision || |
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last_cpuinfo->family != this_cpuinfo->family || |
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last_cpuinfo->archrev != this_cpuinfo->archrev || |
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last_cpuinfo->model != this_cpuinfo->model) |
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calibrate_delay(); |
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local_cpu_data->loops_per_jiffy = loops_per_jiffy; |
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/* |
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* Allow the master to continue. |
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*/ |
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cpumask_set_cpu(cpuid, &cpu_callin_map); |
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Dprintk("Stack on CPU %d at about %p\n",cpuid, &cpuid); |
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} |
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/* |
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* Activate a secondary processor. head.S calls this. |
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*/ |
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int |
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start_secondary (void *unused) |
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{ |
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/* Early console may use I/O ports */ |
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ia64_set_kr(IA64_KR_IO_BASE, __pa(ia64_iobase)); |
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#ifndef CONFIG_PRINTK_TIME |
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Dprintk("start_secondary: starting CPU 0x%x\n", hard_smp_processor_id()); |
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#endif |
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efi_map_pal_code(); |
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cpu_init(); |
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preempt_disable(); |
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smp_callin(); |
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cpu_startup_entry(CPUHP_AP_ONLINE_IDLE); |
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return 0; |
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} |
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static int |
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do_boot_cpu (int sapicid, int cpu, struct task_struct *idle) |
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{ |
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int timeout; |
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task_for_booting_cpu = idle; |
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Dprintk("Sending wakeup vector %lu to AP 0x%x/0x%x.\n", ap_wakeup_vector, cpu, sapicid); |
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set_brendez_area(cpu); |
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ia64_send_ipi(cpu, ap_wakeup_vector, IA64_IPI_DM_INT, 0); |
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/* |
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* Wait 10s total for the AP to start |
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*/ |
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Dprintk("Waiting on callin_map ..."); |
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for (timeout = 0; timeout < 100000; timeout++) { |
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if (cpumask_test_cpu(cpu, &cpu_callin_map)) |
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break; /* It has booted */ |
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barrier(); /* Make sure we re-read cpu_callin_map */ |
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udelay(100); |
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} |
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Dprintk("\n"); |
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if (!cpumask_test_cpu(cpu, &cpu_callin_map)) { |
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printk(KERN_ERR "Processor 0x%x/0x%x is stuck.\n", cpu, sapicid); |
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ia64_cpu_to_sapicid[cpu] = -1; |
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set_cpu_online(cpu, false); /* was set in smp_callin() */ |
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return -EINVAL; |
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} |
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return 0; |
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} |
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static int __init |
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decay (char *str) |
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{ |
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int ticks; |
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get_option (&str, &ticks); |
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return 1; |
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} |
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|
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__setup("decay=", decay); |
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|
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/* |
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* Initialize the logical CPU number to SAPICID mapping |
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*/ |
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void __init |
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smp_build_cpu_map (void) |
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{ |
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int sapicid, cpu, i; |
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int boot_cpu_id = hard_smp_processor_id(); |
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|
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for (cpu = 0; cpu < NR_CPUS; cpu++) { |
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ia64_cpu_to_sapicid[cpu] = -1; |
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} |
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ia64_cpu_to_sapicid[0] = boot_cpu_id; |
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init_cpu_present(cpumask_of(0)); |
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set_cpu_possible(0, true); |
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for (cpu = 1, i = 0; i < smp_boot_data.cpu_count; i++) { |
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sapicid = smp_boot_data.cpu_phys_id[i]; |
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if (sapicid == boot_cpu_id) |
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continue; |
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set_cpu_present(cpu, true); |
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set_cpu_possible(cpu, true); |
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ia64_cpu_to_sapicid[cpu] = sapicid; |
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cpu++; |
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} |
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} |
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|
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/* |
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* Cycle through the APs sending Wakeup IPIs to boot each. |
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*/ |
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void __init |
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smp_prepare_cpus (unsigned int max_cpus) |
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{ |
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int boot_cpu_id = hard_smp_processor_id(); |
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|
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/* |
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* Initialize the per-CPU profiling counter/multiplier |
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*/ |
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smp_setup_percpu_timer(); |
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cpumask_set_cpu(0, &cpu_callin_map); |
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local_cpu_data->loops_per_jiffy = loops_per_jiffy; |
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ia64_cpu_to_sapicid[0] = boot_cpu_id; |
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printk(KERN_INFO "Boot processor id 0x%x/0x%x\n", 0, boot_cpu_id); |
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current_thread_info()->cpu = 0; |
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|
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/* |
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* If SMP should be disabled, then really disable it! |
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*/ |
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if (!max_cpus) { |
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printk(KERN_INFO "SMP mode deactivated.\n"); |
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init_cpu_online(cpumask_of(0)); |
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init_cpu_present(cpumask_of(0)); |
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init_cpu_possible(cpumask_of(0)); |
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return; |
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} |
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} |
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|
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void smp_prepare_boot_cpu(void) |
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{ |
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set_cpu_online(smp_processor_id(), true); |
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cpumask_set_cpu(smp_processor_id(), &cpu_callin_map); |
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set_numa_node(cpu_to_node_map[smp_processor_id()]); |
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per_cpu(cpu_state, smp_processor_id()) = CPU_ONLINE; |
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} |
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|
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#ifdef CONFIG_HOTPLUG_CPU |
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static inline void |
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clear_cpu_sibling_map(int cpu) |
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{ |
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int i; |
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|
|
for_each_cpu(i, &per_cpu(cpu_sibling_map, cpu)) |
|
cpumask_clear_cpu(cpu, &per_cpu(cpu_sibling_map, i)); |
|
for_each_cpu(i, &cpu_core_map[cpu]) |
|
cpumask_clear_cpu(cpu, &cpu_core_map[i]); |
|
|
|
per_cpu(cpu_sibling_map, cpu) = cpu_core_map[cpu] = CPU_MASK_NONE; |
|
} |
|
|
|
static void |
|
remove_siblinginfo(int cpu) |
|
{ |
|
int last = 0; |
|
|
|
if (cpu_data(cpu)->threads_per_core == 1 && |
|
cpu_data(cpu)->cores_per_socket == 1) { |
|
cpumask_clear_cpu(cpu, &cpu_core_map[cpu]); |
|
cpumask_clear_cpu(cpu, &per_cpu(cpu_sibling_map, cpu)); |
|
return; |
|
} |
|
|
|
last = (cpumask_weight(&cpu_core_map[cpu]) == 1 ? 1 : 0); |
|
|
|
/* remove it from all sibling map's */ |
|
clear_cpu_sibling_map(cpu); |
|
} |
|
|
|
extern void fixup_irqs(void); |
|
|
|
int migrate_platform_irqs(unsigned int cpu) |
|
{ |
|
int new_cpei_cpu; |
|
struct irq_data *data = NULL; |
|
const struct cpumask *mask; |
|
int retval = 0; |
|
|
|
/* |
|
* dont permit CPEI target to removed. |
|
*/ |
|
if (cpe_vector > 0 && is_cpu_cpei_target(cpu)) { |
|
printk ("CPU (%d) is CPEI Target\n", cpu); |
|
if (can_cpei_retarget()) { |
|
/* |
|
* Now re-target the CPEI to a different processor |
|
*/ |
|
new_cpei_cpu = cpumask_any(cpu_online_mask); |
|
mask = cpumask_of(new_cpei_cpu); |
|
set_cpei_target_cpu(new_cpei_cpu); |
|
data = irq_get_irq_data(ia64_cpe_irq); |
|
/* |
|
* Switch for now, immediately, we need to do fake intr |
|
* as other interrupts, but need to study CPEI behaviour with |
|
* polling before making changes. |
|
*/ |
|
if (data && data->chip) { |
|
data->chip->irq_disable(data); |
|
data->chip->irq_set_affinity(data, mask, false); |
|
data->chip->irq_enable(data); |
|
printk ("Re-targeting CPEI to cpu %d\n", new_cpei_cpu); |
|
} |
|
} |
|
if (!data) { |
|
printk ("Unable to retarget CPEI, offline cpu [%d] failed\n", cpu); |
|
retval = -EBUSY; |
|
} |
|
} |
|
return retval; |
|
} |
|
|
|
/* must be called with cpucontrol mutex held */ |
|
int __cpu_disable(void) |
|
{ |
|
int cpu = smp_processor_id(); |
|
|
|
/* |
|
* dont permit boot processor for now |
|
*/ |
|
if (cpu == 0 && !bsp_remove_ok) { |
|
printk ("Your platform does not support removal of BSP\n"); |
|
return (-EBUSY); |
|
} |
|
|
|
set_cpu_online(cpu, false); |
|
|
|
if (migrate_platform_irqs(cpu)) { |
|
set_cpu_online(cpu, true); |
|
return -EBUSY; |
|
} |
|
|
|
remove_siblinginfo(cpu); |
|
fixup_irqs(); |
|
local_flush_tlb_all(); |
|
cpumask_clear_cpu(cpu, &cpu_callin_map); |
|
return 0; |
|
} |
|
|
|
void __cpu_die(unsigned int cpu) |
|
{ |
|
unsigned int i; |
|
|
|
for (i = 0; i < 100; i++) { |
|
/* They ack this in play_dead by setting CPU_DEAD */ |
|
if (per_cpu(cpu_state, cpu) == CPU_DEAD) |
|
{ |
|
printk ("CPU %d is now offline\n", cpu); |
|
return; |
|
} |
|
msleep(100); |
|
} |
|
printk(KERN_ERR "CPU %u didn't die...\n", cpu); |
|
} |
|
#endif /* CONFIG_HOTPLUG_CPU */ |
|
|
|
void |
|
smp_cpus_done (unsigned int dummy) |
|
{ |
|
int cpu; |
|
unsigned long bogosum = 0; |
|
|
|
/* |
|
* Allow the user to impress friends. |
|
*/ |
|
|
|
for_each_online_cpu(cpu) { |
|
bogosum += cpu_data(cpu)->loops_per_jiffy; |
|
} |
|
|
|
printk(KERN_INFO "Total of %d processors activated (%lu.%02lu BogoMIPS).\n", |
|
(int)num_online_cpus(), bogosum/(500000/HZ), (bogosum/(5000/HZ))%100); |
|
} |
|
|
|
static inline void set_cpu_sibling_map(int cpu) |
|
{ |
|
int i; |
|
|
|
for_each_online_cpu(i) { |
|
if ((cpu_data(cpu)->socket_id == cpu_data(i)->socket_id)) { |
|
cpumask_set_cpu(i, &cpu_core_map[cpu]); |
|
cpumask_set_cpu(cpu, &cpu_core_map[i]); |
|
if (cpu_data(cpu)->core_id == cpu_data(i)->core_id) { |
|
cpumask_set_cpu(i, |
|
&per_cpu(cpu_sibling_map, cpu)); |
|
cpumask_set_cpu(cpu, |
|
&per_cpu(cpu_sibling_map, i)); |
|
} |
|
} |
|
} |
|
} |
|
|
|
int |
|
__cpu_up(unsigned int cpu, struct task_struct *tidle) |
|
{ |
|
int ret; |
|
int sapicid; |
|
|
|
sapicid = ia64_cpu_to_sapicid[cpu]; |
|
if (sapicid == -1) |
|
return -EINVAL; |
|
|
|
/* |
|
* Already booted cpu? not valid anymore since we dont |
|
* do idle loop tightspin anymore. |
|
*/ |
|
if (cpumask_test_cpu(cpu, &cpu_callin_map)) |
|
return -EINVAL; |
|
|
|
per_cpu(cpu_state, cpu) = CPU_UP_PREPARE; |
|
/* Processor goes to start_secondary(), sets online flag */ |
|
ret = do_boot_cpu(sapicid, cpu, tidle); |
|
if (ret < 0) |
|
return ret; |
|
|
|
if (cpu_data(cpu)->threads_per_core == 1 && |
|
cpu_data(cpu)->cores_per_socket == 1) { |
|
cpumask_set_cpu(cpu, &per_cpu(cpu_sibling_map, cpu)); |
|
cpumask_set_cpu(cpu, &cpu_core_map[cpu]); |
|
return 0; |
|
} |
|
|
|
set_cpu_sibling_map(cpu); |
|
|
|
return 0; |
|
} |
|
|
|
/* |
|
* Assume that CPUs have been discovered by some platform-dependent interface. For |
|
* SoftSDV/Lion, that would be ACPI. |
|
* |
|
* Setup of the IPI irq handler is done in irq.c:init_IRQ_SMP(). |
|
*/ |
|
void __init |
|
init_smp_config(void) |
|
{ |
|
struct fptr { |
|
unsigned long fp; |
|
unsigned long gp; |
|
} *ap_startup; |
|
long sal_ret; |
|
|
|
/* Tell SAL where to drop the APs. */ |
|
ap_startup = (struct fptr *) start_ap; |
|
sal_ret = ia64_sal_set_vectors(SAL_VECTOR_OS_BOOT_RENDEZ, |
|
ia64_tpa(ap_startup->fp), ia64_tpa(ap_startup->gp), 0, 0, 0, 0); |
|
if (sal_ret < 0) |
|
printk(KERN_ERR "SMP: Can't set SAL AP Boot Rendezvous: %s\n", |
|
ia64_sal_strerror(sal_ret)); |
|
} |
|
|
|
/* |
|
* identify_siblings(cpu) gets called from identify_cpu. This populates the |
|
* information related to logical execution units in per_cpu_data structure. |
|
*/ |
|
void identify_siblings(struct cpuinfo_ia64 *c) |
|
{ |
|
long status; |
|
u16 pltid; |
|
pal_logical_to_physical_t info; |
|
|
|
status = ia64_pal_logical_to_phys(-1, &info); |
|
if (status != PAL_STATUS_SUCCESS) { |
|
if (status != PAL_STATUS_UNIMPLEMENTED) { |
|
printk(KERN_ERR |
|
"ia64_pal_logical_to_phys failed with %ld\n", |
|
status); |
|
return; |
|
} |
|
|
|
info.overview_ppid = 0; |
|
info.overview_cpp = 1; |
|
info.overview_tpc = 1; |
|
} |
|
|
|
status = ia64_sal_physical_id_info(&pltid); |
|
if (status != PAL_STATUS_SUCCESS) { |
|
if (status != PAL_STATUS_UNIMPLEMENTED) |
|
printk(KERN_ERR |
|
"ia64_sal_pltid failed with %ld\n", |
|
status); |
|
return; |
|
} |
|
|
|
c->socket_id = (pltid << 8) | info.overview_ppid; |
|
|
|
if (info.overview_cpp == 1 && info.overview_tpc == 1) |
|
return; |
|
|
|
c->cores_per_socket = info.overview_cpp; |
|
c->threads_per_core = info.overview_tpc; |
|
c->num_log = info.overview_num_log; |
|
|
|
c->core_id = info.log1_cid; |
|
c->thread_id = info.log1_tid; |
|
} |
|
|
|
/* |
|
* returns non zero, if multi-threading is enabled |
|
* on at least one physical package. Due to hotplug cpu |
|
* and (maxcpus=), all threads may not necessarily be enabled |
|
* even though the processor supports multi-threading. |
|
*/ |
|
int is_multithreading_enabled(void) |
|
{ |
|
int i, j; |
|
|
|
for_each_present_cpu(i) { |
|
for_each_present_cpu(j) { |
|
if (j == i) |
|
continue; |
|
if ((cpu_data(j)->socket_id == cpu_data(i)->socket_id)) { |
|
if (cpu_data(j)->core_id == cpu_data(i)->core_id) |
|
return 1; |
|
} |
|
} |
|
} |
|
return 0; |
|
} |
|
EXPORT_SYMBOL_GPL(is_multithreading_enabled);
|
|
|