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645 lines
15 KiB
645 lines
15 KiB
// SPDX-License-Identifier: GPL-2.0 |
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/* |
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* linux/arch/ia64/kernel/irq_ia64.c |
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* |
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* Copyright (C) 1998-2001 Hewlett-Packard Co |
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* Stephane Eranian <[email protected]> |
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* David Mosberger-Tang <[email protected]> |
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* |
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* 6/10/99: Updated to bring in sync with x86 version to facilitate |
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* support for SMP and different interrupt controllers. |
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* |
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* 09/15/00 Goutham Rao <[email protected]> Implemented pci_irq_to_vector |
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* PCI to vector allocation routine. |
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* 04/14/2004 Ashok Raj <[email protected]> |
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* Added CPU Hotplug handling for IPF. |
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*/ |
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#include <linux/module.h> |
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#include <linux/pgtable.h> |
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#include <linux/jiffies.h> |
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#include <linux/errno.h> |
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#include <linux/init.h> |
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#include <linux/interrupt.h> |
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#include <linux/ioport.h> |
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#include <linux/kernel_stat.h> |
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#include <linux/ptrace.h> |
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#include <linux/signal.h> |
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#include <linux/smp.h> |
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#include <linux/threads.h> |
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#include <linux/bitops.h> |
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#include <linux/irq.h> |
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#include <linux/ratelimit.h> |
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#include <linux/acpi.h> |
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#include <linux/sched.h> |
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#include <asm/delay.h> |
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#include <asm/intrinsics.h> |
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#include <asm/io.h> |
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#include <asm/hw_irq.h> |
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#include <asm/tlbflush.h> |
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#define IRQ_DEBUG 0 |
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#define IRQ_VECTOR_UNASSIGNED (0) |
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#define IRQ_UNUSED (0) |
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#define IRQ_USED (1) |
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#define IRQ_RSVD (2) |
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int ia64_first_device_vector = IA64_DEF_FIRST_DEVICE_VECTOR; |
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int ia64_last_device_vector = IA64_DEF_LAST_DEVICE_VECTOR; |
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/* default base addr of IPI table */ |
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void __iomem *ipi_base_addr = ((void __iomem *) |
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(__IA64_UNCACHED_OFFSET | IA64_IPI_DEFAULT_BASE_ADDR)); |
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static cpumask_t vector_allocation_domain(int cpu); |
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/* |
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* Legacy IRQ to IA-64 vector translation table. |
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*/ |
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__u8 isa_irq_to_vector_map[16] = { |
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/* 8259 IRQ translation, first 16 entries */ |
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0x2f, 0x20, 0x2e, 0x2d, 0x2c, 0x2b, 0x2a, 0x29, |
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0x28, 0x27, 0x26, 0x25, 0x24, 0x23, 0x22, 0x21 |
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}; |
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EXPORT_SYMBOL(isa_irq_to_vector_map); |
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DEFINE_SPINLOCK(vector_lock); |
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struct irq_cfg irq_cfg[NR_IRQS] __read_mostly = { |
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[0 ... NR_IRQS - 1] = { |
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.vector = IRQ_VECTOR_UNASSIGNED, |
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.domain = CPU_MASK_NONE |
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} |
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}; |
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DEFINE_PER_CPU(int[IA64_NUM_VECTORS], vector_irq) = { |
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[0 ... IA64_NUM_VECTORS - 1] = -1 |
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}; |
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static cpumask_t vector_table[IA64_NUM_VECTORS] = { |
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[0 ... IA64_NUM_VECTORS - 1] = CPU_MASK_NONE |
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}; |
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static int irq_status[NR_IRQS] = { |
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[0 ... NR_IRQS -1] = IRQ_UNUSED |
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}; |
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static inline int find_unassigned_irq(void) |
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{ |
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int irq; |
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for (irq = IA64_FIRST_DEVICE_VECTOR; irq < NR_IRQS; irq++) |
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if (irq_status[irq] == IRQ_UNUSED) |
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return irq; |
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return -ENOSPC; |
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} |
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static inline int find_unassigned_vector(cpumask_t domain) |
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{ |
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cpumask_t mask; |
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int pos, vector; |
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cpumask_and(&mask, &domain, cpu_online_mask); |
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if (cpumask_empty(&mask)) |
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return -EINVAL; |
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for (pos = 0; pos < IA64_NUM_DEVICE_VECTORS; pos++) { |
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vector = IA64_FIRST_DEVICE_VECTOR + pos; |
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cpumask_and(&mask, &domain, &vector_table[vector]); |
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if (!cpumask_empty(&mask)) |
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continue; |
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return vector; |
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} |
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return -ENOSPC; |
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} |
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static int __bind_irq_vector(int irq, int vector, cpumask_t domain) |
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{ |
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cpumask_t mask; |
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int cpu; |
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struct irq_cfg *cfg = &irq_cfg[irq]; |
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BUG_ON((unsigned)irq >= NR_IRQS); |
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BUG_ON((unsigned)vector >= IA64_NUM_VECTORS); |
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cpumask_and(&mask, &domain, cpu_online_mask); |
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if (cpumask_empty(&mask)) |
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return -EINVAL; |
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if ((cfg->vector == vector) && cpumask_equal(&cfg->domain, &domain)) |
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return 0; |
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if (cfg->vector != IRQ_VECTOR_UNASSIGNED) |
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return -EBUSY; |
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for_each_cpu(cpu, &mask) |
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per_cpu(vector_irq, cpu)[vector] = irq; |
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cfg->vector = vector; |
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cfg->domain = domain; |
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irq_status[irq] = IRQ_USED; |
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cpumask_or(&vector_table[vector], &vector_table[vector], &domain); |
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return 0; |
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} |
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int bind_irq_vector(int irq, int vector, cpumask_t domain) |
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{ |
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unsigned long flags; |
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int ret; |
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spin_lock_irqsave(&vector_lock, flags); |
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ret = __bind_irq_vector(irq, vector, domain); |
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spin_unlock_irqrestore(&vector_lock, flags); |
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return ret; |
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} |
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static void __clear_irq_vector(int irq) |
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{ |
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int vector, cpu; |
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cpumask_t domain; |
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struct irq_cfg *cfg = &irq_cfg[irq]; |
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BUG_ON((unsigned)irq >= NR_IRQS); |
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BUG_ON(cfg->vector == IRQ_VECTOR_UNASSIGNED); |
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vector = cfg->vector; |
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domain = cfg->domain; |
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for_each_cpu_and(cpu, &cfg->domain, cpu_online_mask) |
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per_cpu(vector_irq, cpu)[vector] = -1; |
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cfg->vector = IRQ_VECTOR_UNASSIGNED; |
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cfg->domain = CPU_MASK_NONE; |
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irq_status[irq] = IRQ_UNUSED; |
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cpumask_andnot(&vector_table[vector], &vector_table[vector], &domain); |
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} |
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static void clear_irq_vector(int irq) |
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{ |
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unsigned long flags; |
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spin_lock_irqsave(&vector_lock, flags); |
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__clear_irq_vector(irq); |
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spin_unlock_irqrestore(&vector_lock, flags); |
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} |
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int |
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ia64_native_assign_irq_vector (int irq) |
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{ |
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unsigned long flags; |
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int vector, cpu; |
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cpumask_t domain = CPU_MASK_NONE; |
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vector = -ENOSPC; |
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spin_lock_irqsave(&vector_lock, flags); |
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for_each_online_cpu(cpu) { |
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domain = vector_allocation_domain(cpu); |
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vector = find_unassigned_vector(domain); |
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if (vector >= 0) |
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break; |
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} |
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if (vector < 0) |
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goto out; |
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if (irq == AUTO_ASSIGN) |
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irq = vector; |
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BUG_ON(__bind_irq_vector(irq, vector, domain)); |
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out: |
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spin_unlock_irqrestore(&vector_lock, flags); |
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return vector; |
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} |
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void |
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ia64_native_free_irq_vector (int vector) |
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{ |
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if (vector < IA64_FIRST_DEVICE_VECTOR || |
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vector > IA64_LAST_DEVICE_VECTOR) |
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return; |
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clear_irq_vector(vector); |
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} |
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int |
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reserve_irq_vector (int vector) |
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{ |
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if (vector < IA64_FIRST_DEVICE_VECTOR || |
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vector > IA64_LAST_DEVICE_VECTOR) |
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return -EINVAL; |
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return !!bind_irq_vector(vector, vector, CPU_MASK_ALL); |
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} |
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/* |
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* Initialize vector_irq on a new cpu. This function must be called |
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* with vector_lock held. |
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*/ |
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void __setup_vector_irq(int cpu) |
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{ |
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int irq, vector; |
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/* Clear vector_irq */ |
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for (vector = 0; vector < IA64_NUM_VECTORS; ++vector) |
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per_cpu(vector_irq, cpu)[vector] = -1; |
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/* Mark the inuse vectors */ |
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for (irq = 0; irq < NR_IRQS; ++irq) { |
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if (!cpumask_test_cpu(cpu, &irq_cfg[irq].domain)) |
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continue; |
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vector = irq_to_vector(irq); |
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per_cpu(vector_irq, cpu)[vector] = irq; |
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} |
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} |
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#ifdef CONFIG_SMP |
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static enum vector_domain_type { |
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VECTOR_DOMAIN_NONE, |
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VECTOR_DOMAIN_PERCPU |
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} vector_domain_type = VECTOR_DOMAIN_NONE; |
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static cpumask_t vector_allocation_domain(int cpu) |
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{ |
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if (vector_domain_type == VECTOR_DOMAIN_PERCPU) |
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return *cpumask_of(cpu); |
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return CPU_MASK_ALL; |
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} |
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static int __irq_prepare_move(int irq, int cpu) |
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{ |
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struct irq_cfg *cfg = &irq_cfg[irq]; |
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int vector; |
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cpumask_t domain; |
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if (cfg->move_in_progress || cfg->move_cleanup_count) |
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return -EBUSY; |
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if (cfg->vector == IRQ_VECTOR_UNASSIGNED || !cpu_online(cpu)) |
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return -EINVAL; |
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if (cpumask_test_cpu(cpu, &cfg->domain)) |
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return 0; |
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domain = vector_allocation_domain(cpu); |
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vector = find_unassigned_vector(domain); |
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if (vector < 0) |
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return -ENOSPC; |
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cfg->move_in_progress = 1; |
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cfg->old_domain = cfg->domain; |
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cfg->vector = IRQ_VECTOR_UNASSIGNED; |
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cfg->domain = CPU_MASK_NONE; |
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BUG_ON(__bind_irq_vector(irq, vector, domain)); |
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return 0; |
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} |
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int irq_prepare_move(int irq, int cpu) |
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{ |
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unsigned long flags; |
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int ret; |
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spin_lock_irqsave(&vector_lock, flags); |
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ret = __irq_prepare_move(irq, cpu); |
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spin_unlock_irqrestore(&vector_lock, flags); |
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return ret; |
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} |
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void irq_complete_move(unsigned irq) |
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{ |
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struct irq_cfg *cfg = &irq_cfg[irq]; |
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cpumask_t cleanup_mask; |
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int i; |
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if (likely(!cfg->move_in_progress)) |
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return; |
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if (unlikely(cpumask_test_cpu(smp_processor_id(), &cfg->old_domain))) |
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return; |
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cpumask_and(&cleanup_mask, &cfg->old_domain, cpu_online_mask); |
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cfg->move_cleanup_count = cpumask_weight(&cleanup_mask); |
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for_each_cpu(i, &cleanup_mask) |
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ia64_send_ipi(i, IA64_IRQ_MOVE_VECTOR, IA64_IPI_DM_INT, 0); |
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cfg->move_in_progress = 0; |
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} |
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static irqreturn_t smp_irq_move_cleanup_interrupt(int irq, void *dev_id) |
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{ |
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int me = smp_processor_id(); |
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ia64_vector vector; |
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unsigned long flags; |
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for (vector = IA64_FIRST_DEVICE_VECTOR; |
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vector < IA64_LAST_DEVICE_VECTOR; vector++) { |
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int irq; |
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struct irq_desc *desc; |
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struct irq_cfg *cfg; |
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irq = __this_cpu_read(vector_irq[vector]); |
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if (irq < 0) |
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continue; |
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desc = irq_to_desc(irq); |
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cfg = irq_cfg + irq; |
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raw_spin_lock(&desc->lock); |
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if (!cfg->move_cleanup_count) |
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goto unlock; |
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if (!cpumask_test_cpu(me, &cfg->old_domain)) |
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goto unlock; |
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spin_lock_irqsave(&vector_lock, flags); |
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__this_cpu_write(vector_irq[vector], -1); |
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cpumask_clear_cpu(me, &vector_table[vector]); |
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spin_unlock_irqrestore(&vector_lock, flags); |
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cfg->move_cleanup_count--; |
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unlock: |
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raw_spin_unlock(&desc->lock); |
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} |
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return IRQ_HANDLED; |
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} |
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static int __init parse_vector_domain(char *arg) |
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{ |
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if (!arg) |
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return -EINVAL; |
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if (!strcmp(arg, "percpu")) { |
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vector_domain_type = VECTOR_DOMAIN_PERCPU; |
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no_int_routing = 1; |
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} |
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return 0; |
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} |
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early_param("vector", parse_vector_domain); |
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#else |
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static cpumask_t vector_allocation_domain(int cpu) |
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{ |
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return CPU_MASK_ALL; |
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} |
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#endif |
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void destroy_and_reserve_irq(unsigned int irq) |
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{ |
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unsigned long flags; |
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irq_init_desc(irq); |
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spin_lock_irqsave(&vector_lock, flags); |
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__clear_irq_vector(irq); |
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irq_status[irq] = IRQ_RSVD; |
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spin_unlock_irqrestore(&vector_lock, flags); |
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} |
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/* |
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* Dynamic irq allocate and deallocation for MSI |
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*/ |
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int create_irq(void) |
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{ |
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unsigned long flags; |
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int irq, vector, cpu; |
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cpumask_t domain = CPU_MASK_NONE; |
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irq = vector = -ENOSPC; |
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spin_lock_irqsave(&vector_lock, flags); |
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for_each_online_cpu(cpu) { |
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domain = vector_allocation_domain(cpu); |
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vector = find_unassigned_vector(domain); |
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if (vector >= 0) |
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break; |
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} |
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if (vector < 0) |
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goto out; |
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irq = find_unassigned_irq(); |
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if (irq < 0) |
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goto out; |
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BUG_ON(__bind_irq_vector(irq, vector, domain)); |
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out: |
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spin_unlock_irqrestore(&vector_lock, flags); |
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if (irq >= 0) |
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irq_init_desc(irq); |
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return irq; |
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} |
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void destroy_irq(unsigned int irq) |
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{ |
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irq_init_desc(irq); |
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clear_irq_vector(irq); |
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} |
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#ifdef CONFIG_SMP |
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# define IS_RESCHEDULE(vec) (vec == IA64_IPI_RESCHEDULE) |
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# define IS_LOCAL_TLB_FLUSH(vec) (vec == IA64_IPI_LOCAL_TLB_FLUSH) |
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#else |
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# define IS_RESCHEDULE(vec) (0) |
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# define IS_LOCAL_TLB_FLUSH(vec) (0) |
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#endif |
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/* |
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* That's where the IVT branches when we get an external |
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* interrupt. This branches to the correct hardware IRQ handler via |
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* function ptr. |
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*/ |
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void |
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ia64_handle_irq (ia64_vector vector, struct pt_regs *regs) |
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{ |
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struct pt_regs *old_regs = set_irq_regs(regs); |
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unsigned long saved_tpr; |
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#if IRQ_DEBUG |
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{ |
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unsigned long bsp, sp; |
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/* |
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* Note: if the interrupt happened while executing in |
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* the context switch routine (ia64_switch_to), we may |
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* get a spurious stack overflow here. This is |
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* because the register and the memory stack are not |
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* switched atomically. |
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*/ |
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bsp = ia64_getreg(_IA64_REG_AR_BSP); |
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sp = ia64_getreg(_IA64_REG_SP); |
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if ((sp - bsp) < 1024) { |
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static DEFINE_RATELIMIT_STATE(ratelimit, 5 * HZ, 5); |
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if (__ratelimit(&ratelimit)) { |
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printk("ia64_handle_irq: DANGER: less than " |
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"1KB of free stack space!!\n" |
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"(bsp=0x%lx, sp=%lx)\n", bsp, sp); |
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} |
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} |
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} |
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#endif /* IRQ_DEBUG */ |
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/* |
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* Always set TPR to limit maximum interrupt nesting depth to |
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* 16 (without this, it would be ~240, which could easily lead |
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* to kernel stack overflows). |
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*/ |
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irq_enter(); |
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saved_tpr = ia64_getreg(_IA64_REG_CR_TPR); |
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ia64_srlz_d(); |
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while (vector != IA64_SPURIOUS_INT_VECTOR) { |
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int irq = local_vector_to_irq(vector); |
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if (unlikely(IS_LOCAL_TLB_FLUSH(vector))) { |
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smp_local_flush_tlb(); |
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kstat_incr_irq_this_cpu(irq); |
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} else if (unlikely(IS_RESCHEDULE(vector))) { |
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scheduler_ipi(); |
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kstat_incr_irq_this_cpu(irq); |
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} else { |
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ia64_setreg(_IA64_REG_CR_TPR, vector); |
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ia64_srlz_d(); |
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if (unlikely(irq < 0)) { |
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printk(KERN_ERR "%s: Unexpected interrupt " |
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"vector %d on CPU %d is not mapped " |
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"to any IRQ!\n", __func__, vector, |
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smp_processor_id()); |
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} else |
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generic_handle_irq(irq); |
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/* |
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* Disable interrupts and send EOI: |
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*/ |
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local_irq_disable(); |
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ia64_setreg(_IA64_REG_CR_TPR, saved_tpr); |
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} |
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ia64_eoi(); |
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vector = ia64_get_ivr(); |
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} |
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/* |
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* This must be done *after* the ia64_eoi(). For example, the keyboard softirq |
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* handler needs to be able to wait for further keyboard interrupts, which can't |
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* come through until ia64_eoi() has been done. |
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*/ |
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irq_exit(); |
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set_irq_regs(old_regs); |
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} |
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#ifdef CONFIG_HOTPLUG_CPU |
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/* |
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* This function emulates a interrupt processing when a cpu is about to be |
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* brought down. |
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*/ |
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void ia64_process_pending_intr(void) |
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{ |
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ia64_vector vector; |
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unsigned long saved_tpr; |
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extern unsigned int vectors_in_migration[NR_IRQS]; |
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vector = ia64_get_ivr(); |
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irq_enter(); |
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saved_tpr = ia64_getreg(_IA64_REG_CR_TPR); |
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ia64_srlz_d(); |
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/* |
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* Perform normal interrupt style processing |
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*/ |
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while (vector != IA64_SPURIOUS_INT_VECTOR) { |
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int irq = local_vector_to_irq(vector); |
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if (unlikely(IS_LOCAL_TLB_FLUSH(vector))) { |
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smp_local_flush_tlb(); |
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kstat_incr_irq_this_cpu(irq); |
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} else if (unlikely(IS_RESCHEDULE(vector))) { |
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kstat_incr_irq_this_cpu(irq); |
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} else { |
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struct pt_regs *old_regs = set_irq_regs(NULL); |
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ia64_setreg(_IA64_REG_CR_TPR, vector); |
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ia64_srlz_d(); |
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/* |
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* Now try calling normal ia64_handle_irq as it would have got called |
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* from a real intr handler. Try passing null for pt_regs, hopefully |
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* it will work. I hope it works!. |
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* Probably could shared code. |
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*/ |
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if (unlikely(irq < 0)) { |
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printk(KERN_ERR "%s: Unexpected interrupt " |
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"vector %d on CPU %d not being mapped " |
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"to any IRQ!!\n", __func__, vector, |
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smp_processor_id()); |
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} else { |
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vectors_in_migration[irq]=0; |
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generic_handle_irq(irq); |
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} |
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set_irq_regs(old_regs); |
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/* |
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* Disable interrupts and send EOI |
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*/ |
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local_irq_disable(); |
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ia64_setreg(_IA64_REG_CR_TPR, saved_tpr); |
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} |
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ia64_eoi(); |
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vector = ia64_get_ivr(); |
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} |
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irq_exit(); |
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} |
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#endif |
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#ifdef CONFIG_SMP |
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static irqreturn_t dummy_handler (int irq, void *dev_id) |
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{ |
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BUG(); |
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return IRQ_NONE; |
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} |
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|
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/* |
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* KVM uses this interrupt to force a cpu out of guest mode |
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*/ |
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#endif |
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|
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void |
|
register_percpu_irq(ia64_vector vec, irq_handler_t handler, unsigned long flags, |
|
const char *name) |
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{ |
|
unsigned int irq; |
|
|
|
irq = vec; |
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BUG_ON(bind_irq_vector(irq, vec, CPU_MASK_ALL)); |
|
irq_set_status_flags(irq, IRQ_PER_CPU); |
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irq_set_chip(irq, &irq_type_ia64_lsapic); |
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if (handler) |
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if (request_irq(irq, handler, flags, name, NULL)) |
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pr_err("Failed to request irq %u (%s)\n", irq, name); |
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irq_set_handler(irq, handle_percpu_irq); |
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} |
|
|
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void __init |
|
ia64_native_register_ipi(void) |
|
{ |
|
#ifdef CONFIG_SMP |
|
register_percpu_irq(IA64_IPI_VECTOR, handle_IPI, 0, "IPI"); |
|
register_percpu_irq(IA64_IPI_RESCHEDULE, dummy_handler, 0, "resched"); |
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register_percpu_irq(IA64_IPI_LOCAL_TLB_FLUSH, dummy_handler, 0, |
|
"tlb_flush"); |
|
#endif |
|
} |
|
|
|
void __init |
|
init_IRQ (void) |
|
{ |
|
acpi_boot_init(); |
|
ia64_register_ipi(); |
|
register_percpu_irq(IA64_SPURIOUS_INT_VECTOR, NULL, 0, NULL); |
|
#ifdef CONFIG_SMP |
|
if (vector_domain_type != VECTOR_DOMAIN_NONE) { |
|
register_percpu_irq(IA64_IRQ_MOVE_VECTOR, |
|
smp_irq_move_cleanup_interrupt, 0, |
|
"irq_move"); |
|
} |
|
#endif |
|
} |
|
|
|
void |
|
ia64_send_ipi (int cpu, int vector, int delivery_mode, int redirect) |
|
{ |
|
void __iomem *ipi_addr; |
|
unsigned long ipi_data; |
|
unsigned long phys_cpu_id; |
|
|
|
phys_cpu_id = cpu_physical_id(cpu); |
|
|
|
/* |
|
* cpu number is in 8bit ID and 8bit EID |
|
*/ |
|
|
|
ipi_data = (delivery_mode << 8) | (vector & 0xff); |
|
ipi_addr = ipi_base_addr + ((phys_cpu_id << 4) | ((redirect & 1) << 3)); |
|
|
|
writeq(ipi_data, ipi_addr); |
|
}
|
|
|