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886 lines
21 KiB
886 lines
21 KiB
// SPDX-License-Identifier: GPL-2.0 |
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/* |
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* Atheros AR933X SoC built-in UART driver |
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* |
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* Copyright (C) 2011 Gabor Juhos <[email protected]> |
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* |
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* Based on drivers/char/serial.c, by Linus Torvalds, Theodore Ts'o. |
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*/ |
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#include <linux/module.h> |
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#include <linux/ioport.h> |
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#include <linux/init.h> |
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#include <linux/console.h> |
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#include <linux/sysrq.h> |
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#include <linux/delay.h> |
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#include <linux/gpio/consumer.h> |
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#include <linux/platform_device.h> |
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#include <linux/of.h> |
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#include <linux/of_platform.h> |
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#include <linux/tty.h> |
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#include <linux/tty_flip.h> |
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#include <linux/serial_core.h> |
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#include <linux/serial.h> |
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#include <linux/slab.h> |
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#include <linux/io.h> |
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#include <linux/irq.h> |
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#include <linux/clk.h> |
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#include <asm/div64.h> |
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#include <asm/mach-ath79/ar933x_uart.h> |
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#include "serial_mctrl_gpio.h" |
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#define DRIVER_NAME "ar933x-uart" |
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#define AR933X_UART_MAX_SCALE 0xff |
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#define AR933X_UART_MAX_STEP 0xffff |
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#define AR933X_UART_MIN_BAUD 300 |
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#define AR933X_UART_MAX_BAUD 3000000 |
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#define AR933X_DUMMY_STATUS_RD 0x01 |
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static struct uart_driver ar933x_uart_driver; |
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struct ar933x_uart_port { |
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struct uart_port port; |
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unsigned int ier; /* shadow Interrupt Enable Register */ |
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unsigned int min_baud; |
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unsigned int max_baud; |
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struct clk *clk; |
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struct mctrl_gpios *gpios; |
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struct gpio_desc *rts_gpiod; |
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}; |
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static inline unsigned int ar933x_uart_read(struct ar933x_uart_port *up, |
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int offset) |
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{ |
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return readl(up->port.membase + offset); |
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} |
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static inline void ar933x_uart_write(struct ar933x_uart_port *up, |
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int offset, unsigned int value) |
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{ |
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writel(value, up->port.membase + offset); |
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} |
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static inline void ar933x_uart_rmw(struct ar933x_uart_port *up, |
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unsigned int offset, |
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unsigned int mask, |
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unsigned int val) |
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{ |
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unsigned int t; |
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t = ar933x_uart_read(up, offset); |
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t &= ~mask; |
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t |= val; |
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ar933x_uart_write(up, offset, t); |
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} |
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static inline void ar933x_uart_rmw_set(struct ar933x_uart_port *up, |
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unsigned int offset, |
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unsigned int val) |
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{ |
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ar933x_uart_rmw(up, offset, 0, val); |
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} |
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static inline void ar933x_uart_rmw_clear(struct ar933x_uart_port *up, |
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unsigned int offset, |
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unsigned int val) |
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{ |
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ar933x_uart_rmw(up, offset, val, 0); |
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} |
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static inline void ar933x_uart_start_tx_interrupt(struct ar933x_uart_port *up) |
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{ |
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up->ier |= AR933X_UART_INT_TX_EMPTY; |
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ar933x_uart_write(up, AR933X_UART_INT_EN_REG, up->ier); |
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} |
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static inline void ar933x_uart_stop_tx_interrupt(struct ar933x_uart_port *up) |
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{ |
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up->ier &= ~AR933X_UART_INT_TX_EMPTY; |
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ar933x_uart_write(up, AR933X_UART_INT_EN_REG, up->ier); |
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} |
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static inline void ar933x_uart_start_rx_interrupt(struct ar933x_uart_port *up) |
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{ |
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up->ier |= AR933X_UART_INT_RX_VALID; |
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ar933x_uart_write(up, AR933X_UART_INT_EN_REG, up->ier); |
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} |
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static inline void ar933x_uart_stop_rx_interrupt(struct ar933x_uart_port *up) |
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{ |
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up->ier &= ~AR933X_UART_INT_RX_VALID; |
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ar933x_uart_write(up, AR933X_UART_INT_EN_REG, up->ier); |
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} |
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static inline void ar933x_uart_putc(struct ar933x_uart_port *up, int ch) |
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{ |
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unsigned int rdata; |
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rdata = ch & AR933X_UART_DATA_TX_RX_MASK; |
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rdata |= AR933X_UART_DATA_TX_CSR; |
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ar933x_uart_write(up, AR933X_UART_DATA_REG, rdata); |
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} |
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static unsigned int ar933x_uart_tx_empty(struct uart_port *port) |
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{ |
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struct ar933x_uart_port *up = |
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container_of(port, struct ar933x_uart_port, port); |
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unsigned long flags; |
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unsigned int rdata; |
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spin_lock_irqsave(&up->port.lock, flags); |
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rdata = ar933x_uart_read(up, AR933X_UART_DATA_REG); |
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spin_unlock_irqrestore(&up->port.lock, flags); |
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return (rdata & AR933X_UART_DATA_TX_CSR) ? 0 : TIOCSER_TEMT; |
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} |
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static unsigned int ar933x_uart_get_mctrl(struct uart_port *port) |
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{ |
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struct ar933x_uart_port *up = |
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container_of(port, struct ar933x_uart_port, port); |
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int ret = TIOCM_CTS | TIOCM_DSR | TIOCM_CAR; |
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mctrl_gpio_get(up->gpios, &ret); |
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return ret; |
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} |
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static void ar933x_uart_set_mctrl(struct uart_port *port, unsigned int mctrl) |
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{ |
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struct ar933x_uart_port *up = |
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container_of(port, struct ar933x_uart_port, port); |
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mctrl_gpio_set(up->gpios, mctrl); |
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} |
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static void ar933x_uart_start_tx(struct uart_port *port) |
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{ |
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struct ar933x_uart_port *up = |
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container_of(port, struct ar933x_uart_port, port); |
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ar933x_uart_start_tx_interrupt(up); |
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} |
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static void ar933x_uart_wait_tx_complete(struct ar933x_uart_port *up) |
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{ |
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unsigned int status; |
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unsigned int timeout = 60000; |
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/* Wait up to 60ms for the character(s) to be sent. */ |
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do { |
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status = ar933x_uart_read(up, AR933X_UART_CS_REG); |
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if (--timeout == 0) |
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break; |
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udelay(1); |
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} while (status & AR933X_UART_CS_TX_BUSY); |
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if (timeout == 0) |
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dev_err(up->port.dev, "waiting for TX timed out\n"); |
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} |
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static void ar933x_uart_rx_flush(struct ar933x_uart_port *up) |
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{ |
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unsigned int status; |
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/* clear RX_VALID interrupt */ |
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ar933x_uart_write(up, AR933X_UART_INT_REG, AR933X_UART_INT_RX_VALID); |
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/* remove characters from the RX FIFO */ |
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do { |
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ar933x_uart_write(up, AR933X_UART_DATA_REG, AR933X_UART_DATA_RX_CSR); |
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status = ar933x_uart_read(up, AR933X_UART_DATA_REG); |
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} while (status & AR933X_UART_DATA_RX_CSR); |
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} |
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static void ar933x_uart_stop_tx(struct uart_port *port) |
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{ |
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struct ar933x_uart_port *up = |
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container_of(port, struct ar933x_uart_port, port); |
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ar933x_uart_stop_tx_interrupt(up); |
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} |
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static void ar933x_uart_stop_rx(struct uart_port *port) |
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{ |
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struct ar933x_uart_port *up = |
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container_of(port, struct ar933x_uart_port, port); |
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ar933x_uart_stop_rx_interrupt(up); |
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} |
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static void ar933x_uart_break_ctl(struct uart_port *port, int break_state) |
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{ |
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struct ar933x_uart_port *up = |
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container_of(port, struct ar933x_uart_port, port); |
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unsigned long flags; |
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spin_lock_irqsave(&up->port.lock, flags); |
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if (break_state == -1) |
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ar933x_uart_rmw_set(up, AR933X_UART_CS_REG, |
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AR933X_UART_CS_TX_BREAK); |
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else |
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ar933x_uart_rmw_clear(up, AR933X_UART_CS_REG, |
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AR933X_UART_CS_TX_BREAK); |
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spin_unlock_irqrestore(&up->port.lock, flags); |
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} |
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/* |
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* baudrate = (clk / (scale + 1)) * (step * (1 / 2^17)) |
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*/ |
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static unsigned long ar933x_uart_get_baud(unsigned int clk, |
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unsigned int scale, |
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unsigned int step) |
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{ |
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u64 t; |
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u32 div; |
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div = (2 << 16) * (scale + 1); |
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t = clk; |
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t *= step; |
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t += (div / 2); |
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do_div(t, div); |
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return t; |
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} |
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static void ar933x_uart_get_scale_step(unsigned int clk, |
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unsigned int baud, |
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unsigned int *scale, |
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unsigned int *step) |
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{ |
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unsigned int tscale; |
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long min_diff; |
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*scale = 0; |
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*step = 0; |
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min_diff = baud; |
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for (tscale = 0; tscale < AR933X_UART_MAX_SCALE; tscale++) { |
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u64 tstep; |
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int diff; |
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tstep = baud * (tscale + 1); |
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tstep *= (2 << 16); |
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do_div(tstep, clk); |
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if (tstep > AR933X_UART_MAX_STEP) |
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break; |
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diff = abs(ar933x_uart_get_baud(clk, tscale, tstep) - baud); |
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if (diff < min_diff) { |
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min_diff = diff; |
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*scale = tscale; |
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*step = tstep; |
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} |
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} |
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} |
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static void ar933x_uart_set_termios(struct uart_port *port, |
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struct ktermios *new, |
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struct ktermios *old) |
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{ |
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struct ar933x_uart_port *up = |
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container_of(port, struct ar933x_uart_port, port); |
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unsigned int cs; |
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unsigned long flags; |
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unsigned int baud, scale, step; |
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/* Only CS8 is supported */ |
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new->c_cflag &= ~CSIZE; |
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new->c_cflag |= CS8; |
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/* Only one stop bit is supported */ |
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new->c_cflag &= ~CSTOPB; |
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cs = 0; |
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if (new->c_cflag & PARENB) { |
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if (!(new->c_cflag & PARODD)) |
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cs |= AR933X_UART_CS_PARITY_EVEN; |
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else |
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cs |= AR933X_UART_CS_PARITY_ODD; |
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} else { |
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cs |= AR933X_UART_CS_PARITY_NONE; |
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} |
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/* Mark/space parity is not supported */ |
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new->c_cflag &= ~CMSPAR; |
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baud = uart_get_baud_rate(port, new, old, up->min_baud, up->max_baud); |
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ar933x_uart_get_scale_step(port->uartclk, baud, &scale, &step); |
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/* |
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* Ok, we're now changing the port state. Do it with |
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* interrupts disabled. |
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*/ |
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spin_lock_irqsave(&up->port.lock, flags); |
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/* disable the UART */ |
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ar933x_uart_rmw_clear(up, AR933X_UART_CS_REG, |
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AR933X_UART_CS_IF_MODE_M << AR933X_UART_CS_IF_MODE_S); |
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/* Update the per-port timeout. */ |
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uart_update_timeout(port, new->c_cflag, baud); |
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up->port.ignore_status_mask = 0; |
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/* ignore all characters if CREAD is not set */ |
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if ((new->c_cflag & CREAD) == 0) |
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up->port.ignore_status_mask |= AR933X_DUMMY_STATUS_RD; |
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ar933x_uart_write(up, AR933X_UART_CLOCK_REG, |
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scale << AR933X_UART_CLOCK_SCALE_S | step); |
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/* setup configuration register */ |
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ar933x_uart_rmw(up, AR933X_UART_CS_REG, AR933X_UART_CS_PARITY_M, cs); |
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/* enable host interrupt */ |
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ar933x_uart_rmw_set(up, AR933X_UART_CS_REG, |
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AR933X_UART_CS_HOST_INT_EN); |
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/* enable RX and TX ready overide */ |
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ar933x_uart_rmw_set(up, AR933X_UART_CS_REG, |
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AR933X_UART_CS_TX_READY_ORIDE | AR933X_UART_CS_RX_READY_ORIDE); |
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/* reenable the UART */ |
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ar933x_uart_rmw(up, AR933X_UART_CS_REG, |
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AR933X_UART_CS_IF_MODE_M << AR933X_UART_CS_IF_MODE_S, |
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AR933X_UART_CS_IF_MODE_DCE << AR933X_UART_CS_IF_MODE_S); |
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spin_unlock_irqrestore(&up->port.lock, flags); |
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if (tty_termios_baud_rate(new)) |
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tty_termios_encode_baud_rate(new, baud, baud); |
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} |
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static void ar933x_uart_rx_chars(struct ar933x_uart_port *up) |
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{ |
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struct tty_port *port = &up->port.state->port; |
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int max_count = 256; |
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do { |
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unsigned int rdata; |
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unsigned char ch; |
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rdata = ar933x_uart_read(up, AR933X_UART_DATA_REG); |
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if ((rdata & AR933X_UART_DATA_RX_CSR) == 0) |
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break; |
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/* remove the character from the FIFO */ |
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ar933x_uart_write(up, AR933X_UART_DATA_REG, |
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AR933X_UART_DATA_RX_CSR); |
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up->port.icount.rx++; |
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ch = rdata & AR933X_UART_DATA_TX_RX_MASK; |
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if (uart_handle_sysrq_char(&up->port, ch)) |
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continue; |
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if ((up->port.ignore_status_mask & AR933X_DUMMY_STATUS_RD) == 0) |
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tty_insert_flip_char(port, ch, TTY_NORMAL); |
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} while (max_count-- > 0); |
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tty_flip_buffer_push(port); |
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} |
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static void ar933x_uart_tx_chars(struct ar933x_uart_port *up) |
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{ |
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struct circ_buf *xmit = &up->port.state->xmit; |
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struct serial_rs485 *rs485conf = &up->port.rs485; |
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int count; |
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bool half_duplex_send = false; |
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if (uart_tx_stopped(&up->port)) |
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return; |
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if ((rs485conf->flags & SER_RS485_ENABLED) && |
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(up->port.x_char || !uart_circ_empty(xmit))) { |
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ar933x_uart_stop_rx_interrupt(up); |
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gpiod_set_value(up->rts_gpiod, !!(rs485conf->flags & SER_RS485_RTS_ON_SEND)); |
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half_duplex_send = true; |
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} |
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count = up->port.fifosize; |
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do { |
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unsigned int rdata; |
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rdata = ar933x_uart_read(up, AR933X_UART_DATA_REG); |
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if ((rdata & AR933X_UART_DATA_TX_CSR) == 0) |
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break; |
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if (up->port.x_char) { |
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ar933x_uart_putc(up, up->port.x_char); |
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up->port.icount.tx++; |
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up->port.x_char = 0; |
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continue; |
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} |
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if (uart_circ_empty(xmit)) |
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break; |
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ar933x_uart_putc(up, xmit->buf[xmit->tail]); |
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xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1); |
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up->port.icount.tx++; |
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} while (--count > 0); |
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if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS) |
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uart_write_wakeup(&up->port); |
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if (!uart_circ_empty(xmit)) { |
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ar933x_uart_start_tx_interrupt(up); |
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} else if (half_duplex_send) { |
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ar933x_uart_wait_tx_complete(up); |
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ar933x_uart_rx_flush(up); |
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ar933x_uart_start_rx_interrupt(up); |
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gpiod_set_value(up->rts_gpiod, !!(rs485conf->flags & SER_RS485_RTS_AFTER_SEND)); |
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} |
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} |
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static irqreturn_t ar933x_uart_interrupt(int irq, void *dev_id) |
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{ |
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struct ar933x_uart_port *up = dev_id; |
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unsigned int status; |
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status = ar933x_uart_read(up, AR933X_UART_CS_REG); |
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if ((status & AR933X_UART_CS_HOST_INT) == 0) |
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return IRQ_NONE; |
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spin_lock(&up->port.lock); |
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status = ar933x_uart_read(up, AR933X_UART_INT_REG); |
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status &= ar933x_uart_read(up, AR933X_UART_INT_EN_REG); |
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if (status & AR933X_UART_INT_RX_VALID) { |
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ar933x_uart_write(up, AR933X_UART_INT_REG, |
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AR933X_UART_INT_RX_VALID); |
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ar933x_uart_rx_chars(up); |
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} |
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if (status & AR933X_UART_INT_TX_EMPTY) { |
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ar933x_uart_write(up, AR933X_UART_INT_REG, |
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AR933X_UART_INT_TX_EMPTY); |
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ar933x_uart_stop_tx_interrupt(up); |
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ar933x_uart_tx_chars(up); |
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} |
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spin_unlock(&up->port.lock); |
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return IRQ_HANDLED; |
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} |
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static int ar933x_uart_startup(struct uart_port *port) |
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{ |
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struct ar933x_uart_port *up = |
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container_of(port, struct ar933x_uart_port, port); |
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unsigned long flags; |
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int ret; |
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ret = request_irq(up->port.irq, ar933x_uart_interrupt, |
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up->port.irqflags, dev_name(up->port.dev), up); |
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if (ret) |
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return ret; |
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spin_lock_irqsave(&up->port.lock, flags); |
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/* Enable HOST interrupts */ |
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ar933x_uart_rmw_set(up, AR933X_UART_CS_REG, |
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AR933X_UART_CS_HOST_INT_EN); |
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/* enable RX and TX ready overide */ |
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ar933x_uart_rmw_set(up, AR933X_UART_CS_REG, |
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AR933X_UART_CS_TX_READY_ORIDE | AR933X_UART_CS_RX_READY_ORIDE); |
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/* Enable RX interrupts */ |
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ar933x_uart_start_rx_interrupt(up); |
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spin_unlock_irqrestore(&up->port.lock, flags); |
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return 0; |
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} |
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static void ar933x_uart_shutdown(struct uart_port *port) |
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{ |
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struct ar933x_uart_port *up = |
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container_of(port, struct ar933x_uart_port, port); |
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/* Disable all interrupts */ |
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up->ier = 0; |
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ar933x_uart_write(up, AR933X_UART_INT_EN_REG, up->ier); |
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/* Disable break condition */ |
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ar933x_uart_rmw_clear(up, AR933X_UART_CS_REG, |
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AR933X_UART_CS_TX_BREAK); |
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free_irq(up->port.irq, up); |
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} |
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static const char *ar933x_uart_type(struct uart_port *port) |
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{ |
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return (port->type == PORT_AR933X) ? "AR933X UART" : NULL; |
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} |
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static void ar933x_uart_release_port(struct uart_port *port) |
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{ |
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/* Nothing to release ... */ |
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} |
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|
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static int ar933x_uart_request_port(struct uart_port *port) |
|
{ |
|
/* UARTs always present */ |
|
return 0; |
|
} |
|
|
|
static void ar933x_uart_config_port(struct uart_port *port, int flags) |
|
{ |
|
if (flags & UART_CONFIG_TYPE) |
|
port->type = PORT_AR933X; |
|
} |
|
|
|
static int ar933x_uart_verify_port(struct uart_port *port, |
|
struct serial_struct *ser) |
|
{ |
|
struct ar933x_uart_port *up = |
|
container_of(port, struct ar933x_uart_port, port); |
|
|
|
if (ser->type != PORT_UNKNOWN && |
|
ser->type != PORT_AR933X) |
|
return -EINVAL; |
|
|
|
if (ser->irq < 0 || ser->irq >= NR_IRQS) |
|
return -EINVAL; |
|
|
|
if (ser->baud_base < up->min_baud || |
|
ser->baud_base > up->max_baud) |
|
return -EINVAL; |
|
|
|
return 0; |
|
} |
|
|
|
static const struct uart_ops ar933x_uart_ops = { |
|
.tx_empty = ar933x_uart_tx_empty, |
|
.set_mctrl = ar933x_uart_set_mctrl, |
|
.get_mctrl = ar933x_uart_get_mctrl, |
|
.stop_tx = ar933x_uart_stop_tx, |
|
.start_tx = ar933x_uart_start_tx, |
|
.stop_rx = ar933x_uart_stop_rx, |
|
.break_ctl = ar933x_uart_break_ctl, |
|
.startup = ar933x_uart_startup, |
|
.shutdown = ar933x_uart_shutdown, |
|
.set_termios = ar933x_uart_set_termios, |
|
.type = ar933x_uart_type, |
|
.release_port = ar933x_uart_release_port, |
|
.request_port = ar933x_uart_request_port, |
|
.config_port = ar933x_uart_config_port, |
|
.verify_port = ar933x_uart_verify_port, |
|
}; |
|
|
|
static int ar933x_config_rs485(struct uart_port *port, |
|
struct serial_rs485 *rs485conf) |
|
{ |
|
struct ar933x_uart_port *up = |
|
container_of(port, struct ar933x_uart_port, port); |
|
|
|
if ((rs485conf->flags & SER_RS485_ENABLED) && |
|
!up->rts_gpiod) { |
|
dev_err(port->dev, "RS485 needs rts-gpio\n"); |
|
return 1; |
|
} |
|
port->rs485 = *rs485conf; |
|
return 0; |
|
} |
|
|
|
#ifdef CONFIG_SERIAL_AR933X_CONSOLE |
|
static struct ar933x_uart_port * |
|
ar933x_console_ports[CONFIG_SERIAL_AR933X_NR_UARTS]; |
|
|
|
static void ar933x_uart_wait_xmitr(struct ar933x_uart_port *up) |
|
{ |
|
unsigned int status; |
|
unsigned int timeout = 60000; |
|
|
|
/* Wait up to 60ms for the character(s) to be sent. */ |
|
do { |
|
status = ar933x_uart_read(up, AR933X_UART_DATA_REG); |
|
if (--timeout == 0) |
|
break; |
|
udelay(1); |
|
} while ((status & AR933X_UART_DATA_TX_CSR) == 0); |
|
} |
|
|
|
static void ar933x_uart_console_putchar(struct uart_port *port, int ch) |
|
{ |
|
struct ar933x_uart_port *up = |
|
container_of(port, struct ar933x_uart_port, port); |
|
|
|
ar933x_uart_wait_xmitr(up); |
|
ar933x_uart_putc(up, ch); |
|
} |
|
|
|
static void ar933x_uart_console_write(struct console *co, const char *s, |
|
unsigned int count) |
|
{ |
|
struct ar933x_uart_port *up = ar933x_console_ports[co->index]; |
|
unsigned long flags; |
|
unsigned int int_en; |
|
int locked = 1; |
|
|
|
local_irq_save(flags); |
|
|
|
if (up->port.sysrq) |
|
locked = 0; |
|
else if (oops_in_progress) |
|
locked = spin_trylock(&up->port.lock); |
|
else |
|
spin_lock(&up->port.lock); |
|
|
|
/* |
|
* First save the IER then disable the interrupts |
|
*/ |
|
int_en = ar933x_uart_read(up, AR933X_UART_INT_EN_REG); |
|
ar933x_uart_write(up, AR933X_UART_INT_EN_REG, 0); |
|
|
|
uart_console_write(&up->port, s, count, ar933x_uart_console_putchar); |
|
|
|
/* |
|
* Finally, wait for transmitter to become empty |
|
* and restore the IER |
|
*/ |
|
ar933x_uart_wait_xmitr(up); |
|
ar933x_uart_write(up, AR933X_UART_INT_EN_REG, int_en); |
|
|
|
ar933x_uart_write(up, AR933X_UART_INT_REG, AR933X_UART_INT_ALLINTS); |
|
|
|
if (locked) |
|
spin_unlock(&up->port.lock); |
|
|
|
local_irq_restore(flags); |
|
} |
|
|
|
static int ar933x_uart_console_setup(struct console *co, char *options) |
|
{ |
|
struct ar933x_uart_port *up; |
|
int baud = 115200; |
|
int bits = 8; |
|
int parity = 'n'; |
|
int flow = 'n'; |
|
|
|
if (co->index < 0 || co->index >= CONFIG_SERIAL_AR933X_NR_UARTS) |
|
return -EINVAL; |
|
|
|
up = ar933x_console_ports[co->index]; |
|
if (!up) |
|
return -ENODEV; |
|
|
|
if (options) |
|
uart_parse_options(options, &baud, &parity, &bits, &flow); |
|
|
|
return uart_set_options(&up->port, co, baud, parity, bits, flow); |
|
} |
|
|
|
static struct console ar933x_uart_console = { |
|
.name = "ttyATH", |
|
.write = ar933x_uart_console_write, |
|
.device = uart_console_device, |
|
.setup = ar933x_uart_console_setup, |
|
.flags = CON_PRINTBUFFER, |
|
.index = -1, |
|
.data = &ar933x_uart_driver, |
|
}; |
|
#endif /* CONFIG_SERIAL_AR933X_CONSOLE */ |
|
|
|
static struct uart_driver ar933x_uart_driver = { |
|
.owner = THIS_MODULE, |
|
.driver_name = DRIVER_NAME, |
|
.dev_name = "ttyATH", |
|
.nr = CONFIG_SERIAL_AR933X_NR_UARTS, |
|
.cons = NULL, /* filled in runtime */ |
|
}; |
|
|
|
static int ar933x_uart_probe(struct platform_device *pdev) |
|
{ |
|
struct ar933x_uart_port *up; |
|
struct uart_port *port; |
|
struct resource *mem_res; |
|
struct resource *irq_res; |
|
struct device_node *np; |
|
unsigned int baud; |
|
int id; |
|
int ret; |
|
|
|
np = pdev->dev.of_node; |
|
if (IS_ENABLED(CONFIG_OF) && np) { |
|
id = of_alias_get_id(np, "serial"); |
|
if (id < 0) { |
|
dev_err(&pdev->dev, "unable to get alias id, err=%d\n", |
|
id); |
|
return id; |
|
} |
|
} else { |
|
id = pdev->id; |
|
if (id == -1) |
|
id = 0; |
|
} |
|
|
|
if (id >= CONFIG_SERIAL_AR933X_NR_UARTS) |
|
return -EINVAL; |
|
|
|
irq_res = platform_get_resource(pdev, IORESOURCE_IRQ, 0); |
|
if (!irq_res) { |
|
dev_err(&pdev->dev, "no IRQ resource\n"); |
|
return -EINVAL; |
|
} |
|
|
|
up = devm_kzalloc(&pdev->dev, sizeof(struct ar933x_uart_port), |
|
GFP_KERNEL); |
|
if (!up) |
|
return -ENOMEM; |
|
|
|
up->clk = devm_clk_get(&pdev->dev, "uart"); |
|
if (IS_ERR(up->clk)) { |
|
dev_err(&pdev->dev, "unable to get UART clock\n"); |
|
return PTR_ERR(up->clk); |
|
} |
|
|
|
port = &up->port; |
|
|
|
mem_res = platform_get_resource(pdev, IORESOURCE_MEM, 0); |
|
port->membase = devm_ioremap_resource(&pdev->dev, mem_res); |
|
if (IS_ERR(port->membase)) |
|
return PTR_ERR(port->membase); |
|
|
|
ret = clk_prepare_enable(up->clk); |
|
if (ret) |
|
return ret; |
|
|
|
port->uartclk = clk_get_rate(up->clk); |
|
if (!port->uartclk) { |
|
ret = -EINVAL; |
|
goto err_disable_clk; |
|
} |
|
|
|
port->mapbase = mem_res->start; |
|
port->line = id; |
|
port->irq = irq_res->start; |
|
port->dev = &pdev->dev; |
|
port->type = PORT_AR933X; |
|
port->iotype = UPIO_MEM32; |
|
|
|
port->regshift = 2; |
|
port->fifosize = AR933X_UART_FIFO_SIZE; |
|
port->ops = &ar933x_uart_ops; |
|
port->rs485_config = ar933x_config_rs485; |
|
|
|
baud = ar933x_uart_get_baud(port->uartclk, AR933X_UART_MAX_SCALE, 1); |
|
up->min_baud = max_t(unsigned int, baud, AR933X_UART_MIN_BAUD); |
|
|
|
baud = ar933x_uart_get_baud(port->uartclk, 0, AR933X_UART_MAX_STEP); |
|
up->max_baud = min_t(unsigned int, baud, AR933X_UART_MAX_BAUD); |
|
|
|
ret = uart_get_rs485_mode(port); |
|
if (ret) |
|
goto err_disable_clk; |
|
|
|
up->gpios = mctrl_gpio_init(port, 0); |
|
if (IS_ERR(up->gpios) && PTR_ERR(up->gpios) != -ENOSYS) { |
|
ret = PTR_ERR(up->gpios); |
|
goto err_disable_clk; |
|
} |
|
|
|
up->rts_gpiod = mctrl_gpio_to_gpiod(up->gpios, UART_GPIO_RTS); |
|
|
|
if ((port->rs485.flags & SER_RS485_ENABLED) && |
|
!up->rts_gpiod) { |
|
dev_err(&pdev->dev, "lacking rts-gpio, disabling RS485\n"); |
|
port->rs485.flags &= ~SER_RS485_ENABLED; |
|
} |
|
|
|
#ifdef CONFIG_SERIAL_AR933X_CONSOLE |
|
ar933x_console_ports[up->port.line] = up; |
|
#endif |
|
|
|
ret = uart_add_one_port(&ar933x_uart_driver, &up->port); |
|
if (ret) |
|
goto err_disable_clk; |
|
|
|
platform_set_drvdata(pdev, up); |
|
return 0; |
|
|
|
err_disable_clk: |
|
clk_disable_unprepare(up->clk); |
|
return ret; |
|
} |
|
|
|
static int ar933x_uart_remove(struct platform_device *pdev) |
|
{ |
|
struct ar933x_uart_port *up; |
|
|
|
up = platform_get_drvdata(pdev); |
|
|
|
if (up) { |
|
uart_remove_one_port(&ar933x_uart_driver, &up->port); |
|
clk_disable_unprepare(up->clk); |
|
} |
|
|
|
return 0; |
|
} |
|
|
|
#ifdef CONFIG_OF |
|
static const struct of_device_id ar933x_uart_of_ids[] = { |
|
{ .compatible = "qca,ar9330-uart" }, |
|
{}, |
|
}; |
|
MODULE_DEVICE_TABLE(of, ar933x_uart_of_ids); |
|
#endif |
|
|
|
static struct platform_driver ar933x_uart_platform_driver = { |
|
.probe = ar933x_uart_probe, |
|
.remove = ar933x_uart_remove, |
|
.driver = { |
|
.name = DRIVER_NAME, |
|
.of_match_table = of_match_ptr(ar933x_uart_of_ids), |
|
}, |
|
}; |
|
|
|
static int __init ar933x_uart_init(void) |
|
{ |
|
int ret; |
|
|
|
#ifdef CONFIG_SERIAL_AR933X_CONSOLE |
|
ar933x_uart_driver.cons = &ar933x_uart_console; |
|
#endif |
|
|
|
ret = uart_register_driver(&ar933x_uart_driver); |
|
if (ret) |
|
goto err_out; |
|
|
|
ret = platform_driver_register(&ar933x_uart_platform_driver); |
|
if (ret) |
|
goto err_unregister_uart_driver; |
|
|
|
return 0; |
|
|
|
err_unregister_uart_driver: |
|
uart_unregister_driver(&ar933x_uart_driver); |
|
err_out: |
|
return ret; |
|
} |
|
|
|
static void __exit ar933x_uart_exit(void) |
|
{ |
|
platform_driver_unregister(&ar933x_uart_platform_driver); |
|
uart_unregister_driver(&ar933x_uart_driver); |
|
} |
|
|
|
module_init(ar933x_uart_init); |
|
module_exit(ar933x_uart_exit); |
|
|
|
MODULE_DESCRIPTION("Atheros AR933X UART driver"); |
|
MODULE_AUTHOR("Gabor Juhos <[email protected]>"); |
|
MODULE_LICENSE("GPL v2"); |
|
MODULE_ALIAS("platform:" DRIVER_NAME);
|
|
|