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173 lines
4.8 KiB
173 lines
4.8 KiB
// SPDX-License-Identifier: GPL-2.0 |
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/* |
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* Copyright 2004 Koninklijke Philips Electronics NV |
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* |
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* Conversion to platform driver and DT: |
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* Copyright 2014 Linaro Ltd. |
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* |
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* 14/04/2005 Initial version, [email protected] |
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*/ |
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#include <linux/kernel.h> |
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#include <linux/module.h> |
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#include <linux/of_address.h> |
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#include <linux/of_pci.h> |
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#include <linux/of_platform.h> |
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#include <linux/pci.h> |
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#include <linux/platform_device.h> |
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#include "../pci.h" |
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static void __iomem *versatile_pci_base; |
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static void __iomem *versatile_cfg_base[2]; |
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#define PCI_IMAP(m) (versatile_pci_base + ((m) * 4)) |
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#define PCI_SMAP(m) (versatile_pci_base + 0x14 + ((m) * 4)) |
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#define PCI_SELFID (versatile_pci_base + 0xc) |
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#define VP_PCI_DEVICE_ID 0x030010ee |
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#define VP_PCI_CLASS_ID 0x0b400000 |
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static u32 pci_slot_ignore; |
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static int __init versatile_pci_slot_ignore(char *str) |
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{ |
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int retval; |
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int slot; |
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while ((retval = get_option(&str, &slot))) { |
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if ((slot < 0) || (slot > 31)) |
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pr_err("Illegal slot value: %d\n", slot); |
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else |
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pci_slot_ignore |= (1 << slot); |
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} |
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return 1; |
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} |
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__setup("pci_slot_ignore=", versatile_pci_slot_ignore); |
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static void __iomem *versatile_map_bus(struct pci_bus *bus, |
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unsigned int devfn, int offset) |
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{ |
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unsigned int busnr = bus->number; |
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if (pci_slot_ignore & (1 << PCI_SLOT(devfn))) |
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return NULL; |
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return versatile_cfg_base[1] + ((busnr << 16) | (devfn << 8) | offset); |
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} |
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static struct pci_ops pci_versatile_ops = { |
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.map_bus = versatile_map_bus, |
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.read = pci_generic_config_read32, |
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.write = pci_generic_config_write, |
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}; |
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static int versatile_pci_probe(struct platform_device *pdev) |
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{ |
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struct device *dev = &pdev->dev; |
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struct resource *res; |
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struct resource_entry *entry; |
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int i, myslot = -1, mem = 1; |
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u32 val; |
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void __iomem *local_pci_cfg_base; |
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struct pci_host_bridge *bridge; |
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bridge = devm_pci_alloc_host_bridge(dev, 0); |
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if (!bridge) |
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return -ENOMEM; |
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versatile_pci_base = devm_platform_ioremap_resource(pdev, 0); |
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if (IS_ERR(versatile_pci_base)) |
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return PTR_ERR(versatile_pci_base); |
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versatile_cfg_base[0] = devm_platform_ioremap_resource(pdev, 1); |
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if (IS_ERR(versatile_cfg_base[0])) |
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return PTR_ERR(versatile_cfg_base[0]); |
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res = platform_get_resource(pdev, IORESOURCE_MEM, 2); |
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versatile_cfg_base[1] = devm_pci_remap_cfg_resource(dev, res); |
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if (IS_ERR(versatile_cfg_base[1])) |
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return PTR_ERR(versatile_cfg_base[1]); |
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resource_list_for_each_entry(entry, &bridge->windows) { |
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if (resource_type(entry->res) == IORESOURCE_MEM) { |
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writel(entry->res->start >> 28, PCI_IMAP(mem)); |
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writel(__pa(PAGE_OFFSET) >> 28, PCI_SMAP(mem)); |
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mem++; |
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} |
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} |
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/* |
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* We need to discover the PCI core first to configure itself |
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* before the main PCI probing is performed |
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*/ |
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for (i = 0; i < 32; i++) { |
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if ((readl(versatile_cfg_base[0] + (i << 11) + PCI_VENDOR_ID) == VP_PCI_DEVICE_ID) && |
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(readl(versatile_cfg_base[0] + (i << 11) + PCI_CLASS_REVISION) == VP_PCI_CLASS_ID)) { |
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myslot = i; |
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break; |
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} |
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} |
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if (myslot == -1) { |
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dev_err(dev, "Cannot find PCI core!\n"); |
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return -EIO; |
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} |
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/* |
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* Do not to map Versatile FPGA PCI device into memory space |
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*/ |
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pci_slot_ignore |= (1 << myslot); |
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dev_info(dev, "PCI core found (slot %d)\n", myslot); |
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writel(myslot, PCI_SELFID); |
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local_pci_cfg_base = versatile_cfg_base[1] + (myslot << 11); |
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val = readl(local_pci_cfg_base + PCI_COMMAND); |
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val |= PCI_COMMAND_MEMORY | PCI_COMMAND_MASTER | PCI_COMMAND_INVALIDATE; |
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writel(val, local_pci_cfg_base + PCI_COMMAND); |
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/* |
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* Configure the PCI inbound memory windows to be 1:1 mapped to SDRAM |
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*/ |
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writel(__pa(PAGE_OFFSET), local_pci_cfg_base + PCI_BASE_ADDRESS_0); |
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writel(__pa(PAGE_OFFSET), local_pci_cfg_base + PCI_BASE_ADDRESS_1); |
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writel(__pa(PAGE_OFFSET), local_pci_cfg_base + PCI_BASE_ADDRESS_2); |
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/* |
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* For many years the kernel and QEMU were symbiotically buggy |
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* in that they both assumed the same broken IRQ mapping. |
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* QEMU therefore attempts to auto-detect old broken kernels |
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* so that they still work on newer QEMU as they did on old |
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* QEMU. Since we now use the correct (ie matching-hardware) |
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* IRQ mapping we write a definitely different value to a |
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* PCI_INTERRUPT_LINE register to tell QEMU that we expect |
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* real hardware behaviour and it need not be backwards |
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* compatible for us. This write is harmless on real hardware. |
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*/ |
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writel(0, versatile_cfg_base[0] + PCI_INTERRUPT_LINE); |
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pci_add_flags(PCI_REASSIGN_ALL_BUS); |
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bridge->ops = &pci_versatile_ops; |
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return pci_host_probe(bridge); |
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} |
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static const struct of_device_id versatile_pci_of_match[] = { |
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{ .compatible = "arm,versatile-pci", }, |
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{ }, |
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}; |
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MODULE_DEVICE_TABLE(of, versatile_pci_of_match); |
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static struct platform_driver versatile_pci_driver = { |
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.driver = { |
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.name = "versatile-pci", |
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.of_match_table = versatile_pci_of_match, |
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.suppress_bind_attrs = true, |
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}, |
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.probe = versatile_pci_probe, |
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}; |
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module_platform_driver(versatile_pci_driver); |
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MODULE_DESCRIPTION("Versatile PCI driver"); |
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MODULE_LICENSE("GPL v2");
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