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301 lines
7.6 KiB
301 lines
7.6 KiB
// SPDX-License-Identifier: GPL-2.0-only |
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/* |
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* Rockchip eFuse Driver |
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* |
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* Copyright (c) 2015 Rockchip Electronics Co. Ltd. |
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* Author: Caesar Wang <[email protected]> |
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*/ |
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#include <linux/clk.h> |
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#include <linux/delay.h> |
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#include <linux/device.h> |
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#include <linux/io.h> |
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#include <linux/module.h> |
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#include <linux/nvmem-provider.h> |
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#include <linux/slab.h> |
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#include <linux/of.h> |
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#include <linux/of_platform.h> |
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#include <linux/platform_device.h> |
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#define RK3288_A_SHIFT 6 |
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#define RK3288_A_MASK 0x3ff |
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#define RK3288_PGENB BIT(3) |
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#define RK3288_LOAD BIT(2) |
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#define RK3288_STROBE BIT(1) |
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#define RK3288_CSB BIT(0) |
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#define RK3328_SECURE_SIZES 96 |
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#define RK3328_INT_STATUS 0x0018 |
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#define RK3328_DOUT 0x0020 |
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#define RK3328_AUTO_CTRL 0x0024 |
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#define RK3328_INT_FINISH BIT(0) |
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#define RK3328_AUTO_ENB BIT(0) |
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#define RK3328_AUTO_RD BIT(1) |
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#define RK3399_A_SHIFT 16 |
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#define RK3399_A_MASK 0x3ff |
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#define RK3399_NBYTES 4 |
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#define RK3399_STROBSFTSEL BIT(9) |
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#define RK3399_RSB BIT(7) |
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#define RK3399_PD BIT(5) |
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#define RK3399_PGENB BIT(3) |
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#define RK3399_LOAD BIT(2) |
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#define RK3399_STROBE BIT(1) |
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#define RK3399_CSB BIT(0) |
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#define REG_EFUSE_CTRL 0x0000 |
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#define REG_EFUSE_DOUT 0x0004 |
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struct rockchip_efuse_chip { |
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struct device *dev; |
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void __iomem *base; |
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struct clk *clk; |
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}; |
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static int rockchip_rk3288_efuse_read(void *context, unsigned int offset, |
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void *val, size_t bytes) |
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{ |
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struct rockchip_efuse_chip *efuse = context; |
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u8 *buf = val; |
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int ret; |
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ret = clk_prepare_enable(efuse->clk); |
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if (ret < 0) { |
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dev_err(efuse->dev, "failed to prepare/enable efuse clk\n"); |
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return ret; |
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} |
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writel(RK3288_LOAD | RK3288_PGENB, efuse->base + REG_EFUSE_CTRL); |
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udelay(1); |
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while (bytes--) { |
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writel(readl(efuse->base + REG_EFUSE_CTRL) & |
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(~(RK3288_A_MASK << RK3288_A_SHIFT)), |
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efuse->base + REG_EFUSE_CTRL); |
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writel(readl(efuse->base + REG_EFUSE_CTRL) | |
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((offset++ & RK3288_A_MASK) << RK3288_A_SHIFT), |
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efuse->base + REG_EFUSE_CTRL); |
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udelay(1); |
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writel(readl(efuse->base + REG_EFUSE_CTRL) | |
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RK3288_STROBE, efuse->base + REG_EFUSE_CTRL); |
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udelay(1); |
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*buf++ = readb(efuse->base + REG_EFUSE_DOUT); |
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writel(readl(efuse->base + REG_EFUSE_CTRL) & |
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(~RK3288_STROBE), efuse->base + REG_EFUSE_CTRL); |
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udelay(1); |
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} |
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/* Switch to standby mode */ |
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writel(RK3288_PGENB | RK3288_CSB, efuse->base + REG_EFUSE_CTRL); |
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clk_disable_unprepare(efuse->clk); |
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return 0; |
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} |
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static int rockchip_rk3328_efuse_read(void *context, unsigned int offset, |
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void *val, size_t bytes) |
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{ |
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struct rockchip_efuse_chip *efuse = context; |
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unsigned int addr_start, addr_end, addr_offset, addr_len; |
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u32 out_value, status; |
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u8 *buf; |
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int ret, i = 0; |
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ret = clk_prepare_enable(efuse->clk); |
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if (ret < 0) { |
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dev_err(efuse->dev, "failed to prepare/enable efuse clk\n"); |
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return ret; |
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} |
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/* 128 Byte efuse, 96 Byte for secure, 32 Byte for non-secure */ |
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offset += RK3328_SECURE_SIZES; |
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addr_start = rounddown(offset, RK3399_NBYTES) / RK3399_NBYTES; |
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addr_end = roundup(offset + bytes, RK3399_NBYTES) / RK3399_NBYTES; |
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addr_offset = offset % RK3399_NBYTES; |
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addr_len = addr_end - addr_start; |
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buf = kzalloc(array3_size(addr_len, RK3399_NBYTES, sizeof(*buf)), |
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GFP_KERNEL); |
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if (!buf) { |
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ret = -ENOMEM; |
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goto nomem; |
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} |
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while (addr_len--) { |
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writel(RK3328_AUTO_RD | RK3328_AUTO_ENB | |
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((addr_start++ & RK3399_A_MASK) << RK3399_A_SHIFT), |
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efuse->base + RK3328_AUTO_CTRL); |
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udelay(4); |
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status = readl(efuse->base + RK3328_INT_STATUS); |
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if (!(status & RK3328_INT_FINISH)) { |
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ret = -EIO; |
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goto err; |
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} |
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out_value = readl(efuse->base + RK3328_DOUT); |
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writel(RK3328_INT_FINISH, efuse->base + RK3328_INT_STATUS); |
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memcpy(&buf[i], &out_value, RK3399_NBYTES); |
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i += RK3399_NBYTES; |
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} |
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memcpy(val, buf + addr_offset, bytes); |
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err: |
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kfree(buf); |
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nomem: |
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clk_disable_unprepare(efuse->clk); |
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return ret; |
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} |
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static int rockchip_rk3399_efuse_read(void *context, unsigned int offset, |
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void *val, size_t bytes) |
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{ |
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struct rockchip_efuse_chip *efuse = context; |
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unsigned int addr_start, addr_end, addr_offset, addr_len; |
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u32 out_value; |
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u8 *buf; |
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int ret, i = 0; |
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ret = clk_prepare_enable(efuse->clk); |
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if (ret < 0) { |
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dev_err(efuse->dev, "failed to prepare/enable efuse clk\n"); |
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return ret; |
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} |
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addr_start = rounddown(offset, RK3399_NBYTES) / RK3399_NBYTES; |
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addr_end = roundup(offset + bytes, RK3399_NBYTES) / RK3399_NBYTES; |
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addr_offset = offset % RK3399_NBYTES; |
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addr_len = addr_end - addr_start; |
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buf = kzalloc(array3_size(addr_len, RK3399_NBYTES, sizeof(*buf)), |
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GFP_KERNEL); |
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if (!buf) { |
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clk_disable_unprepare(efuse->clk); |
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return -ENOMEM; |
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} |
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writel(RK3399_LOAD | RK3399_PGENB | RK3399_STROBSFTSEL | RK3399_RSB, |
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efuse->base + REG_EFUSE_CTRL); |
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udelay(1); |
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while (addr_len--) { |
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writel(readl(efuse->base + REG_EFUSE_CTRL) | RK3399_STROBE | |
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((addr_start++ & RK3399_A_MASK) << RK3399_A_SHIFT), |
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efuse->base + REG_EFUSE_CTRL); |
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udelay(1); |
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out_value = readl(efuse->base + REG_EFUSE_DOUT); |
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writel(readl(efuse->base + REG_EFUSE_CTRL) & (~RK3399_STROBE), |
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efuse->base + REG_EFUSE_CTRL); |
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udelay(1); |
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memcpy(&buf[i], &out_value, RK3399_NBYTES); |
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i += RK3399_NBYTES; |
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} |
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/* Switch to standby mode */ |
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writel(RK3399_PD | RK3399_CSB, efuse->base + REG_EFUSE_CTRL); |
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memcpy(val, buf + addr_offset, bytes); |
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kfree(buf); |
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clk_disable_unprepare(efuse->clk); |
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return 0; |
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} |
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static struct nvmem_config econfig = { |
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.name = "rockchip-efuse", |
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.stride = 1, |
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.word_size = 1, |
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.read_only = true, |
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}; |
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static const struct of_device_id rockchip_efuse_match[] = { |
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/* deprecated but kept around for dts binding compatibility */ |
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{ |
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.compatible = "rockchip,rockchip-efuse", |
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.data = (void *)&rockchip_rk3288_efuse_read, |
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}, |
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{ |
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.compatible = "rockchip,rk3066a-efuse", |
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.data = (void *)&rockchip_rk3288_efuse_read, |
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}, |
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{ |
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.compatible = "rockchip,rk3188-efuse", |
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.data = (void *)&rockchip_rk3288_efuse_read, |
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}, |
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{ |
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.compatible = "rockchip,rk3228-efuse", |
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.data = (void *)&rockchip_rk3288_efuse_read, |
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}, |
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{ |
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.compatible = "rockchip,rk3288-efuse", |
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.data = (void *)&rockchip_rk3288_efuse_read, |
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}, |
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{ |
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.compatible = "rockchip,rk3368-efuse", |
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.data = (void *)&rockchip_rk3288_efuse_read, |
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}, |
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{ |
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.compatible = "rockchip,rk3328-efuse", |
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.data = (void *)&rockchip_rk3328_efuse_read, |
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}, |
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{ |
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.compatible = "rockchip,rk3399-efuse", |
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.data = (void *)&rockchip_rk3399_efuse_read, |
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}, |
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{ /* sentinel */}, |
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}; |
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MODULE_DEVICE_TABLE(of, rockchip_efuse_match); |
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static int rockchip_efuse_probe(struct platform_device *pdev) |
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{ |
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struct resource *res; |
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struct nvmem_device *nvmem; |
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struct rockchip_efuse_chip *efuse; |
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const void *data; |
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struct device *dev = &pdev->dev; |
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data = of_device_get_match_data(dev); |
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if (!data) { |
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dev_err(dev, "failed to get match data\n"); |
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return -EINVAL; |
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} |
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efuse = devm_kzalloc(dev, sizeof(struct rockchip_efuse_chip), |
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GFP_KERNEL); |
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if (!efuse) |
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return -ENOMEM; |
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res = platform_get_resource(pdev, IORESOURCE_MEM, 0); |
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efuse->base = devm_ioremap_resource(dev, res); |
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if (IS_ERR(efuse->base)) |
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return PTR_ERR(efuse->base); |
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efuse->clk = devm_clk_get(dev, "pclk_efuse"); |
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if (IS_ERR(efuse->clk)) |
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return PTR_ERR(efuse->clk); |
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efuse->dev = dev; |
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if (of_property_read_u32(dev->of_node, "rockchip,efuse-size", |
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&econfig.size)) |
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econfig.size = resource_size(res); |
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econfig.reg_read = data; |
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econfig.priv = efuse; |
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econfig.dev = efuse->dev; |
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nvmem = devm_nvmem_register(dev, &econfig); |
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return PTR_ERR_OR_ZERO(nvmem); |
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} |
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static struct platform_driver rockchip_efuse_driver = { |
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.probe = rockchip_efuse_probe, |
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.driver = { |
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.name = "rockchip-efuse", |
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.of_match_table = rockchip_efuse_match, |
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}, |
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}; |
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module_platform_driver(rockchip_efuse_driver); |
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MODULE_DESCRIPTION("rockchip_efuse driver"); |
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MODULE_LICENSE("GPL v2");
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