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382 lines
10 KiB
382 lines
10 KiB
/* SPDX-License-Identifier: GPL-2.0 */ |
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/* |
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* ddbridge.h: Digital Devices PCIe bridge driver |
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* |
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* Copyright (C) 2010-2017 Digital Devices GmbH |
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* Ralph Metzler <[email protected]> |
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* |
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* This program is free software; you can redistribute it and/or |
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* modify it under the terms of the GNU General Public License |
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* version 2 only, as published by the Free Software Foundation. |
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* |
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* This program is distributed in the hope that it will be useful, |
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* but WITHOUT ANY WARRANTY; without even the implied warranty of |
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
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* GNU General Public License for more details. |
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*/ |
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#ifndef _DDBRIDGE_H_ |
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#define _DDBRIDGE_H_ |
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#include <linux/clk.h> |
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#include <linux/completion.h> |
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#include <linux/delay.h> |
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#include <linux/device.h> |
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#include <linux/dvb/ca.h> |
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#include <linux/gpio.h> |
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#include <linux/i2c.h> |
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#include <linux/init.h> |
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#include <linux/interrupt.h> |
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#include <linux/io.h> |
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#include <linux/kthread.h> |
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#include <linux/module.h> |
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#include <linux/mutex.h> |
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#include <linux/pci.h> |
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#include <linux/platform_device.h> |
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#include <linux/poll.h> |
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#include <linux/sched.h> |
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#include <linux/slab.h> |
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#include <linux/socket.h> |
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#include <linux/spi/spi.h> |
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#include <linux/swab.h> |
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#include <linux/timer.h> |
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#include <linux/types.h> |
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#include <linux/uaccess.h> |
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#include <linux/vmalloc.h> |
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#include <linux/workqueue.h> |
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#include <asm/dma.h> |
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#include <asm/irq.h> |
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#include <media/dmxdev.h> |
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#include <media/dvb_ca_en50221.h> |
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#include <media/dvb_demux.h> |
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#include <media/dvbdev.h> |
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#include <media/dvb_frontend.h> |
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#include <media/dvb_net.h> |
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#include <media/dvb_ringbuffer.h> |
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#define DDBRIDGE_VERSION "0.9.33-integrated" |
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#define DDB_MAX_I2C 32 |
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#define DDB_MAX_PORT 32 |
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#define DDB_MAX_INPUT 64 |
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#define DDB_MAX_OUTPUT 32 |
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#define DDB_MAX_LINK 4 |
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#define DDB_LINK_SHIFT 28 |
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#define DDB_LINK_TAG(_x) (_x << DDB_LINK_SHIFT) |
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struct ddb_regset { |
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u32 base; |
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u32 num; |
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u32 size; |
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}; |
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struct ddb_regmap { |
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u32 irq_base_i2c; |
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u32 irq_base_idma; |
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u32 irq_base_odma; |
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const struct ddb_regset *i2c; |
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const struct ddb_regset *i2c_buf; |
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const struct ddb_regset *idma; |
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const struct ddb_regset *idma_buf; |
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const struct ddb_regset *odma; |
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const struct ddb_regset *odma_buf; |
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const struct ddb_regset *input; |
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const struct ddb_regset *output; |
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const struct ddb_regset *channel; |
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}; |
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struct ddb_ids { |
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u16 vendor; |
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u16 device; |
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u16 subvendor; |
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u16 subdevice; |
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u32 hwid; |
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u32 regmapid; |
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u32 devid; |
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u32 mac; |
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}; |
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struct ddb_info { |
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int type; |
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#define DDB_NONE 0 |
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#define DDB_OCTOPUS 1 |
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#define DDB_OCTOPUS_CI 2 |
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#define DDB_OCTOPUS_MAX 5 |
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#define DDB_OCTOPUS_MAX_CT 6 |
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#define DDB_OCTOPUS_MCI 9 |
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char *name; |
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u32 i2c_mask; |
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u32 board_control; |
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u32 board_control_2; |
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u8 port_num; |
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u8 led_num; |
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u8 fan_num; |
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u8 temp_num; |
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u8 temp_bus; |
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u8 con_clock; /* use a continuous clock */ |
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u8 ts_quirks; |
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#define TS_QUIRK_SERIAL 1 |
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#define TS_QUIRK_REVERSED 2 |
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#define TS_QUIRK_ALT_OSC 8 |
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u8 mci_ports; |
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u8 mci_type; |
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u32 tempmon_irq; |
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const struct ddb_regmap *regmap; |
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}; |
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#define DMA_MAX_BUFS 32 /* hardware table limit */ |
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struct ddb; |
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struct ddb_port; |
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struct ddb_dma { |
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void *io; |
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u32 regs; |
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u32 bufregs; |
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dma_addr_t pbuf[DMA_MAX_BUFS]; |
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u8 *vbuf[DMA_MAX_BUFS]; |
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u32 num; |
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u32 size; |
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u32 div; |
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u32 bufval; |
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struct work_struct work; |
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spinlock_t lock; /* DMA lock */ |
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wait_queue_head_t wq; |
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int running; |
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u32 stat; |
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u32 ctrl; |
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u32 cbuf; |
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u32 coff; |
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}; |
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struct ddb_dvb { |
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struct dvb_adapter *adap; |
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int adap_registered; |
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struct dvb_device *dev; |
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struct i2c_client *i2c_client[1]; |
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struct dvb_frontend *fe; |
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struct dvb_frontend *fe2; |
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struct dmxdev dmxdev; |
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struct dvb_demux demux; |
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struct dvb_net dvbnet; |
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struct dmx_frontend hw_frontend; |
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struct dmx_frontend mem_frontend; |
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int users; |
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u32 attached; |
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u8 input; |
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enum fe_sec_tone_mode tone; |
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enum fe_sec_voltage voltage; |
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int (*i2c_gate_ctrl)(struct dvb_frontend *, int); |
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int (*set_voltage)(struct dvb_frontend *fe, |
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enum fe_sec_voltage voltage); |
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int (*set_input)(struct dvb_frontend *fe, int input); |
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int (*diseqc_send_master_cmd)(struct dvb_frontend *fe, |
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struct dvb_diseqc_master_cmd *cmd); |
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}; |
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struct ddb_ci { |
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struct dvb_ca_en50221 en; |
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struct ddb_port *port; |
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u32 nr; |
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}; |
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struct ddb_io { |
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struct ddb_port *port; |
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u32 nr; |
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u32 regs; |
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struct ddb_dma *dma; |
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struct ddb_io *redo; |
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struct ddb_io *redi; |
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}; |
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#define ddb_output ddb_io |
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#define ddb_input ddb_io |
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struct ddb_i2c { |
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struct ddb *dev; |
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u32 nr; |
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u32 regs; |
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u32 link; |
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struct i2c_adapter adap; |
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u32 rbuf; |
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u32 wbuf; |
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u32 bsize; |
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struct completion completion; |
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}; |
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struct ddb_port { |
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struct ddb *dev; |
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u32 nr; |
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u32 pnr; |
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u32 regs; |
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u32 lnr; |
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struct ddb_i2c *i2c; |
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struct mutex i2c_gate_lock; /* I2C access lock */ |
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u32 class; |
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#define DDB_PORT_NONE 0 |
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#define DDB_PORT_CI 1 |
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#define DDB_PORT_TUNER 2 |
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#define DDB_PORT_LOOP 3 |
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char *name; |
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char *type_name; |
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u32 type; |
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#define DDB_TUNER_DUMMY 0xffffffff |
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#define DDB_TUNER_NONE 0 |
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#define DDB_TUNER_DVBS_ST 1 |
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#define DDB_TUNER_DVBS_ST_AA 2 |
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#define DDB_TUNER_DVBCT_TR 3 |
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#define DDB_TUNER_DVBCT_ST 4 |
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#define DDB_CI_INTERNAL 5 |
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#define DDB_CI_EXTERNAL_SONY 6 |
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#define DDB_TUNER_DVBCT2_SONY_P 7 |
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#define DDB_TUNER_DVBC2T2_SONY_P 8 |
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#define DDB_TUNER_ISDBT_SONY_P 9 |
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#define DDB_TUNER_DVBS_STV0910_P 10 |
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#define DDB_TUNER_MXL5XX 11 |
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#define DDB_CI_EXTERNAL_XO2 12 |
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#define DDB_CI_EXTERNAL_XO2_B 13 |
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#define DDB_TUNER_DVBS_STV0910_PR 14 |
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#define DDB_TUNER_DVBC2T2I_SONY_P 15 |
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#define DDB_TUNER_XO2 32 |
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#define DDB_TUNER_DVBS_STV0910 (DDB_TUNER_XO2 + 0) |
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#define DDB_TUNER_DVBCT2_SONY (DDB_TUNER_XO2 + 1) |
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#define DDB_TUNER_ISDBT_SONY (DDB_TUNER_XO2 + 2) |
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#define DDB_TUNER_DVBC2T2_SONY (DDB_TUNER_XO2 + 3) |
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#define DDB_TUNER_ATSC_ST (DDB_TUNER_XO2 + 4) |
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#define DDB_TUNER_DVBC2T2I_SONY (DDB_TUNER_XO2 + 5) |
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#define DDB_TUNER_MCI 48 |
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#define DDB_TUNER_MCI_SX8 (DDB_TUNER_MCI + 0) |
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struct ddb_input *input[2]; |
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struct ddb_output *output; |
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struct dvb_ca_en50221 *en; |
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u8 en_freedata; |
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struct ddb_dvb dvb[2]; |
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u32 gap; |
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u32 obr; |
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u8 creg; |
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}; |
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#define CM_STARTUP_DELAY 2 |
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#define CM_AVERAGE 20 |
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#define CM_GAIN 10 |
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#define HW_LSB_SHIFT 12 |
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#define HW_LSB_MASK 0x1000 |
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#define CM_IDLE 0 |
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#define CM_STARTUP 1 |
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#define CM_ADJUST 2 |
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#define TS_CAPTURE_LEN (4096) |
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struct ddb_lnb { |
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struct mutex lock; /* lock lnb access */ |
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u32 tone; |
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enum fe_sec_voltage oldvoltage[4]; |
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u32 voltage[4]; |
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u32 voltages; |
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u32 fmode; |
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}; |
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struct ddb_irq { |
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void (*handler)(void *); |
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void *data; |
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}; |
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struct ddb_link { |
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struct ddb *dev; |
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const struct ddb_info *info; |
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u32 nr; |
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u32 regs; |
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spinlock_t lock; /* lock link access */ |
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struct mutex flash_mutex; /* lock flash access */ |
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struct ddb_lnb lnb; |
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struct tasklet_struct tasklet; |
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struct ddb_ids ids; |
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spinlock_t temp_lock; /* lock temp chip access */ |
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int overtemperature_error; |
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u8 temp_tab[11]; |
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struct ddb_irq irq[256]; |
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}; |
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struct ddb { |
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struct pci_dev *pdev; |
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struct platform_device *pfdev; |
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struct device *dev; |
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int msi; |
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struct workqueue_struct *wq; |
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u32 has_dma; |
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struct ddb_link link[DDB_MAX_LINK]; |
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unsigned char __iomem *regs; |
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u32 regs_len; |
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u32 port_num; |
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struct ddb_port port[DDB_MAX_PORT]; |
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u32 i2c_num; |
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struct ddb_i2c i2c[DDB_MAX_I2C]; |
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struct ddb_input input[DDB_MAX_INPUT]; |
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struct ddb_output output[DDB_MAX_OUTPUT]; |
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struct dvb_adapter adap[DDB_MAX_INPUT]; |
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struct ddb_dma idma[DDB_MAX_INPUT]; |
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struct ddb_dma odma[DDB_MAX_OUTPUT]; |
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struct device *ddb_dev; |
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u32 ddb_dev_users; |
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u32 nr; |
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u8 iobuf[1028]; |
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u8 leds; |
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u32 ts_irq; |
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u32 i2c_irq; |
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struct mutex mutex; /* lock access to global ddb array */ |
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u8 tsbuf[TS_CAPTURE_LEN]; |
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}; |
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/****************************************************************************/ |
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/****************************************************************************/ |
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/****************************************************************************/ |
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int ddbridge_flashread(struct ddb *dev, u32 link, u8 *buf, u32 addr, u32 len); |
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/****************************************************************************/ |
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/* ddbridge-core.c */ |
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struct ddb_irq *ddb_irq_set(struct ddb *dev, u32 link, u32 nr, |
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void (*handler)(void *), void *data); |
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void ddb_ports_detach(struct ddb *dev); |
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void ddb_ports_release(struct ddb *dev); |
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void ddb_buffers_free(struct ddb *dev); |
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void ddb_device_destroy(struct ddb *dev); |
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irqreturn_t ddb_irq_handler0(int irq, void *dev_id); |
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irqreturn_t ddb_irq_handler1(int irq, void *dev_id); |
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irqreturn_t ddb_irq_handler(int irq, void *dev_id); |
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void ddb_ports_init(struct ddb *dev); |
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int ddb_buffers_alloc(struct ddb *dev); |
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int ddb_ports_attach(struct ddb *dev); |
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int ddb_device_create(struct ddb *dev); |
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int ddb_init(struct ddb *dev); |
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void ddb_unmap(struct ddb *dev); |
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int ddb_exit_ddbridge(int stage, int error); |
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int ddb_init_ddbridge(void); |
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#endif /* DDBRIDGE_H */
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