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131 lines
4.1 KiB
131 lines
4.1 KiB
[ |
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{ |
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"ArchStdEvent": "SW_INCR" |
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}, |
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{ |
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"ArchStdEvent": "INST_RETIRED" |
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}, |
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{ |
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"ArchStdEvent": "EXC_RETURN" |
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}, |
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{ |
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"ArchStdEvent": "CID_WRITE_RETIRED" |
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}, |
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{ |
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"ArchStdEvent": "INST_SPEC" |
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}, |
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{ |
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"ArchStdEvent": "LDREX_SPEC" |
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}, |
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{ |
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"ArchStdEvent": "STREX_SPEC" |
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}, |
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{ |
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"ArchStdEvent": "LD_SPEC" |
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}, |
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{ |
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"ArchStdEvent": "ST_SPEC" |
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}, |
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{ |
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"ArchStdEvent": "LDST_SPEC" |
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}, |
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{ |
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"ArchStdEvent": "DP_SPEC" |
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}, |
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{ |
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"ArchStdEvent": "ASE_SPEC" |
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}, |
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{ |
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"ArchStdEvent": "VFP_SPEC" |
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}, |
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{ |
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"ArchStdEvent": "PC_WRITE_SPEC" |
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}, |
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{ |
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"ArchStdEvent": "CRYPTO_SPEC" |
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}, |
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{ |
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"ArchStdEvent": "BR_IMMED_SPEC" |
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}, |
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{ |
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"ArchStdEvent": "BR_RETURN_SPEC" |
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}, |
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{ |
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"ArchStdEvent": "BR_INDIRECT_SPEC" |
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}, |
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{ |
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"ArchStdEvent": "ISB_SPEC" |
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}, |
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{ |
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"ArchStdEvent": "DSB_SPEC" |
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}, |
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{ |
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"ArchStdEvent": "DMB_SPEC" |
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}, |
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{ |
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"PublicDescription": "This event counts architecturally executed zero blocking operations due to the 'DC ZVA' instruction.", |
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"EventCode": "0x9F", |
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"EventName": "DCZVA_SPEC", |
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"BriefDescription": "This event counts architecturally executed zero blocking operations due to the 'DC ZVA' instruction." |
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}, |
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{ |
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"PublicDescription": "This event counts architecturally executed floating-point move operations.", |
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"EventCode": "0x105", |
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"EventName": "FP_MV_SPEC", |
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"BriefDescription": "This event counts architecturally executed floating-point move operations." |
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}, |
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{ |
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"PublicDescription": "This event counts architecturally executed operations that using predicate register.", |
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"EventCode": "0x108", |
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"EventName": "PRD_SPEC", |
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"BriefDescription": "This event counts architecturally executed operations that using predicate register." |
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}, |
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{ |
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"PublicDescription": "This event counts architecturally executed inter-element manipulation operations.", |
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"EventCode": "0x109", |
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"EventName": "IEL_SPEC", |
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"BriefDescription": "This event counts architecturally executed inter-element manipulation operations." |
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}, |
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{ |
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"PublicDescription": "This event counts architecturally executed inter-register manipulation operations.", |
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"EventCode": "0x10A", |
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"EventName": "IREG_SPEC", |
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"BriefDescription": "This event counts architecturally executed inter-register manipulation operations." |
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}, |
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{ |
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"PublicDescription": "This event counts architecturally executed NOSIMD load operations that using SIMD&FP registers.", |
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"EventCode": "0x112", |
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"EventName": "FP_LD_SPEC", |
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"BriefDescription": "This event counts architecturally executed NOSIMD load operations that using SIMD&FP registers." |
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}, |
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{ |
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"PublicDescription": "This event counts architecturally executed NOSIMD store operations that using SIMD&FP registers.", |
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"EventCode": "0x113", |
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"EventName": "FP_ST_SPEC", |
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"BriefDescription": "This event counts architecturally executed NOSIMD store operations that using SIMD&FP registers." |
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}, |
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{ |
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"PublicDescription": "This event counts architecturally executed SIMD broadcast floating-point load operations.", |
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"EventCode": "0x11A", |
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"EventName": "BC_LD_SPEC", |
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"BriefDescription": "This event counts architecturally executed SIMD broadcast floating-point load operations." |
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}, |
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{ |
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"PublicDescription": "This event counts architecturally executed instructions, excluding the MOVPRFX instruction.", |
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"EventCode": "0x121", |
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"EventName": "EFFECTIVE_INST_SPEC", |
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"BriefDescription": "This event counts architecturally executed instructions, excluding the MOVPRFX instruction." |
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}, |
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{ |
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"PublicDescription": "This event counts architecturally executed operations that uses 'pre-index' as its addressing mode.", |
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"EventCode": "0x123", |
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"EventName": "PRE_INDEX_SPEC", |
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"BriefDescription": "This event counts architecturally executed operations that uses 'pre-index' as its addressing mode." |
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}, |
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{ |
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"PublicDescription": "This event counts architecturally executed operations that uses 'post-index' as its addressing mode.", |
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"EventCode": "0x124", |
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"EventName": "POST_INDEX_SPEC", |
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"BriefDescription": "This event counts architecturally executed operations that uses 'post-index' as its addressing mode." |
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} |
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]
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