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641 lines
13 KiB
641 lines
13 KiB
// SPDX-License-Identifier: GPL-2.0-or-later |
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/* |
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Conexant 22702 DVB OFDM demodulator driver |
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based on: |
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Alps TDMB7 DVB OFDM demodulator driver |
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Copyright (C) 2001-2002 Convergence Integrated Media GmbH |
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Holger Waechtler <[email protected]> |
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Copyright (C) 2004 Steven Toth <[email protected]> |
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*/ |
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#include <linux/kernel.h> |
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#include <linux/init.h> |
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#include <linux/module.h> |
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#include <linux/string.h> |
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#include <linux/slab.h> |
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#include <linux/delay.h> |
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#include <media/dvb_frontend.h> |
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#include "cx22702.h" |
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struct cx22702_state { |
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struct i2c_adapter *i2c; |
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/* configuration settings */ |
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const struct cx22702_config *config; |
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struct dvb_frontend frontend; |
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/* previous uncorrected block counter */ |
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u8 prevUCBlocks; |
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}; |
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static int debug; |
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module_param(debug, int, 0644); |
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MODULE_PARM_DESC(debug, "Enable verbose debug messages"); |
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#define dprintk if (debug) printk |
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/* Register values to initialise the demod */ |
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static const u8 init_tab[] = { |
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0x00, 0x00, /* Stop acquisition */ |
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0x0B, 0x06, |
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0x09, 0x01, |
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0x0D, 0x41, |
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0x16, 0x32, |
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0x20, 0x0A, |
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0x21, 0x17, |
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0x24, 0x3e, |
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0x26, 0xff, |
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0x27, 0x10, |
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0x28, 0x00, |
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0x29, 0x00, |
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0x2a, 0x10, |
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0x2b, 0x00, |
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0x2c, 0x10, |
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0x2d, 0x00, |
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0x48, 0xd4, |
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0x49, 0x56, |
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0x6b, 0x1e, |
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0xc8, 0x02, |
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0xf9, 0x00, |
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0xfa, 0x00, |
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0xfb, 0x00, |
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0xfc, 0x00, |
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0xfd, 0x00, |
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}; |
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static int cx22702_writereg(struct cx22702_state *state, u8 reg, u8 data) |
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{ |
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int ret; |
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u8 buf[] = { reg, data }; |
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struct i2c_msg msg = { |
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.addr = state->config->demod_address, .flags = 0, |
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.buf = buf, .len = 2 }; |
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ret = i2c_transfer(state->i2c, &msg, 1); |
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if (unlikely(ret != 1)) { |
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printk(KERN_ERR |
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"%s: error (reg == 0x%02x, val == 0x%02x, ret == %i)\n", |
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__func__, reg, data, ret); |
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return -1; |
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} |
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return 0; |
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} |
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static u8 cx22702_readreg(struct cx22702_state *state, u8 reg) |
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{ |
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int ret; |
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u8 data; |
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struct i2c_msg msg[] = { |
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{ .addr = state->config->demod_address, .flags = 0, |
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.buf = ®, .len = 1 }, |
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{ .addr = state->config->demod_address, .flags = I2C_M_RD, |
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.buf = &data, .len = 1 } }; |
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ret = i2c_transfer(state->i2c, msg, 2); |
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if (unlikely(ret != 2)) { |
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printk(KERN_ERR "%s: error (reg == 0x%02x, ret == %i)\n", |
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__func__, reg, ret); |
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return 0; |
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} |
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return data; |
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} |
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static int cx22702_set_inversion(struct cx22702_state *state, int inversion) |
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{ |
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u8 val; |
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val = cx22702_readreg(state, 0x0C); |
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switch (inversion) { |
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case INVERSION_AUTO: |
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return -EOPNOTSUPP; |
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case INVERSION_ON: |
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val |= 0x01; |
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break; |
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case INVERSION_OFF: |
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val &= 0xfe; |
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break; |
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default: |
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return -EINVAL; |
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} |
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return cx22702_writereg(state, 0x0C, val); |
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} |
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/* Retrieve the demod settings */ |
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static int cx22702_get_tps(struct cx22702_state *state, |
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struct dtv_frontend_properties *p) |
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{ |
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u8 val; |
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/* Make sure the TPS regs are valid */ |
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if (!(cx22702_readreg(state, 0x0A) & 0x20)) |
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return -EAGAIN; |
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val = cx22702_readreg(state, 0x01); |
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switch ((val & 0x18) >> 3) { |
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case 0: |
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p->modulation = QPSK; |
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break; |
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case 1: |
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p->modulation = QAM_16; |
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break; |
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case 2: |
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p->modulation = QAM_64; |
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break; |
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} |
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switch (val & 0x07) { |
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case 0: |
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p->hierarchy = HIERARCHY_NONE; |
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break; |
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case 1: |
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p->hierarchy = HIERARCHY_1; |
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break; |
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case 2: |
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p->hierarchy = HIERARCHY_2; |
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break; |
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case 3: |
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p->hierarchy = HIERARCHY_4; |
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break; |
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} |
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val = cx22702_readreg(state, 0x02); |
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switch ((val & 0x38) >> 3) { |
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case 0: |
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p->code_rate_HP = FEC_1_2; |
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break; |
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case 1: |
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p->code_rate_HP = FEC_2_3; |
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break; |
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case 2: |
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p->code_rate_HP = FEC_3_4; |
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break; |
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case 3: |
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p->code_rate_HP = FEC_5_6; |
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break; |
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case 4: |
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p->code_rate_HP = FEC_7_8; |
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break; |
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} |
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switch (val & 0x07) { |
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case 0: |
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p->code_rate_LP = FEC_1_2; |
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break; |
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case 1: |
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p->code_rate_LP = FEC_2_3; |
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break; |
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case 2: |
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p->code_rate_LP = FEC_3_4; |
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break; |
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case 3: |
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p->code_rate_LP = FEC_5_6; |
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break; |
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case 4: |
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p->code_rate_LP = FEC_7_8; |
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break; |
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} |
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val = cx22702_readreg(state, 0x03); |
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switch ((val & 0x0c) >> 2) { |
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case 0: |
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p->guard_interval = GUARD_INTERVAL_1_32; |
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break; |
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case 1: |
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p->guard_interval = GUARD_INTERVAL_1_16; |
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break; |
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case 2: |
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p->guard_interval = GUARD_INTERVAL_1_8; |
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break; |
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case 3: |
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p->guard_interval = GUARD_INTERVAL_1_4; |
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break; |
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} |
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switch (val & 0x03) { |
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case 0: |
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p->transmission_mode = TRANSMISSION_MODE_2K; |
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break; |
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case 1: |
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p->transmission_mode = TRANSMISSION_MODE_8K; |
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break; |
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} |
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return 0; |
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} |
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static int cx22702_i2c_gate_ctrl(struct dvb_frontend *fe, int enable) |
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{ |
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struct cx22702_state *state = fe->demodulator_priv; |
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u8 val; |
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dprintk("%s(%d)\n", __func__, enable); |
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val = cx22702_readreg(state, 0x0D); |
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if (enable) |
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val &= 0xfe; |
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else |
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val |= 0x01; |
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return cx22702_writereg(state, 0x0D, val); |
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} |
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/* Talk to the demod, set the FEC, GUARD, QAM settings etc */ |
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static int cx22702_set_tps(struct dvb_frontend *fe) |
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{ |
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struct dtv_frontend_properties *p = &fe->dtv_property_cache; |
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u8 val; |
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struct cx22702_state *state = fe->demodulator_priv; |
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if (fe->ops.tuner_ops.set_params) { |
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fe->ops.tuner_ops.set_params(fe); |
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if (fe->ops.i2c_gate_ctrl) |
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fe->ops.i2c_gate_ctrl(fe, 0); |
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} |
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/* set inversion */ |
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cx22702_set_inversion(state, p->inversion); |
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/* set bandwidth */ |
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val = cx22702_readreg(state, 0x0C) & 0xcf; |
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switch (p->bandwidth_hz) { |
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case 6000000: |
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val |= 0x20; |
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break; |
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case 7000000: |
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val |= 0x10; |
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break; |
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case 8000000: |
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break; |
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default: |
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dprintk("%s: invalid bandwidth\n", __func__); |
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return -EINVAL; |
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} |
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cx22702_writereg(state, 0x0C, val); |
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p->code_rate_LP = FEC_AUTO; /* temp hack as manual not working */ |
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/* use auto configuration? */ |
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if ((p->hierarchy == HIERARCHY_AUTO) || |
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(p->modulation == QAM_AUTO) || |
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(p->code_rate_HP == FEC_AUTO) || |
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(p->code_rate_LP == FEC_AUTO) || |
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(p->guard_interval == GUARD_INTERVAL_AUTO) || |
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(p->transmission_mode == TRANSMISSION_MODE_AUTO)) { |
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/* TPS Source - use hardware driven values */ |
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cx22702_writereg(state, 0x06, 0x10); |
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cx22702_writereg(state, 0x07, 0x9); |
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cx22702_writereg(state, 0x08, 0xC1); |
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cx22702_writereg(state, 0x0B, cx22702_readreg(state, 0x0B) |
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& 0xfc); |
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cx22702_writereg(state, 0x0C, |
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(cx22702_readreg(state, 0x0C) & 0xBF) | 0x40); |
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cx22702_writereg(state, 0x00, 0x01); /* Begin acquisition */ |
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dprintk("%s: Autodetecting\n", __func__); |
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return 0; |
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} |
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/* manually programmed values */ |
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switch (p->modulation) { /* mask 0x18 */ |
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case QPSK: |
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val = 0x00; |
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break; |
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case QAM_16: |
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val = 0x08; |
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break; |
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case QAM_64: |
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val = 0x10; |
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break; |
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default: |
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dprintk("%s: invalid modulation\n", __func__); |
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return -EINVAL; |
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} |
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switch (p->hierarchy) { /* mask 0x07 */ |
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case HIERARCHY_NONE: |
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break; |
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case HIERARCHY_1: |
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val |= 0x01; |
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break; |
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case HIERARCHY_2: |
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val |= 0x02; |
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break; |
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case HIERARCHY_4: |
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val |= 0x03; |
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break; |
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default: |
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dprintk("%s: invalid hierarchy\n", __func__); |
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return -EINVAL; |
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} |
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cx22702_writereg(state, 0x06, val); |
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switch (p->code_rate_HP) { /* mask 0x38 */ |
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case FEC_NONE: |
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case FEC_1_2: |
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val = 0x00; |
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break; |
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case FEC_2_3: |
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val = 0x08; |
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break; |
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case FEC_3_4: |
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val = 0x10; |
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break; |
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case FEC_5_6: |
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val = 0x18; |
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break; |
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case FEC_7_8: |
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val = 0x20; |
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break; |
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default: |
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dprintk("%s: invalid code_rate_HP\n", __func__); |
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return -EINVAL; |
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} |
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switch (p->code_rate_LP) { /* mask 0x07 */ |
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case FEC_NONE: |
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case FEC_1_2: |
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break; |
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case FEC_2_3: |
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val |= 0x01; |
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break; |
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case FEC_3_4: |
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val |= 0x02; |
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break; |
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case FEC_5_6: |
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val |= 0x03; |
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break; |
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case FEC_7_8: |
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val |= 0x04; |
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break; |
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default: |
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dprintk("%s: invalid code_rate_LP\n", __func__); |
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return -EINVAL; |
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} |
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cx22702_writereg(state, 0x07, val); |
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switch (p->guard_interval) { /* mask 0x0c */ |
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case GUARD_INTERVAL_1_32: |
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val = 0x00; |
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break; |
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case GUARD_INTERVAL_1_16: |
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val = 0x04; |
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break; |
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case GUARD_INTERVAL_1_8: |
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val = 0x08; |
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break; |
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case GUARD_INTERVAL_1_4: |
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val = 0x0c; |
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break; |
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default: |
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dprintk("%s: invalid guard_interval\n", __func__); |
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return -EINVAL; |
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} |
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switch (p->transmission_mode) { /* mask 0x03 */ |
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case TRANSMISSION_MODE_2K: |
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break; |
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case TRANSMISSION_MODE_8K: |
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val |= 0x1; |
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break; |
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default: |
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dprintk("%s: invalid transmission_mode\n", __func__); |
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return -EINVAL; |
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} |
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cx22702_writereg(state, 0x08, val); |
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cx22702_writereg(state, 0x0B, |
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(cx22702_readreg(state, 0x0B) & 0xfc) | 0x02); |
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cx22702_writereg(state, 0x0C, |
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(cx22702_readreg(state, 0x0C) & 0xBF) | 0x40); |
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/* Begin channel acquisition */ |
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cx22702_writereg(state, 0x00, 0x01); |
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return 0; |
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} |
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/* Reset the demod hardware and reset all of the configuration registers |
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to a default state. */ |
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static int cx22702_init(struct dvb_frontend *fe) |
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{ |
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int i; |
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struct cx22702_state *state = fe->demodulator_priv; |
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cx22702_writereg(state, 0x00, 0x02); |
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msleep(10); |
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for (i = 0; i < ARRAY_SIZE(init_tab); i += 2) |
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cx22702_writereg(state, init_tab[i], init_tab[i + 1]); |
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cx22702_writereg(state, 0xf8, (state->config->output_mode << 1) |
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& 0x02); |
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cx22702_i2c_gate_ctrl(fe, 0); |
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return 0; |
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} |
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static int cx22702_read_status(struct dvb_frontend *fe, enum fe_status *status) |
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{ |
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struct cx22702_state *state = fe->demodulator_priv; |
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u8 reg0A; |
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u8 reg23; |
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*status = 0; |
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reg0A = cx22702_readreg(state, 0x0A); |
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reg23 = cx22702_readreg(state, 0x23); |
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dprintk("%s: status demod=0x%02x agc=0x%02x\n" |
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, __func__, reg0A, reg23); |
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if (reg0A & 0x10) { |
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*status |= FE_HAS_LOCK; |
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*status |= FE_HAS_VITERBI; |
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*status |= FE_HAS_SYNC; |
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} |
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if (reg0A & 0x20) |
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*status |= FE_HAS_CARRIER; |
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if (reg23 < 0xf0) |
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*status |= FE_HAS_SIGNAL; |
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return 0; |
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} |
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static int cx22702_read_ber(struct dvb_frontend *fe, u32 *ber) |
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{ |
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struct cx22702_state *state = fe->demodulator_priv; |
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if (cx22702_readreg(state, 0xE4) & 0x02) { |
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/* Realtime statistics */ |
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*ber = (cx22702_readreg(state, 0xDE) & 0x7F) << 7 |
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| (cx22702_readreg(state, 0xDF) & 0x7F); |
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} else { |
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/* Averagtine statistics */ |
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*ber = (cx22702_readreg(state, 0xDE) & 0x7F) << 7 |
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| cx22702_readreg(state, 0xDF); |
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} |
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return 0; |
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} |
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static int cx22702_read_signal_strength(struct dvb_frontend *fe, |
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u16 *signal_strength) |
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{ |
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struct cx22702_state *state = fe->demodulator_priv; |
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u8 reg23; |
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/* |
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* Experience suggests that the strength signal register works as |
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* follows: |
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* - In the absence of signal, value is 0xff. |
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* - In the presence of a weak signal, bit 7 is set, not sure what |
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* the lower 7 bits mean. |
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* - In the presence of a strong signal, the register holds a 7-bit |
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* value (bit 7 is cleared), with greater values standing for |
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* weaker signals. |
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*/ |
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reg23 = cx22702_readreg(state, 0x23); |
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if (reg23 & 0x80) { |
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*signal_strength = 0; |
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} else { |
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reg23 = ~reg23 & 0x7f; |
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/* Scale to 16 bit */ |
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*signal_strength = (reg23 << 9) | (reg23 << 2) | (reg23 >> 5); |
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} |
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return 0; |
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} |
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static int cx22702_read_snr(struct dvb_frontend *fe, u16 *snr) |
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{ |
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struct cx22702_state *state = fe->demodulator_priv; |
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|
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u16 rs_ber; |
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if (cx22702_readreg(state, 0xE4) & 0x02) { |
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/* Realtime statistics */ |
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rs_ber = (cx22702_readreg(state, 0xDE) & 0x7F) << 7 |
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| (cx22702_readreg(state, 0xDF) & 0x7F); |
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} else { |
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/* Averagine statistics */ |
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rs_ber = (cx22702_readreg(state, 0xDE) & 0x7F) << 8 |
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| cx22702_readreg(state, 0xDF); |
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} |
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*snr = ~rs_ber; |
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return 0; |
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} |
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static int cx22702_read_ucblocks(struct dvb_frontend *fe, u32 *ucblocks) |
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{ |
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struct cx22702_state *state = fe->demodulator_priv; |
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|
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u8 _ucblocks; |
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|
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/* RS Uncorrectable Packet Count then reset */ |
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_ucblocks = cx22702_readreg(state, 0xE3); |
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if (state->prevUCBlocks < _ucblocks) |
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*ucblocks = (_ucblocks - state->prevUCBlocks); |
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else |
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*ucblocks = state->prevUCBlocks - _ucblocks; |
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state->prevUCBlocks = _ucblocks; |
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|
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return 0; |
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} |
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static int cx22702_get_frontend(struct dvb_frontend *fe, |
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struct dtv_frontend_properties *c) |
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{ |
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struct cx22702_state *state = fe->demodulator_priv; |
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u8 reg0C = cx22702_readreg(state, 0x0C); |
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c->inversion = reg0C & 0x1 ? INVERSION_ON : INVERSION_OFF; |
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return cx22702_get_tps(state, c); |
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} |
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|
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static int cx22702_get_tune_settings(struct dvb_frontend *fe, |
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struct dvb_frontend_tune_settings *tune) |
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{ |
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tune->min_delay_ms = 1000; |
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return 0; |
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} |
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|
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static void cx22702_release(struct dvb_frontend *fe) |
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{ |
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struct cx22702_state *state = fe->demodulator_priv; |
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kfree(state); |
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} |
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|
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static const struct dvb_frontend_ops cx22702_ops; |
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|
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struct dvb_frontend *cx22702_attach(const struct cx22702_config *config, |
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struct i2c_adapter *i2c) |
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{ |
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struct cx22702_state *state = NULL; |
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|
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/* allocate memory for the internal state */ |
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state = kzalloc(sizeof(struct cx22702_state), GFP_KERNEL); |
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if (state == NULL) |
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goto error; |
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|
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/* setup the state */ |
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state->config = config; |
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state->i2c = i2c; |
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|
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/* check if the demod is there */ |
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if (cx22702_readreg(state, 0x1f) != 0x3) |
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goto error; |
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|
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/* create dvb_frontend */ |
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memcpy(&state->frontend.ops, &cx22702_ops, |
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sizeof(struct dvb_frontend_ops)); |
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state->frontend.demodulator_priv = state; |
|
return &state->frontend; |
|
|
|
error: |
|
kfree(state); |
|
return NULL; |
|
} |
|
EXPORT_SYMBOL(cx22702_attach); |
|
|
|
static const struct dvb_frontend_ops cx22702_ops = { |
|
.delsys = { SYS_DVBT }, |
|
.info = { |
|
.name = "Conexant CX22702 DVB-T", |
|
.frequency_min_hz = 177 * MHz, |
|
.frequency_max_hz = 858 * MHz, |
|
.frequency_stepsize_hz = 166666, |
|
.caps = FE_CAN_FEC_1_2 | FE_CAN_FEC_2_3 | FE_CAN_FEC_3_4 | |
|
FE_CAN_FEC_5_6 | FE_CAN_FEC_7_8 | FE_CAN_FEC_AUTO | |
|
FE_CAN_QPSK | FE_CAN_QAM_16 | FE_CAN_QAM_64 | FE_CAN_QAM_AUTO | |
|
FE_CAN_HIERARCHY_AUTO | FE_CAN_GUARD_INTERVAL_AUTO | |
|
FE_CAN_TRANSMISSION_MODE_AUTO | FE_CAN_RECOVER |
|
}, |
|
|
|
.release = cx22702_release, |
|
|
|
.init = cx22702_init, |
|
.i2c_gate_ctrl = cx22702_i2c_gate_ctrl, |
|
|
|
.set_frontend = cx22702_set_tps, |
|
.get_frontend = cx22702_get_frontend, |
|
.get_tune_settings = cx22702_get_tune_settings, |
|
|
|
.read_status = cx22702_read_status, |
|
.read_ber = cx22702_read_ber, |
|
.read_signal_strength = cx22702_read_signal_strength, |
|
.read_snr = cx22702_read_snr, |
|
.read_ucblocks = cx22702_read_ucblocks, |
|
}; |
|
|
|
MODULE_DESCRIPTION("Conexant CX22702 DVB-T Demodulator driver"); |
|
MODULE_AUTHOR("Steven Toth"); |
|
MODULE_LICENSE("GPL");
|
|
|