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552 lines
13 KiB
552 lines
13 KiB
// SPDX-License-Identifier: GPL-2.0-only |
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/* |
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* ADC12130/ADC12132/ADC12138 12-bit plus sign ADC driver |
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* |
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* Copyright (c) 2016 Akinobu Mita <[email protected]> |
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* |
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* Datasheet: http://www.ti.com/lit/ds/symlink/adc12138.pdf |
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*/ |
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#include <linux/module.h> |
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#include <linux/interrupt.h> |
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#include <linux/completion.h> |
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#include <linux/clk.h> |
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#include <linux/spi/spi.h> |
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#include <linux/iio/iio.h> |
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#include <linux/iio/buffer.h> |
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#include <linux/iio/trigger.h> |
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#include <linux/iio/triggered_buffer.h> |
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#include <linux/iio/trigger_consumer.h> |
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#include <linux/regulator/consumer.h> |
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#define ADC12138_MODE_AUTO_CAL 0x08 |
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#define ADC12138_MODE_READ_STATUS 0x0c |
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#define ADC12138_MODE_ACQUISITION_TIME_6 0x0e |
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#define ADC12138_MODE_ACQUISITION_TIME_10 0x4e |
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#define ADC12138_MODE_ACQUISITION_TIME_18 0x8e |
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#define ADC12138_MODE_ACQUISITION_TIME_34 0xce |
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#define ADC12138_STATUS_CAL BIT(6) |
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enum { |
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adc12130, |
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adc12132, |
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adc12138, |
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}; |
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struct adc12138 { |
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struct spi_device *spi; |
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unsigned int id; |
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/* conversion clock */ |
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struct clk *cclk; |
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/* positive analog voltage reference */ |
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struct regulator *vref_p; |
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/* negative analog voltage reference */ |
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struct regulator *vref_n; |
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struct mutex lock; |
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struct completion complete; |
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/* The number of cclk periods for the S/H's acquisition time */ |
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unsigned int acquisition_time; |
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/* |
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* Maximum size needed: 16x 2 bytes ADC data + 8 bytes timestamp. |
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* Less may be need if not all channels are enabled, as long as |
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* the 8 byte alignment of the timestamp is maintained. |
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*/ |
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__be16 data[20] __aligned(8); |
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u8 tx_buf[2] ____cacheline_aligned; |
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u8 rx_buf[2]; |
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}; |
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#define ADC12138_VOLTAGE_CHANNEL(chan) \ |
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{ \ |
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.type = IIO_VOLTAGE, \ |
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.indexed = 1, \ |
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.channel = chan, \ |
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.info_mask_separate = BIT(IIO_CHAN_INFO_RAW), \ |
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.info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE) \ |
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| BIT(IIO_CHAN_INFO_OFFSET), \ |
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.scan_index = chan, \ |
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.scan_type = { \ |
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.sign = 's', \ |
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.realbits = 13, \ |
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.storagebits = 16, \ |
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.shift = 3, \ |
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.endianness = IIO_BE, \ |
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}, \ |
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} |
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#define ADC12138_VOLTAGE_CHANNEL_DIFF(chan1, chan2, si) \ |
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{ \ |
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.type = IIO_VOLTAGE, \ |
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.indexed = 1, \ |
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.channel = (chan1), \ |
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.channel2 = (chan2), \ |
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.differential = 1, \ |
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.info_mask_separate = BIT(IIO_CHAN_INFO_RAW), \ |
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.info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE) \ |
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| BIT(IIO_CHAN_INFO_OFFSET), \ |
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.scan_index = si, \ |
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.scan_type = { \ |
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.sign = 's', \ |
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.realbits = 13, \ |
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.storagebits = 16, \ |
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.shift = 3, \ |
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.endianness = IIO_BE, \ |
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}, \ |
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} |
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static const struct iio_chan_spec adc12132_channels[] = { |
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ADC12138_VOLTAGE_CHANNEL(0), |
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ADC12138_VOLTAGE_CHANNEL(1), |
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ADC12138_VOLTAGE_CHANNEL_DIFF(0, 1, 2), |
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ADC12138_VOLTAGE_CHANNEL_DIFF(1, 0, 3), |
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IIO_CHAN_SOFT_TIMESTAMP(4), |
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}; |
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static const struct iio_chan_spec adc12138_channels[] = { |
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ADC12138_VOLTAGE_CHANNEL(0), |
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ADC12138_VOLTAGE_CHANNEL(1), |
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ADC12138_VOLTAGE_CHANNEL(2), |
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ADC12138_VOLTAGE_CHANNEL(3), |
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ADC12138_VOLTAGE_CHANNEL(4), |
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ADC12138_VOLTAGE_CHANNEL(5), |
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ADC12138_VOLTAGE_CHANNEL(6), |
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ADC12138_VOLTAGE_CHANNEL(7), |
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ADC12138_VOLTAGE_CHANNEL_DIFF(0, 1, 8), |
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ADC12138_VOLTAGE_CHANNEL_DIFF(1, 0, 9), |
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ADC12138_VOLTAGE_CHANNEL_DIFF(2, 3, 10), |
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ADC12138_VOLTAGE_CHANNEL_DIFF(3, 2, 11), |
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ADC12138_VOLTAGE_CHANNEL_DIFF(4, 5, 12), |
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ADC12138_VOLTAGE_CHANNEL_DIFF(5, 4, 13), |
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ADC12138_VOLTAGE_CHANNEL_DIFF(6, 7, 14), |
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ADC12138_VOLTAGE_CHANNEL_DIFF(7, 6, 15), |
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IIO_CHAN_SOFT_TIMESTAMP(16), |
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}; |
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static int adc12138_mode_programming(struct adc12138 *adc, u8 mode, |
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void *rx_buf, int len) |
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{ |
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struct spi_transfer xfer = { |
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.tx_buf = adc->tx_buf, |
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.rx_buf = adc->rx_buf, |
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.len = len, |
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}; |
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int ret; |
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/* Skip unused bits for ADC12130 and ADC12132 */ |
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if (adc->id != adc12138) |
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mode = (mode & 0xc0) | ((mode & 0x0f) << 2); |
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adc->tx_buf[0] = mode; |
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ret = spi_sync_transfer(adc->spi, &xfer, 1); |
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if (ret) |
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return ret; |
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memcpy(rx_buf, adc->rx_buf, len); |
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return 0; |
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} |
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static int adc12138_read_status(struct adc12138 *adc) |
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{ |
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u8 rx_buf[2]; |
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int ret; |
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ret = adc12138_mode_programming(adc, ADC12138_MODE_READ_STATUS, |
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rx_buf, 2); |
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if (ret) |
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return ret; |
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return (rx_buf[0] << 1) | (rx_buf[1] >> 7); |
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} |
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static int __adc12138_start_conv(struct adc12138 *adc, |
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struct iio_chan_spec const *channel, |
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void *data, int len) |
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{ |
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static const u8 ch_to_mux[] = { 0, 4, 1, 5, 2, 6, 3, 7 }; |
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u8 mode = (ch_to_mux[channel->channel] << 4) | |
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(channel->differential ? 0 : 0x80); |
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return adc12138_mode_programming(adc, mode, data, len); |
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} |
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static int adc12138_start_conv(struct adc12138 *adc, |
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struct iio_chan_spec const *channel) |
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{ |
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u8 trash; |
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return __adc12138_start_conv(adc, channel, &trash, 1); |
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} |
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static int adc12138_start_and_read_conv(struct adc12138 *adc, |
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struct iio_chan_spec const *channel, |
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__be16 *data) |
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{ |
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return __adc12138_start_conv(adc, channel, data, 2); |
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} |
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static int adc12138_read_conv_data(struct adc12138 *adc, __be16 *value) |
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{ |
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/* Issue a read status instruction and read previous conversion data */ |
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return adc12138_mode_programming(adc, ADC12138_MODE_READ_STATUS, |
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value, sizeof(*value)); |
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} |
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static int adc12138_wait_eoc(struct adc12138 *adc, unsigned long timeout) |
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{ |
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if (!wait_for_completion_timeout(&adc->complete, timeout)) |
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return -ETIMEDOUT; |
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return 0; |
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} |
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static int adc12138_adc_conversion(struct adc12138 *adc, |
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struct iio_chan_spec const *channel, |
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__be16 *value) |
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{ |
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int ret; |
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reinit_completion(&adc->complete); |
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ret = adc12138_start_conv(adc, channel); |
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if (ret) |
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return ret; |
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ret = adc12138_wait_eoc(adc, msecs_to_jiffies(100)); |
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if (ret) |
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return ret; |
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return adc12138_read_conv_data(adc, value); |
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} |
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static int adc12138_read_raw(struct iio_dev *iio, |
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struct iio_chan_spec const *channel, int *value, |
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int *shift, long mask) |
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{ |
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struct adc12138 *adc = iio_priv(iio); |
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int ret; |
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__be16 data; |
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switch (mask) { |
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case IIO_CHAN_INFO_RAW: |
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mutex_lock(&adc->lock); |
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ret = adc12138_adc_conversion(adc, channel, &data); |
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mutex_unlock(&adc->lock); |
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if (ret) |
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return ret; |
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*value = sign_extend32(be16_to_cpu(data) >> 3, 12); |
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return IIO_VAL_INT; |
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case IIO_CHAN_INFO_SCALE: |
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ret = regulator_get_voltage(adc->vref_p); |
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if (ret < 0) |
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return ret; |
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*value = ret; |
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if (!IS_ERR(adc->vref_n)) { |
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ret = regulator_get_voltage(adc->vref_n); |
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if (ret < 0) |
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return ret; |
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*value -= ret; |
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} |
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/* convert regulator output voltage to mV */ |
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*value /= 1000; |
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*shift = channel->scan_type.realbits - 1; |
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return IIO_VAL_FRACTIONAL_LOG2; |
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case IIO_CHAN_INFO_OFFSET: |
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if (!IS_ERR(adc->vref_n)) { |
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*value = regulator_get_voltage(adc->vref_n); |
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if (*value < 0) |
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return *value; |
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} else { |
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*value = 0; |
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} |
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/* convert regulator output voltage to mV */ |
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*value /= 1000; |
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return IIO_VAL_INT; |
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} |
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return -EINVAL; |
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} |
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static const struct iio_info adc12138_info = { |
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.read_raw = adc12138_read_raw, |
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}; |
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static int adc12138_init(struct adc12138 *adc) |
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{ |
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int ret; |
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int status; |
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u8 mode; |
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u8 trash; |
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reinit_completion(&adc->complete); |
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ret = adc12138_mode_programming(adc, ADC12138_MODE_AUTO_CAL, &trash, 1); |
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if (ret) |
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return ret; |
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/* data output at this time has no significance */ |
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status = adc12138_read_status(adc); |
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if (status < 0) |
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return status; |
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adc12138_wait_eoc(adc, msecs_to_jiffies(100)); |
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status = adc12138_read_status(adc); |
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if (status & ADC12138_STATUS_CAL) { |
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dev_warn(&adc->spi->dev, |
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"Auto Cal sequence is still in progress: %#x\n", |
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status); |
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return -EIO; |
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} |
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switch (adc->acquisition_time) { |
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case 6: |
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mode = ADC12138_MODE_ACQUISITION_TIME_6; |
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break; |
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case 10: |
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mode = ADC12138_MODE_ACQUISITION_TIME_10; |
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break; |
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case 18: |
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mode = ADC12138_MODE_ACQUISITION_TIME_18; |
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break; |
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case 34: |
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mode = ADC12138_MODE_ACQUISITION_TIME_34; |
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break; |
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default: |
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return -EINVAL; |
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} |
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return adc12138_mode_programming(adc, mode, &trash, 1); |
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} |
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static irqreturn_t adc12138_trigger_handler(int irq, void *p) |
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{ |
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struct iio_poll_func *pf = p; |
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struct iio_dev *indio_dev = pf->indio_dev; |
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struct adc12138 *adc = iio_priv(indio_dev); |
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__be16 trash; |
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int ret; |
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int scan_index; |
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int i = 0; |
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mutex_lock(&adc->lock); |
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for_each_set_bit(scan_index, indio_dev->active_scan_mask, |
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indio_dev->masklength) { |
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const struct iio_chan_spec *scan_chan = |
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&indio_dev->channels[scan_index]; |
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reinit_completion(&adc->complete); |
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ret = adc12138_start_and_read_conv(adc, scan_chan, |
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i ? &adc->data[i - 1] : &trash); |
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if (ret) { |
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dev_warn(&adc->spi->dev, |
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"failed to start conversion\n"); |
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goto out; |
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} |
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ret = adc12138_wait_eoc(adc, msecs_to_jiffies(100)); |
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if (ret) { |
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dev_warn(&adc->spi->dev, "wait eoc timeout\n"); |
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goto out; |
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} |
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i++; |
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} |
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if (i) { |
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ret = adc12138_read_conv_data(adc, &adc->data[i - 1]); |
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if (ret) { |
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dev_warn(&adc->spi->dev, |
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"failed to get conversion data\n"); |
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goto out; |
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} |
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} |
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iio_push_to_buffers_with_timestamp(indio_dev, adc->data, |
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iio_get_time_ns(indio_dev)); |
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out: |
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mutex_unlock(&adc->lock); |
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iio_trigger_notify_done(indio_dev->trig); |
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return IRQ_HANDLED; |
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} |
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static irqreturn_t adc12138_eoc_handler(int irq, void *p) |
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{ |
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struct iio_dev *indio_dev = p; |
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struct adc12138 *adc = iio_priv(indio_dev); |
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complete(&adc->complete); |
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return IRQ_HANDLED; |
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} |
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static int adc12138_probe(struct spi_device *spi) |
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{ |
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struct iio_dev *indio_dev; |
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struct adc12138 *adc; |
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int ret; |
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indio_dev = devm_iio_device_alloc(&spi->dev, sizeof(*adc)); |
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if (!indio_dev) |
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return -ENOMEM; |
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adc = iio_priv(indio_dev); |
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adc->spi = spi; |
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adc->id = spi_get_device_id(spi)->driver_data; |
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mutex_init(&adc->lock); |
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init_completion(&adc->complete); |
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indio_dev->name = spi_get_device_id(spi)->name; |
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indio_dev->info = &adc12138_info; |
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indio_dev->modes = INDIO_DIRECT_MODE; |
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switch (adc->id) { |
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case adc12130: |
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case adc12132: |
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indio_dev->channels = adc12132_channels; |
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indio_dev->num_channels = ARRAY_SIZE(adc12132_channels); |
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break; |
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case adc12138: |
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indio_dev->channels = adc12138_channels; |
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indio_dev->num_channels = ARRAY_SIZE(adc12138_channels); |
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break; |
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default: |
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return -EINVAL; |
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} |
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ret = of_property_read_u32(spi->dev.of_node, "ti,acquisition-time", |
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&adc->acquisition_time); |
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if (ret) |
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adc->acquisition_time = 10; |
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adc->cclk = devm_clk_get(&spi->dev, NULL); |
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if (IS_ERR(adc->cclk)) |
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return PTR_ERR(adc->cclk); |
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adc->vref_p = devm_regulator_get(&spi->dev, "vref-p"); |
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if (IS_ERR(adc->vref_p)) |
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return PTR_ERR(adc->vref_p); |
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adc->vref_n = devm_regulator_get_optional(&spi->dev, "vref-n"); |
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if (IS_ERR(adc->vref_n)) { |
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/* |
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* Assume vref_n is 0V if an optional regulator is not |
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* specified, otherwise return the error code. |
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*/ |
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ret = PTR_ERR(adc->vref_n); |
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if (ret != -ENODEV) |
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return ret; |
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} |
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ret = devm_request_irq(&spi->dev, spi->irq, adc12138_eoc_handler, |
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IRQF_TRIGGER_RISING, indio_dev->name, indio_dev); |
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if (ret) |
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return ret; |
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ret = clk_prepare_enable(adc->cclk); |
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if (ret) |
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return ret; |
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ret = regulator_enable(adc->vref_p); |
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if (ret) |
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goto err_clk_disable; |
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if (!IS_ERR(adc->vref_n)) { |
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ret = regulator_enable(adc->vref_n); |
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if (ret) |
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goto err_vref_p_disable; |
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} |
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ret = adc12138_init(adc); |
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if (ret) |
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goto err_vref_n_disable; |
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spi_set_drvdata(spi, indio_dev); |
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ret = iio_triggered_buffer_setup(indio_dev, NULL, |
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adc12138_trigger_handler, NULL); |
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if (ret) |
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goto err_vref_n_disable; |
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ret = iio_device_register(indio_dev); |
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if (ret) |
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goto err_buffer_cleanup; |
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return 0; |
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err_buffer_cleanup: |
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iio_triggered_buffer_cleanup(indio_dev); |
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err_vref_n_disable: |
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if (!IS_ERR(adc->vref_n)) |
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regulator_disable(adc->vref_n); |
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err_vref_p_disable: |
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regulator_disable(adc->vref_p); |
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err_clk_disable: |
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clk_disable_unprepare(adc->cclk); |
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return ret; |
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} |
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static int adc12138_remove(struct spi_device *spi) |
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{ |
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struct iio_dev *indio_dev = spi_get_drvdata(spi); |
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struct adc12138 *adc = iio_priv(indio_dev); |
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iio_device_unregister(indio_dev); |
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iio_triggered_buffer_cleanup(indio_dev); |
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if (!IS_ERR(adc->vref_n)) |
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regulator_disable(adc->vref_n); |
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regulator_disable(adc->vref_p); |
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clk_disable_unprepare(adc->cclk); |
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return 0; |
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} |
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#ifdef CONFIG_OF |
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static const struct of_device_id adc12138_dt_ids[] = { |
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{ .compatible = "ti,adc12130", }, |
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{ .compatible = "ti,adc12132", }, |
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{ .compatible = "ti,adc12138", }, |
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{} |
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}; |
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MODULE_DEVICE_TABLE(of, adc12138_dt_ids); |
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#endif |
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static const struct spi_device_id adc12138_id[] = { |
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{ "adc12130", adc12130 }, |
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{ "adc12132", adc12132 }, |
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{ "adc12138", adc12138 }, |
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{} |
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}; |
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MODULE_DEVICE_TABLE(spi, adc12138_id); |
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static struct spi_driver adc12138_driver = { |
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.driver = { |
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.name = "adc12138", |
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.of_match_table = of_match_ptr(adc12138_dt_ids), |
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}, |
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.probe = adc12138_probe, |
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.remove = adc12138_remove, |
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.id_table = adc12138_id, |
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}; |
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module_spi_driver(adc12138_driver); |
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MODULE_AUTHOR("Akinobu Mita <[email protected]>"); |
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MODULE_DESCRIPTION("ADC12130/ADC12132/ADC12138 driver"); |
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MODULE_LICENSE("GPL v2");
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