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87 lines
2.1 KiB
87 lines
2.1 KiB
// SPDX-License-Identifier: GPL-2.0+ |
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/* |
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* Copyright (C) 2014 Google, Inc |
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*/ |
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#include <common.h> |
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#include <dm.h> |
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#include <pch.h> |
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#define GPIO_BASE 0x44 |
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#define BIOS_CTRL 0xd8 |
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static int pch7_get_spi_base(struct udevice *dev, ulong *sbasep) |
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{ |
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u32 rcba; |
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dm_pci_read_config32(dev, PCH_RCBA, &rcba); |
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/* Bits 31-14 are the base address, 13-1 are reserved, 0 is enable */ |
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rcba = rcba & 0xffffc000; |
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*sbasep = rcba + 0x3020; |
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return 0; |
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} |
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static int pch7_set_spi_protect(struct udevice *dev, bool protect) |
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{ |
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uint8_t bios_cntl; |
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/* Adjust the BIOS write protect to dis/allow write commands */ |
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dm_pci_read_config8(dev, BIOS_CTRL, &bios_cntl); |
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if (protect) |
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bios_cntl &= ~BIOS_CTRL_BIOSWE; |
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else |
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bios_cntl |= BIOS_CTRL_BIOSWE; |
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dm_pci_write_config8(dev, BIOS_CTRL, bios_cntl); |
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return 0; |
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} |
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static int pch7_get_gpio_base(struct udevice *dev, u32 *gbasep) |
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{ |
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u32 base; |
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/* |
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* GPIO_BASE moved to its current offset with ICH6, but prior to |
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* that it was unused (or undocumented). Check that it looks |
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* okay: not all ones or zeros. |
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* |
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* Note we don't need check bit0 here, because the Tunnel Creek |
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* GPIO base address register bit0 is reserved (read returns 0), |
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* while on the Ivybridge the bit0 is used to indicate it is an |
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* I/O space. |
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*/ |
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dm_pci_read_config32(dev, GPIO_BASE, &base); |
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if (base == 0x00000000 || base == 0xffffffff) { |
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debug("%s: unexpected BASE value\n", __func__); |
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return -ENODEV; |
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} |
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/* |
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* Okay, I guess we're looking at the right device. The actual |
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* GPIO registers are in the PCI device's I/O space, starting |
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* at the offset that we just read. Bit 0 indicates that it's |
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* an I/O address, not a memory address, so mask that off. |
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*/ |
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*gbasep = base & 1 ? base & ~3 : base & ~15; |
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return 0; |
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} |
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static const struct pch_ops pch7_ops = { |
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.get_spi_base = pch7_get_spi_base, |
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.set_spi_protect = pch7_set_spi_protect, |
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.get_gpio_base = pch7_get_gpio_base, |
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}; |
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static const struct udevice_id pch7_ids[] = { |
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{ .compatible = "intel,pch7" }, |
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{ } |
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}; |
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U_BOOT_DRIVER(pch7_drv) = { |
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.name = "intel-pch7", |
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.id = UCLASS_PCH, |
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.of_match = pch7_ids, |
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.ops = &pch7_ops, |
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};
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