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680 lines
22 KiB
680 lines
22 KiB
/* SPDX-License-Identifier: BSD-3-Clause */ |
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/* |
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* Texas Instruments System Control Interface (TISCI) Protocol |
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* |
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* Communication protocol with TI SCI hardware |
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* The system works in a message response protocol |
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* See: http://processors.wiki.ti.com/index.php/TISCI for details |
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* |
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* Copyright (C) 2018 Texas Instruments Incorporated - http://www.ti.com/ |
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* Based on drivers/firmware/ti_sci.h from Linux. |
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* |
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*/ |
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#ifndef __TI_SCI_H |
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#define __TI_SCI_H |
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/* Generic Messages */ |
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#define TI_SCI_MSG_ENABLE_WDT 0x0000 |
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#define TI_SCI_MSG_WAKE_RESET 0x0001 |
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#define TI_SCI_MSG_VERSION 0x0002 |
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#define TI_SCI_MSG_WAKE_REASON 0x0003 |
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#define TI_SCI_MSG_GOODBYE 0x0004 |
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#define TI_SCI_MSG_SYS_RESET 0x0005 |
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#define TI_SCI_MSG_BOARD_CONFIG 0x000b |
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#define TI_SCI_MSG_BOARD_CONFIG_RM 0x000c |
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#define TI_SCI_MSG_BOARD_CONFIG_SECURITY 0x000d |
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#define TI_SCI_MSG_BOARD_CONFIG_PM 0x000e |
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/* Device requests */ |
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#define TI_SCI_MSG_SET_DEVICE_STATE 0x0200 |
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#define TI_SCI_MSG_GET_DEVICE_STATE 0x0201 |
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#define TI_SCI_MSG_SET_DEVICE_RESETS 0x0202 |
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/* Clock requests */ |
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#define TI_SCI_MSG_SET_CLOCK_STATE 0x0100 |
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#define TI_SCI_MSG_GET_CLOCK_STATE 0x0101 |
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#define TI_SCI_MSG_SET_CLOCK_PARENT 0x0102 |
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#define TI_SCI_MSG_GET_CLOCK_PARENT 0x0103 |
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#define TI_SCI_MSG_GET_NUM_CLOCK_PARENTS 0x0104 |
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#define TI_SCI_MSG_SET_CLOCK_FREQ 0x010c |
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#define TI_SCI_MSG_QUERY_CLOCK_FREQ 0x010d |
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#define TI_SCI_MSG_GET_CLOCK_FREQ 0x010e |
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/* Processor Control Messages */ |
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#define TISCI_MSG_PROC_REQUEST 0xc000 |
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#define TISCI_MSG_PROC_RELEASE 0xc001 |
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#define TISCI_MSG_PROC_HANDOVER 0xc005 |
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#define TISCI_MSG_SET_PROC_BOOT_CONFIG 0xc100 |
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#define TISCI_MSG_SET_PROC_BOOT_CTRL 0xc101 |
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#define TISCI_MSG_PROC_AUTH_BOOT_IMIAGE 0xc120 |
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#define TISCI_MSG_GET_PROC_BOOT_STATUS 0xc400 |
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/** |
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* struct ti_sci_msg_hdr - Generic Message Header for All messages and responses |
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* @type: Type of messages: One of TI_SCI_MSG* values |
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* @host: Host of the message |
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* @seq: Message identifier indicating a transfer sequence |
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* @flags: Flag for the message |
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*/ |
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struct ti_sci_msg_hdr { |
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u16 type; |
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u8 host; |
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u8 seq; |
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#define TI_SCI_MSG_FLAG(val) (1 << (val)) |
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#define TI_SCI_FLAG_REQ_GENERIC_NORESPONSE 0x0 |
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#define TI_SCI_FLAG_REQ_ACK_ON_RECEIVED TI_SCI_MSG_FLAG(0) |
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#define TI_SCI_FLAG_REQ_ACK_ON_PROCESSED TI_SCI_MSG_FLAG(1) |
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#define TI_SCI_FLAG_RESP_GENERIC_NACK 0x0 |
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#define TI_SCI_FLAG_RESP_GENERIC_ACK TI_SCI_MSG_FLAG(1) |
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/* Additional Flags */ |
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u32 flags; |
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} __packed; |
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/** |
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* struct ti_sci_secure_msg_hdr - Header that prefixes all TISCI messages sent |
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* via secure transport. |
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* @checksum: crc16 checksum for the entire message |
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* @reserved: Reserved for future use. |
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*/ |
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struct ti_sci_secure_msg_hdr { |
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u16 checksum; |
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u16 reserved; |
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} __packed; |
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/** |
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* struct ti_sci_msg_resp_version - Response for a message |
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* @hdr: Generic header |
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* @firmware_description: String describing the firmware |
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* @firmware_revision: Firmware revision |
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* @abi_major: Major version of the ABI that firmware supports |
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* @abi_minor: Minor version of the ABI that firmware supports |
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* |
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* In general, ABI version changes follow the rule that minor version increments |
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* are backward compatible. Major revision changes in ABI may not be |
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* backward compatible. |
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* |
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* Response to a generic message with message type TI_SCI_MSG_VERSION |
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*/ |
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struct ti_sci_msg_resp_version { |
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struct ti_sci_msg_hdr hdr; |
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char firmware_description[32]; |
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u16 firmware_revision; |
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u8 abi_major; |
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u8 abi_minor; |
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} __packed; |
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/** |
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* struct ti_sci_msg_req_reboot - Reboot the SoC |
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* @hdr: Generic Header |
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* |
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* Request type is TI_SCI_MSG_SYS_RESET, responded with a generic |
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* ACK/NACK message. |
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*/ |
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struct ti_sci_msg_req_reboot { |
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struct ti_sci_msg_hdr hdr; |
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} __packed; |
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/** |
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* struct ti_sci_msg_board_config - Board configuration message |
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* @hdr: Generic Header |
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* @boardcfgp_low: Lower 32 bit of the pointer pointing to the board |
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* configuration data |
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* @boardcfgp_high: Upper 32 bit of the pointer pointing to the board |
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* configuration data |
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* @boardcfg_size: Size of board configuration data object |
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* Request type is TI_SCI_MSG_BOARD_CONFIG, responded with a generic |
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* ACK/NACK message. |
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*/ |
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struct ti_sci_msg_board_config { |
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struct ti_sci_msg_hdr hdr; |
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u32 boardcfgp_low; |
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u32 boardcfgp_high; |
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u16 boardcfg_size; |
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} __packed; |
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/** |
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* struct ti_sci_msg_req_set_device_state - Set the desired state of the device |
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* @hdr: Generic header |
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* @id: Indicates which device to modify |
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* @reserved: Reserved space in message, must be 0 for backward compatibility |
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* @state: The desired state of the device. |
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* |
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* Certain flags can also be set to alter the device state: |
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* + MSG_FLAG_DEVICE_WAKE_ENABLED - Configure the device to be a wake source. |
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* The meaning of this flag will vary slightly from device to device and from |
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* SoC to SoC but it generally allows the device to wake the SoC out of deep |
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* suspend states. |
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* + MSG_FLAG_DEVICE_RESET_ISO - Enable reset isolation for this device. |
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* + MSG_FLAG_DEVICE_EXCLUSIVE - Claim this device exclusively. When passed |
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* with STATE_RETENTION or STATE_ON, it will claim the device exclusively. |
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* If another host already has this device set to STATE_RETENTION or STATE_ON, |
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* the message will fail. Once successful, other hosts attempting to set |
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* STATE_RETENTION or STATE_ON will fail. |
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* |
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* Request type is TI_SCI_MSG_SET_DEVICE_STATE, responded with a generic |
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* ACK/NACK message. |
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*/ |
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struct ti_sci_msg_req_set_device_state { |
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/* Additional hdr->flags options */ |
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#define MSG_FLAG_DEVICE_WAKE_ENABLED TI_SCI_MSG_FLAG(8) |
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#define MSG_FLAG_DEVICE_RESET_ISO TI_SCI_MSG_FLAG(9) |
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#define MSG_FLAG_DEVICE_EXCLUSIVE TI_SCI_MSG_FLAG(10) |
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struct ti_sci_msg_hdr hdr; |
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u32 id; |
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u32 reserved; |
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#define MSG_DEVICE_SW_STATE_AUTO_OFF 0 |
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#define MSG_DEVICE_SW_STATE_RETENTION 1 |
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#define MSG_DEVICE_SW_STATE_ON 2 |
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u8 state; |
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} __packed; |
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/** |
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* struct ti_sci_msg_req_get_device_state - Request to get device. |
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* @hdr: Generic header |
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* @id: Device Identifier |
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* |
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* Request type is TI_SCI_MSG_GET_DEVICE_STATE, responded device state |
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* information |
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*/ |
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struct ti_sci_msg_req_get_device_state { |
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struct ti_sci_msg_hdr hdr; |
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u32 id; |
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} __packed; |
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/** |
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* struct ti_sci_msg_resp_get_device_state - Response to get device request. |
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* @hdr: Generic header |
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* @context_loss_count: Indicates how many times the device has lost context. A |
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* driver can use this monotonic counter to determine if the device has |
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* lost context since the last time this message was exchanged. |
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* @resets: Programmed state of the reset lines. |
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* @programmed_state: The state as programmed by set_device. |
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* - Uses the MSG_DEVICE_SW_* macros |
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* @current_state: The actual state of the hardware. |
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* |
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* Response to request TI_SCI_MSG_GET_DEVICE_STATE. |
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*/ |
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struct ti_sci_msg_resp_get_device_state { |
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struct ti_sci_msg_hdr hdr; |
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u32 context_loss_count; |
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u32 resets; |
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u8 programmed_state; |
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#define MSG_DEVICE_HW_STATE_OFF 0 |
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#define MSG_DEVICE_HW_STATE_ON 1 |
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#define MSG_DEVICE_HW_STATE_TRANS 2 |
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u8 current_state; |
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} __packed; |
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/** |
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* struct ti_sci_msg_req_set_device_resets - Set the desired resets |
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* configuration of the device |
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* @hdr: Generic header |
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* @id: Indicates which device to modify |
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* @resets: A bit field of resets for the device. The meaning, behavior, |
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* and usage of the reset flags are device specific. 0 for a bit |
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* indicates releasing the reset represented by that bit while 1 |
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* indicates keeping it held. |
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* |
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* Request type is TI_SCI_MSG_SET_DEVICE_RESETS, responded with a generic |
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* ACK/NACK message. |
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*/ |
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struct ti_sci_msg_req_set_device_resets { |
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struct ti_sci_msg_hdr hdr; |
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u32 id; |
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u32 resets; |
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} __packed; |
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/** |
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* struct ti_sci_msg_req_set_clock_state - Request to setup a Clock state |
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* @hdr: Generic Header, Certain flags can be set specific to the clocks: |
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* MSG_FLAG_CLOCK_ALLOW_SSC: Allow this clock to be modified |
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* via spread spectrum clocking. |
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* MSG_FLAG_CLOCK_ALLOW_FREQ_CHANGE: Allow this clock's |
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* frequency to be changed while it is running so long as it |
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* is within the min/max limits. |
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* MSG_FLAG_CLOCK_INPUT_TERM: Enable input termination, this |
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* is only applicable to clock inputs on the SoC pseudo-device. |
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* @dev_id: Device identifier this request is for |
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* @clk_id: Clock identifier for the device for this request. |
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* Each device has it's own set of clock inputs. This indexes |
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* which clock input to modify. |
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* @request_state: Request the state for the clock to be set to. |
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* MSG_CLOCK_SW_STATE_UNREQ: The IP does not require this clock, |
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* it can be disabled, regardless of the state of the device |
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* MSG_CLOCK_SW_STATE_AUTO: Allow the System Controller to |
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* automatically manage the state of this clock. If the device |
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* is enabled, then the clock is enabled. If the device is set |
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* to off or retention, then the clock is internally set as not |
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* being required by the device.(default) |
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* MSG_CLOCK_SW_STATE_REQ: Configure the clock to be enabled, |
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* regardless of the state of the device. |
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* |
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* Normally, all required clocks are managed by TISCI entity, this is used |
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* only for specific control *IF* required. Auto managed state is |
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* MSG_CLOCK_SW_STATE_AUTO, in other states, TISCI entity assume remote |
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* will explicitly control. |
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* |
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* Request type is TI_SCI_MSG_SET_CLOCK_STATE, response is a generic |
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* ACK or NACK message. |
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*/ |
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struct ti_sci_msg_req_set_clock_state { |
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/* Additional hdr->flags options */ |
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#define MSG_FLAG_CLOCK_ALLOW_SSC TI_SCI_MSG_FLAG(8) |
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#define MSG_FLAG_CLOCK_ALLOW_FREQ_CHANGE TI_SCI_MSG_FLAG(9) |
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#define MSG_FLAG_CLOCK_INPUT_TERM TI_SCI_MSG_FLAG(10) |
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struct ti_sci_msg_hdr hdr; |
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u32 dev_id; |
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u8 clk_id; |
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#define MSG_CLOCK_SW_STATE_UNREQ 0 |
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#define MSG_CLOCK_SW_STATE_AUTO 1 |
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#define MSG_CLOCK_SW_STATE_REQ 2 |
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u8 request_state; |
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} __packed; |
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/** |
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* struct ti_sci_msg_req_get_clock_state - Request for clock state |
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* @hdr: Generic Header |
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* @dev_id: Device identifier this request is for |
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* @clk_id: Clock identifier for the device for this request. |
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* Each device has it's own set of clock inputs. This indexes |
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* which clock input to get state of. |
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* |
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* Request type is TI_SCI_MSG_GET_CLOCK_STATE, response is state |
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* of the clock |
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*/ |
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struct ti_sci_msg_req_get_clock_state { |
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struct ti_sci_msg_hdr hdr; |
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u32 dev_id; |
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u8 clk_id; |
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} __packed; |
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/** |
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* struct ti_sci_msg_resp_get_clock_state - Response to get clock state |
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* @hdr: Generic Header |
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* @programmed_state: Any programmed state of the clock. This is one of |
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* MSG_CLOCK_SW_STATE* values. |
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* @current_state: Current state of the clock. This is one of: |
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* MSG_CLOCK_HW_STATE_NOT_READY: Clock is not ready |
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* MSG_CLOCK_HW_STATE_READY: Clock is ready |
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* |
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* Response to TI_SCI_MSG_GET_CLOCK_STATE. |
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*/ |
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struct ti_sci_msg_resp_get_clock_state { |
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struct ti_sci_msg_hdr hdr; |
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u8 programmed_state; |
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#define MSG_CLOCK_HW_STATE_NOT_READY 0 |
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#define MSG_CLOCK_HW_STATE_READY 1 |
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u8 current_state; |
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} __packed; |
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/** |
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* struct ti_sci_msg_req_set_clock_parent - Set the clock parent |
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* @hdr: Generic Header |
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* @dev_id: Device identifier this request is for |
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* @clk_id: Clock identifier for the device for this request. |
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* Each device has it's own set of clock inputs. This indexes |
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* which clock input to modify. |
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* @parent_id: The new clock parent is selectable by an index via this |
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* parameter. |
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* |
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* Request type is TI_SCI_MSG_SET_CLOCK_PARENT, response is generic |
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* ACK / NACK message. |
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*/ |
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struct ti_sci_msg_req_set_clock_parent { |
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struct ti_sci_msg_hdr hdr; |
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u32 dev_id; |
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u8 clk_id; |
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u8 parent_id; |
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} __packed; |
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/** |
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* struct ti_sci_msg_req_get_clock_parent - Get the clock parent |
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* @hdr: Generic Header |
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* @dev_id: Device identifier this request is for |
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* @clk_id: Clock identifier for the device for this request. |
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* Each device has it's own set of clock inputs. This indexes |
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* which clock input to get the parent for. |
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* |
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* Request type is TI_SCI_MSG_GET_CLOCK_PARENT, response is parent information |
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*/ |
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struct ti_sci_msg_req_get_clock_parent { |
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struct ti_sci_msg_hdr hdr; |
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u32 dev_id; |
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u8 clk_id; |
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} __packed; |
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/** |
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* struct ti_sci_msg_resp_get_clock_parent - Response with clock parent |
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* @hdr: Generic Header |
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* @parent_id: The current clock parent |
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* |
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* Response to TI_SCI_MSG_GET_CLOCK_PARENT. |
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*/ |
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struct ti_sci_msg_resp_get_clock_parent { |
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struct ti_sci_msg_hdr hdr; |
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u8 parent_id; |
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} __packed; |
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/** |
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* struct ti_sci_msg_req_get_clock_num_parents - Request to get clock parents |
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* @hdr: Generic header |
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* @dev_id: Device identifier this request is for |
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* @clk_id: Clock identifier for the device for this request. |
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* |
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* This request provides information about how many clock parent options |
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* are available for a given clock to a device. This is typically used |
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* for input clocks. |
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* |
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* Request type is TI_SCI_MSG_GET_NUM_CLOCK_PARENTS, response is appropriate |
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* message, or NACK in case of inability to satisfy request. |
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*/ |
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struct ti_sci_msg_req_get_clock_num_parents { |
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struct ti_sci_msg_hdr hdr; |
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u32 dev_id; |
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u8 clk_id; |
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} __packed; |
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/** |
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* struct ti_sci_msg_resp_get_clock_num_parents - Response for get clk parents |
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* @hdr: Generic header |
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* @num_parents: Number of clock parents |
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* |
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* Response to TI_SCI_MSG_GET_NUM_CLOCK_PARENTS |
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*/ |
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struct ti_sci_msg_resp_get_clock_num_parents { |
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struct ti_sci_msg_hdr hdr; |
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u8 num_parents; |
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} __packed; |
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/** |
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* struct ti_sci_msg_req_query_clock_freq - Request to query a frequency |
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* @hdr: Generic Header |
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* @dev_id: Device identifier this request is for |
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* @min_freq_hz: The minimum allowable frequency in Hz. This is the minimum |
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* allowable programmed frequency and does not account for clock |
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* tolerances and jitter. |
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* @target_freq_hz: The target clock frequency. A frequency will be found |
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* as close to this target frequency as possible. |
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* @max_freq_hz: The maximum allowable frequency in Hz. This is the maximum |
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* allowable programmed frequency and does not account for clock |
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* tolerances and jitter. |
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* @clk_id: Clock identifier for the device for this request. |
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* |
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* NOTE: Normally clock frequency management is automatically done by TISCI |
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* entity. In case of specific requests, TISCI evaluates capability to achieve |
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* requested frequency within provided range and responds with |
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* result message. |
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* |
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* Request type is TI_SCI_MSG_QUERY_CLOCK_FREQ, response is appropriate message, |
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* or NACK in case of inability to satisfy request. |
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*/ |
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struct ti_sci_msg_req_query_clock_freq { |
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struct ti_sci_msg_hdr hdr; |
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u32 dev_id; |
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u64 min_freq_hz; |
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u64 target_freq_hz; |
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u64 max_freq_hz; |
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u8 clk_id; |
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} __packed; |
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/** |
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* struct ti_sci_msg_resp_query_clock_freq - Response to a clock frequency query |
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* @hdr: Generic Header |
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* @freq_hz: Frequency that is the best match in Hz. |
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* |
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* Response to request type TI_SCI_MSG_QUERY_CLOCK_FREQ. NOTE: if the request |
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* cannot be satisfied, the message will be of type NACK. |
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*/ |
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struct ti_sci_msg_resp_query_clock_freq { |
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struct ti_sci_msg_hdr hdr; |
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u64 freq_hz; |
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} __packed; |
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|
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/** |
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* struct ti_sci_msg_req_set_clock_freq - Request to setup a clock frequency |
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* @hdr: Generic Header |
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* @dev_id: Device identifier this request is for |
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* @min_freq_hz: The minimum allowable frequency in Hz. This is the minimum |
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* allowable programmed frequency and does not account for clock |
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* tolerances and jitter. |
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* @target_freq_hz: The target clock frequency. The clock will be programmed |
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* at a rate as close to this target frequency as possible. |
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* @max_freq_hz: The maximum allowable frequency in Hz. This is the maximum |
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* allowable programmed frequency and does not account for clock |
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* tolerances and jitter. |
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* @clk_id: Clock identifier for the device for this request. |
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* |
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* NOTE: Normally clock frequency management is automatically done by TISCI |
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* entity. In case of specific requests, TISCI evaluates capability to achieve |
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* requested range and responds with success/failure message. |
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* |
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* This sets the desired frequency for a clock within an allowable |
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* range. This message will fail on an enabled clock unless |
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* MSG_FLAG_CLOCK_ALLOW_FREQ_CHANGE is set for the clock. Additionally, |
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* if other clocks have their frequency modified due to this message, |
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* they also must have the MSG_FLAG_CLOCK_ALLOW_FREQ_CHANGE or be disabled. |
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* |
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* Calling set frequency on a clock input to the SoC pseudo-device will |
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* inform the PMMC of that clock's frequency. Setting a frequency of |
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* zero will indicate the clock is disabled. |
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* |
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* Calling set frequency on clock outputs from the SoC pseudo-device will |
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* function similarly to setting the clock frequency on a device. |
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* |
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* Request type is TI_SCI_MSG_SET_CLOCK_FREQ, response is a generic ACK/NACK |
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* message. |
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*/ |
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struct ti_sci_msg_req_set_clock_freq { |
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struct ti_sci_msg_hdr hdr; |
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u32 dev_id; |
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u64 min_freq_hz; |
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u64 target_freq_hz; |
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u64 max_freq_hz; |
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u8 clk_id; |
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} __packed; |
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|
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/** |
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* struct ti_sci_msg_req_get_clock_freq - Request to get the clock frequency |
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* @hdr: Generic Header |
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* @dev_id: Device identifier this request is for |
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* @clk_id: Clock identifier for the device for this request. |
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* |
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* NOTE: Normally clock frequency management is automatically done by TISCI |
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* entity. In some cases, clock frequencies are configured by host. |
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* |
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* Request type is TI_SCI_MSG_GET_CLOCK_FREQ, responded with clock frequency |
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* that the clock is currently at. |
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*/ |
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struct ti_sci_msg_req_get_clock_freq { |
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struct ti_sci_msg_hdr hdr; |
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u32 dev_id; |
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u8 clk_id; |
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} __packed; |
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|
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/** |
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* struct ti_sci_msg_resp_get_clock_freq - Response of clock frequency request |
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* @hdr: Generic Header |
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* @freq_hz: Frequency that the clock is currently on, in Hz. |
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* |
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* Response to request type TI_SCI_MSG_GET_CLOCK_FREQ. |
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*/ |
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struct ti_sci_msg_resp_get_clock_freq { |
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struct ti_sci_msg_hdr hdr; |
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u64 freq_hz; |
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} __packed; |
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#define TISCI_ADDR_LOW_MASK GENMASK_ULL(31, 0) |
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#define TISCI_ADDR_HIGH_MASK GENMASK_ULL(63, 32) |
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#define TISCI_ADDR_HIGH_SHIFT 32 |
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/** |
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* struct ti_sci_msg_req_proc_request - Request a processor |
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* |
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* @hdr: Generic Header |
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* @processor_id: ID of processor |
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* |
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* Request type is TISCI_MSG_PROC_REQUEST, response is a generic ACK/NACK |
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* message. |
|
*/ |
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struct ti_sci_msg_req_proc_request { |
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struct ti_sci_msg_hdr hdr; |
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u8 processor_id; |
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} __packed; |
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/** |
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* struct ti_sci_msg_req_proc_release - Release a processor |
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* |
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* @hdr: Generic Header |
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* @processor_id: ID of processor |
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* |
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* Request type is TISCI_MSG_PROC_RELEASE, response is a generic ACK/NACK |
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* message. |
|
*/ |
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struct ti_sci_msg_req_proc_release { |
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struct ti_sci_msg_hdr hdr; |
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u8 processor_id; |
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} __packed; |
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/** |
|
* struct ti_sci_msg_req_proc_handover - Handover a processor to a host |
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* |
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* @hdr: Generic Header |
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* @processor_id: ID of processor |
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* @host_id: New Host we want to give control to |
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* |
|
* Request type is TISCI_MSG_PROC_HANDOVER, response is a generic ACK/NACK |
|
* message. |
|
*/ |
|
struct ti_sci_msg_req_proc_handover { |
|
struct ti_sci_msg_hdr hdr; |
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u8 processor_id; |
|
u8 host_id; |
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} __packed; |
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/* A53 Config Flags */ |
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#define PROC_BOOT_CFG_FLAG_ARMV8_DBG_EN 0x00000001 |
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#define PROC_BOOT_CFG_FLAG_ARMV8_DBG_NIDEN 0x00000002 |
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#define PROC_BOOT_CFG_FLAG_ARMV8_DBG_SPIDEN 0x00000004 |
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#define PROC_BOOT_CFG_FLAG_ARMV8_DBG_SPNIDEN 0x00000008 |
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#define PROC_BOOT_CFG_FLAG_ARMV8_AARCH32 0x00000100 |
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/* R5 Config Flags */ |
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#define PROC_BOOT_CFG_FLAG_R5_DBG_EN 0x00000001 |
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#define PROC_BOOT_CFG_FLAG_R5_DBG_NIDEN 0x00000002 |
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#define PROC_BOOT_CFG_FLAG_R5_LOCKSTEP 0x00000100 |
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#define PROC_BOOT_CFG_FLAG_R5_TEINIT 0x00000200 |
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#define PROC_BOOT_CFG_FLAG_R5_NMFI_EN 0x00000400 |
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#define PROC_BOOT_CFG_FLAG_R5_TCM_RSTBASE 0x00000800 |
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#define PROC_BOOT_CFG_FLAG_R5_BTCM_EN 0x00001000 |
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#define PROC_BOOT_CFG_FLAG_R5_ATCM_EN 0x00002000 |
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|
/** |
|
* struct ti_sci_msg_req_set_proc_boot_config - Set Processor boot configuration |
|
* @hdr: Generic Header |
|
* @processor_id: ID of processor |
|
* @bootvector_low: Lower 32bit (Little Endian) of boot vector |
|
* @bootvector_high: Higher 32bit (Little Endian) of boot vector |
|
* @config_flags_set: Optional Processor specific Config Flags to set. |
|
* Setting a bit here implies required bit sets to 1. |
|
* @config_flags_clear: Optional Processor specific Config Flags to clear. |
|
* Setting a bit here implies required bit gets cleared. |
|
* |
|
* Request type is TISCI_MSG_SET_PROC_BOOT_CONFIG, response is a generic |
|
* ACK/NACK message. |
|
*/ |
|
struct ti_sci_msg_req_set_proc_boot_config { |
|
struct ti_sci_msg_hdr hdr; |
|
u8 processor_id; |
|
u32 bootvector_low; |
|
u32 bootvector_high; |
|
u32 config_flags_set; |
|
u32 config_flags_clear; |
|
} __packed; |
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|
|
/* R5 Control Flags */ |
|
#define PROC_BOOT_CTRL_FLAG_R5_CORE_HALT 0x00000001 |
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|
|
/** |
|
* struct ti_sci_msg_req_set_proc_boot_ctrl - Set Processor boot control flags |
|
* @hdr: Generic Header |
|
* @processor_id: ID of processor |
|
* @control_flags_set: Optional Processor specific Control Flags to set. |
|
* Setting a bit here implies required bit sets to 1. |
|
* @control_flags_clear:Optional Processor specific Control Flags to clear. |
|
* Setting a bit here implies required bit gets cleared. |
|
* |
|
* Request type is TISCI_MSG_SET_PROC_BOOT_CTRL, response is a generic ACK/NACK |
|
* message. |
|
*/ |
|
struct ti_sci_msg_req_set_proc_boot_ctrl { |
|
struct ti_sci_msg_hdr hdr; |
|
u8 processor_id; |
|
u32 control_flags_set; |
|
u32 control_flags_clear; |
|
} __packed; |
|
|
|
/** |
|
* struct ti_sci_msg_req_proc_auth_start_image - Authenticate and start image |
|
* @hdr: Generic Header |
|
* @processor_id: ID of processor |
|
* @cert_addr_low: Lower 32bit (Little Endian) of certificate |
|
* @cert_addr_high: Higher 32bit (Little Endian) of certificate |
|
* |
|
* Request type is TISCI_MSG_PROC_AUTH_BOOT_IMAGE, response is a generic |
|
* ACK/NACK message. |
|
*/ |
|
struct ti_sci_msg_req_proc_auth_boot_image { |
|
struct ti_sci_msg_hdr hdr; |
|
u8 processor_id; |
|
u32 cert_addr_low; |
|
u32 cert_addr_high; |
|
} __packed; |
|
|
|
/** |
|
* struct ti_sci_msg_req_get_proc_boot_status - Get processor boot status |
|
* @hdr: Generic Header |
|
* @processor_id: ID of processor |
|
* |
|
* Request type is TISCI_MSG_GET_PROC_BOOT_STATUS, response is appropriate |
|
* message, or NACK in case of inability to satisfy request. |
|
*/ |
|
struct ti_sci_msg_req_get_proc_boot_status { |
|
struct ti_sci_msg_hdr hdr; |
|
u8 processor_id; |
|
} __packed; |
|
|
|
/* ARMv8 Status Flags */ |
|
#define PROC_BOOT_STATUS_FLAG_ARMV8_WFE 0x00000001 |
|
#define PROC_BOOT_STATUS_FLAG_ARMV8_WFI 0x00000002 |
|
|
|
/* R5 Status Flags */ |
|
#define PROC_BOOT_STATUS_FLAG_R5_WFE 0x00000001 |
|
#define PROC_BOOT_STATUS_FLAG_R5_WFI 0x00000002 |
|
#define PROC_BOOT_STATUS_FLAG_R5_CLK_GATED 0x00000004 |
|
#define PROC_BOOT_STATUS_FLAG_R5_LOCKSTEP_PERMITTED 0x00000100 |
|
|
|
/** |
|
* struct ti_sci_msg_resp_get_proc_boot_status - Processor boot status response |
|
* @hdr: Generic Header |
|
* @processor_id: ID of processor |
|
* @bootvector_low: Lower 32bit (Little Endian) of boot vector |
|
* @bootvector_high: Higher 32bit (Little Endian) of boot vector |
|
* @config_flags: Optional Processor specific Config Flags set. |
|
* @control_flags: Optional Processor specific Control Flags. |
|
* @status_flags: Optional Processor specific Status Flags set. |
|
* |
|
* Response to TISCI_MSG_GET_PROC_BOOT_STATUS. |
|
*/ |
|
struct ti_sci_msg_resp_get_proc_boot_status { |
|
struct ti_sci_msg_hdr hdr; |
|
u8 processor_id; |
|
u32 bootvector_low; |
|
u32 bootvector_high; |
|
u32 config_flags; |
|
u32 control_flags; |
|
u32 status_flags; |
|
} __packed; |
|
|
|
#endif /* __TI_SCI_H */
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