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62 lines
1.5 KiB
62 lines
1.5 KiB
/* |
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* R-Car Gen3 Clock Pulse Generator |
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* |
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* Copyright (C) 2015-2016 Glider bvba |
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* |
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* This program is free software; you can redistribute it and/or modify |
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* it under the terms of the GNU General Public License as published by |
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* the Free Software Foundation; version 2 of the License. |
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*/ |
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#ifndef __CLK_RENESAS_RCAR_GEN3_CPG_H__ |
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#define __CLK_RENESAS_RCAR_GEN3_CPG_H__ |
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enum rcar_gen3_clk_types { |
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CLK_TYPE_GEN3_MAIN = CLK_TYPE_CUSTOM, |
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CLK_TYPE_GEN3_PLL0, |
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CLK_TYPE_GEN3_PLL1, |
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CLK_TYPE_GEN3_PLL2, |
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CLK_TYPE_GEN3_PLL3, |
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CLK_TYPE_GEN3_PLL4, |
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CLK_TYPE_GEN3_SD, |
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CLK_TYPE_GEN3_RPC, |
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CLK_TYPE_GEN3_R, |
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CLK_TYPE_GEN3_PE, |
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CLK_TYPE_GEN3_Z2, |
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}; |
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#define DEF_GEN3_SD(_name, _id, _parent, _offset) \ |
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DEF_BASE(_name, _id, CLK_TYPE_GEN3_SD, _parent, .offset = _offset) |
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#define DEF_GEN3_RPC(_name, _id, _parent, _offset) \ |
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DEF_BASE(_name, _id, CLK_TYPE_GEN3_RPC, _parent, .offset = _offset) |
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#define DEF_GEN3_PE(_name, _id, _parent_sscg, _div_sscg, _parent_clean, \ |
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_div_clean) \ |
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DEF_BASE(_name, _id, CLK_TYPE_GEN3_PE, \ |
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(_parent_sscg) << 16 | (_parent_clean), \ |
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.div = (_div_sscg) << 16 | (_div_clean)) |
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struct rcar_gen3_cpg_pll_config { |
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u8 extal_div; |
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u8 pll1_mult; |
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u8 pll1_div; |
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u8 pll3_mult; |
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u8 pll3_div; |
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}; |
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#define CPG_RCKCR 0x240 |
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struct gen3_clk_priv { |
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void __iomem *base; |
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struct cpg_mssr_info *info; |
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struct clk clk_extal; |
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struct clk clk_extalr; |
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bool sscg; |
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const struct rcar_gen3_cpg_pll_config *cpg_pll_config; |
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}; |
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int gen3_clk_probe(struct udevice *dev); |
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int gen3_clk_remove(struct udevice *dev); |
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extern const struct clk_ops gen3_clk_ops; |
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#endif
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