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275 lines
8.6 KiB
275 lines
8.6 KiB
/* SPDX-License-Identifier: GPL-2.0-only */ |
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/* |
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* linux/arch/arm/mach-omap1/ams-delta-fiq-handler.S |
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* |
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* Based on linux/arch/arm/lib/floppydma.S |
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* Renamed and modified to work with 2.6 kernel by Matt Callow |
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* Copyright (C) 1995, 1996 Russell King |
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* Copyright (C) 2004 Pete Trapps |
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* Copyright (C) 2006 Matt Callow |
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* Copyright (C) 2010 Janusz Krzysztofik |
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*/ |
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#include <linux/linkage.h> |
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#include <linux/platform_data/ams-delta-fiq.h> |
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#include <linux/platform_data/gpio-omap.h> |
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#include <linux/soc/ti/omap1-io.h> |
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#include <asm/assembler.h> |
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#include <asm/irq.h> |
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#include "hardware.h" |
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#include "ams-delta-fiq.h" |
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#include "board-ams-delta.h" |
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#include "iomap.h" |
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/* |
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* OMAP1510 GPIO related symbol copied from arch/arm/mach-omap1/gpio15xx.c. |
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* Unfortunately, it was not placed in a separate header file. |
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*/ |
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#define OMAP1510_GPIO_BASE 0xFFFCE000 |
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/* GPIO register bitmasks */ |
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#define KEYBRD_DATA_MASK (0x1 << AMS_DELTA_GPIO_PIN_KEYBRD_DATA) |
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#define KEYBRD_CLK_MASK (0x1 << AMS_DELTA_GPIO_PIN_KEYBRD_CLK) |
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#define MODEM_IRQ_MASK (0x1 << AMS_DELTA_GPIO_PIN_MODEM_IRQ) |
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#define HOOK_SWITCH_MASK (0x1 << AMS_DELTA_GPIO_PIN_HOOK_SWITCH) |
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#define OTHERS_MASK (MODEM_IRQ_MASK | HOOK_SWITCH_MASK) |
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/* IRQ handler register bitmasks */ |
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#define DEFERRED_FIQ_MASK OMAP_IRQ_BIT(INT_DEFERRED_FIQ) |
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#define GPIO_BANK1_MASK OMAP_IRQ_BIT(INT_GPIO_BANK1) |
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/* Driver buffer byte offsets */ |
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#define BUF_MASK (FIQ_MASK * 4) |
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#define BUF_STATE (FIQ_STATE * 4) |
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#define BUF_KEYS_CNT (FIQ_KEYS_CNT * 4) |
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#define BUF_TAIL_OFFSET (FIQ_TAIL_OFFSET * 4) |
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#define BUF_HEAD_OFFSET (FIQ_HEAD_OFFSET * 4) |
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#define BUF_BUF_LEN (FIQ_BUF_LEN * 4) |
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#define BUF_KEY (FIQ_KEY * 4) |
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#define BUF_MISSED_KEYS (FIQ_MISSED_KEYS * 4) |
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#define BUF_BUFFER_START (FIQ_BUFFER_START * 4) |
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#define BUF_GPIO_INT_MASK (FIQ_GPIO_INT_MASK * 4) |
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#define BUF_KEYS_HICNT (FIQ_KEYS_HICNT * 4) |
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#define BUF_IRQ_PEND (FIQ_IRQ_PEND * 4) |
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#define BUF_SIR_CODE_L1 (FIQ_SIR_CODE_L1 * 4) |
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#define BUF_SIR_CODE_L2 (IRQ_SIR_CODE_L2 * 4) |
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#define BUF_CNT_INT_00 (FIQ_CNT_INT_00 * 4) |
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#define BUF_CNT_INT_KEY (FIQ_CNT_INT_KEY * 4) |
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#define BUF_CNT_INT_MDM (FIQ_CNT_INT_MDM * 4) |
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#define BUF_CNT_INT_03 (FIQ_CNT_INT_03 * 4) |
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#define BUF_CNT_INT_HSW (FIQ_CNT_INT_HSW * 4) |
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#define BUF_CNT_INT_05 (FIQ_CNT_INT_05 * 4) |
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#define BUF_CNT_INT_06 (FIQ_CNT_INT_06 * 4) |
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#define BUF_CNT_INT_07 (FIQ_CNT_INT_07 * 4) |
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#define BUF_CNT_INT_08 (FIQ_CNT_INT_08 * 4) |
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#define BUF_CNT_INT_09 (FIQ_CNT_INT_09 * 4) |
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#define BUF_CNT_INT_10 (FIQ_CNT_INT_10 * 4) |
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#define BUF_CNT_INT_11 (FIQ_CNT_INT_11 * 4) |
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#define BUF_CNT_INT_12 (FIQ_CNT_INT_12 * 4) |
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#define BUF_CNT_INT_13 (FIQ_CNT_INT_13 * 4) |
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#define BUF_CNT_INT_14 (FIQ_CNT_INT_14 * 4) |
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#define BUF_CNT_INT_15 (FIQ_CNT_INT_15 * 4) |
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#define BUF_CIRC_BUFF (FIQ_CIRC_BUFF * 4) |
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/* |
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* Register usage |
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* r8 - temporary |
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* r9 - the driver buffer |
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* r10 - temporary |
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* r11 - interrupts mask |
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* r12 - base pointers |
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* r13 - interrupts status |
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*/ |
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.text |
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.global qwerty_fiqin_end |
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ENTRY(qwerty_fiqin_start) |
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@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@ |
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@ FIQ intrrupt handler |
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ldr r12, omap_ih1_base @ set pointer to level1 handler |
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ldr r11, [r12, #IRQ_MIR_REG_OFFSET] @ fetch interrupts mask |
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ldr r13, [r12, #IRQ_ITR_REG_OFFSET] @ fetch interrupts status |
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bics r13, r13, r11 @ clear masked - any left? |
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beq exit @ none - spurious FIQ? exit |
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ldr r10, [r12, #IRQ_SIR_FIQ_REG_OFFSET] @ get requested interrupt number |
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mov r8, #2 @ reset FIQ agreement |
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str r8, [r12, #IRQ_CONTROL_REG_OFFSET] |
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cmp r10, #(INT_GPIO_BANK1 - NR_IRQS_LEGACY) @ is it GPIO interrupt? |
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beq gpio @ yes - process it |
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mov r8, #1 |
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orr r8, r11, r8, lsl r10 @ mask spurious interrupt |
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str r8, [r12, #IRQ_MIR_REG_OFFSET] |
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exit: |
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subs pc, lr, #4 @ return from FIQ |
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@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@ |
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@@@@@@@@@@@@@@@@@@@@@@@@@@@ |
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gpio: @ GPIO bank interrupt handler |
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ldr r12, omap1510_gpio_base @ set base pointer to GPIO bank |
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ldr r11, [r12, #OMAP1510_GPIO_INT_MASK] @ fetch GPIO interrupts mask |
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restart: |
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ldr r13, [r12, #OMAP1510_GPIO_INT_STATUS] @ fetch status bits |
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bics r13, r13, r11 @ clear masked - any left? |
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beq exit @ no - spurious interrupt? exit |
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orr r11, r11, r13 @ mask all requested interrupts |
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str r11, [r12, #OMAP1510_GPIO_INT_MASK] |
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str r13, [r12, #OMAP1510_GPIO_INT_STATUS] @ ack all requested interrupts |
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ands r10, r13, #KEYBRD_CLK_MASK @ extract keyboard status - set? |
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beq hksw @ no - try next source |
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@@@@@@@@@@@@@@@@@@@@@@ |
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@ Keyboard clock FIQ mode interrupt handler |
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@ r10 now contains KEYBRD_CLK_MASK, use it |
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bic r11, r11, r10 @ unmask it |
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str r11, [r12, #OMAP1510_GPIO_INT_MASK] |
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@ Process keyboard data |
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ldr r8, [r12, #OMAP1510_GPIO_DATA_INPUT] @ fetch GPIO input |
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ldr r10, [r9, #BUF_STATE] @ fetch kbd interface state |
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cmp r10, #0 @ are we expecting start bit? |
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bne data @ no - go to data processing |
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ands r8, r8, #KEYBRD_DATA_MASK @ check start bit - detected? |
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beq hksw @ no - try next source |
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@ r8 contains KEYBRD_DATA_MASK, use it |
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str r8, [r9, #BUF_STATE] @ enter data processing state |
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@ r10 already contains 0, reuse it |
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str r10, [r9, #BUF_KEY] @ clear keycode |
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mov r10, #2 @ reset input bit mask |
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str r10, [r9, #BUF_MASK] |
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@ Mask other GPIO line interrupts till key done |
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str r11, [r9, #BUF_GPIO_INT_MASK] @ save mask for later restore |
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mvn r11, #KEYBRD_CLK_MASK @ prepare all except kbd mask |
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str r11, [r12, #OMAP1510_GPIO_INT_MASK] @ store into the mask register |
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b restart @ restart |
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data: ldr r10, [r9, #BUF_MASK] @ fetch current input bit mask |
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@ r8 still contains GPIO input bits |
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ands r8, r8, #KEYBRD_DATA_MASK @ is keyboard data line low? |
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ldreq r8, [r9, #BUF_KEY] @ yes - fetch collected so far, |
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orreq r8, r8, r10 @ set 1 at current mask position |
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streq r8, [r9, #BUF_KEY] @ and save back |
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mov r10, r10, lsl #1 @ shift mask left |
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bics r10, r10, #0x800 @ have we got all the bits? |
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strne r10, [r9, #BUF_MASK] @ not yet - store the mask |
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bne restart @ and restart |
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@ r10 already contains 0, reuse it |
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str r10, [r9, #BUF_STATE] @ reset state to start |
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@ Key done - restore interrupt mask |
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ldr r10, [r9, #BUF_GPIO_INT_MASK] @ fetch saved mask |
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and r11, r11, r10 @ unmask all saved as unmasked |
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str r11, [r12, #OMAP1510_GPIO_INT_MASK] @ restore into the mask register |
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@ Try appending the keycode to the circular buffer |
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ldr r10, [r9, #BUF_KEYS_CNT] @ get saved keystrokes count |
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ldr r8, [r9, #BUF_BUF_LEN] @ get buffer size |
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cmp r10, r8 @ is buffer full? |
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beq hksw @ yes - key lost, next source |
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add r10, r10, #1 @ incremet keystrokes counter |
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str r10, [r9, #BUF_KEYS_CNT] |
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ldr r10, [r9, #BUF_TAIL_OFFSET] @ get buffer tail offset |
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@ r8 already contains buffer size |
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cmp r10, r8 @ end of buffer? |
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moveq r10, #0 @ yes - rewind to buffer start |
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ldr r12, [r9, #BUF_BUFFER_START] @ get buffer start address |
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add r12, r12, r10, LSL #2 @ calculate buffer tail address |
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ldr r8, [r9, #BUF_KEY] @ get last keycode |
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str r8, [r12] @ append it to the buffer tail |
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add r10, r10, #1 @ increment buffer tail offset |
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str r10, [r9, #BUF_TAIL_OFFSET] |
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ldr r10, [r9, #BUF_CNT_INT_KEY] @ increment interrupts counter |
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add r10, r10, #1 |
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str r10, [r9, #BUF_CNT_INT_KEY] |
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@@@@@@@@@@@@@@@@@@@@@@@@ |
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hksw: @Is hook switch interrupt requested? |
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tst r13, #HOOK_SWITCH_MASK @ is hook switch status bit set? |
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beq mdm @ no - try next source |
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@@@@@@@@@@@@@@@@@@@@@@@@ |
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@ Hook switch interrupt FIQ mode simple handler |
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@ Don't toggle active edge, the switch always bounces |
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@ Increment hook switch interrupt counter |
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ldr r10, [r9, #BUF_CNT_INT_HSW] |
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add r10, r10, #1 |
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str r10, [r9, #BUF_CNT_INT_HSW] |
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@@@@@@@@@@@@@@@@@@@@@@@@ |
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mdm: @Is it a modem interrupt? |
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tst r13, #MODEM_IRQ_MASK @ is modem status bit set? |
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beq irq @ no - check for next interrupt |
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@@@@@@@@@@@@@@@@@@@@@@@@ |
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@ Modem FIQ mode interrupt handler stub |
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@ Increment modem interrupt counter |
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ldr r10, [r9, #BUF_CNT_INT_MDM] |
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add r10, r10, #1 |
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str r10, [r9, #BUF_CNT_INT_MDM] |
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@@@@@@@@@@@@@@@@@@@@@@@@ |
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irq: @ Place deferred_fiq interrupt request |
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ldr r12, deferred_fiq_ih_base @ set pointer to IRQ handler |
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mov r10, #DEFERRED_FIQ_MASK @ set deferred_fiq bit |
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str r10, [r12, #IRQ_ISR_REG_OFFSET] @ place it in the ISR register |
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ldr r12, omap1510_gpio_base @ set pointer back to GPIO bank |
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b restart @ check for next GPIO interrupt |
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@@@@@@@@@@@@@@@@@@@@@@@@@@@ |
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/* |
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* Virtual addresses for IO |
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*/ |
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omap_ih1_base: |
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.word OMAP1_IO_ADDRESS(OMAP_IH1_BASE) |
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deferred_fiq_ih_base: |
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.word OMAP1_IO_ADDRESS(DEFERRED_FIQ_IH_BASE) |
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omap1510_gpio_base: |
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.word OMAP1_IO_ADDRESS(OMAP1510_GPIO_BASE) |
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qwerty_fiqin_end: |
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/* |
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* Check the size of the FIQ, |
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* it cannot go beyond 0xffff0200, and is copied to 0xffff001c |
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*/ |
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.if (qwerty_fiqin_end - qwerty_fiqin_start) > (0x200 - 0x1c) |
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.err |
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.endif
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